Tom Rini | 10e4779 | 2018-05-06 17:58:06 -0400 | [diff] [blame] | 1 | // SPDX-License-Identifier: GPL-2.0+ |
Prabhakar Kushwaha | c8d8e1a | 2014-04-08 19:13:56 +0530 | [diff] [blame] | 2 | /* Copyright 2013 Freescale Semiconductor, Inc. |
Prabhakar Kushwaha | c8d8e1a | 2014-04-08 19:13:56 +0530 | [diff] [blame] | 3 | */ |
| 4 | |
| 5 | #include <common.h> |
Simon Glass | a73bda4 | 2015-11-08 23:47:45 -0700 | [diff] [blame] | 6 | #include <console.h> |
Simon Glass | 4bc2ad2 | 2017-08-03 12:21:56 -0600 | [diff] [blame] | 7 | #include <environment.h> |
Prabhakar Kushwaha | c8d8e1a | 2014-04-08 19:13:56 +0530 | [diff] [blame] | 8 | #include <malloc.h> |
| 9 | #include <ns16550.h> |
| 10 | #include <nand.h> |
| 11 | #include <i2c.h> |
| 12 | #include <mmc.h> |
| 13 | #include <fsl_esdhc.h> |
| 14 | #include <spi_flash.h> |
Tang Yuantian | 760eafc | 2014-11-21 11:17:16 +0800 | [diff] [blame] | 15 | #include "../common/sleep.h" |
Simon Glass | dd8e224 | 2016-09-24 18:20:10 -0600 | [diff] [blame] | 16 | #include "../common/spl.h" |
Prabhakar Kushwaha | c8d8e1a | 2014-04-08 19:13:56 +0530 | [diff] [blame] | 17 | |
| 18 | DECLARE_GLOBAL_DATA_PTR; |
| 19 | |
| 20 | phys_size_t get_effective_memsize(void) |
| 21 | { |
| 22 | return CONFIG_SYS_L3_SIZE; |
| 23 | } |
| 24 | |
| 25 | unsigned long get_board_sys_clk(void) |
| 26 | { |
| 27 | return CONFIG_SYS_CLK_FREQ; |
| 28 | } |
| 29 | |
| 30 | unsigned long get_board_ddr_clk(void) |
| 31 | { |
| 32 | return CONFIG_DDR_CLK_FREQ; |
| 33 | } |
| 34 | |
| 35 | #define FSL_CORENET_CCSR_PORSR1_RCW_MASK 0xFF800000 |
| 36 | void board_init_f(ulong bootflag) |
| 37 | { |
| 38 | u32 plat_ratio, sys_clk, uart_clk; |
Prabhakar Kushwaha | c4c10d1 | 2014-10-29 22:33:09 +0530 | [diff] [blame] | 39 | #if defined(CONFIG_SPL_NAND_BOOT) && defined(CONFIG_A008044_WORKAROUND) |
Prabhakar Kushwaha | c8d8e1a | 2014-04-08 19:13:56 +0530 | [diff] [blame] | 40 | u32 porsr1, pinctl; |
Prabhakar Kushwaha | 6467a7a | 2014-10-29 22:33:55 +0530 | [diff] [blame] | 41 | u32 svr = get_svr(); |
Prabhakar Kushwaha | c8d8e1a | 2014-04-08 19:13:56 +0530 | [diff] [blame] | 42 | #endif |
| 43 | ccsr_gur_t *gur = (void *)CONFIG_SYS_MPC85xx_GUTS_ADDR; |
| 44 | |
Prabhakar Kushwaha | c4c10d1 | 2014-10-29 22:33:09 +0530 | [diff] [blame] | 45 | #if defined(CONFIG_SPL_NAND_BOOT) && defined(CONFIG_A008044_WORKAROUND) |
Prabhakar Kushwaha | 6467a7a | 2014-10-29 22:33:55 +0530 | [diff] [blame] | 46 | if (IS_SVR_REV(svr, 1, 0)) { |
| 47 | /* |
| 48 | * There is T1040 SoC issue where NOR, FPGA are inaccessible |
| 49 | * during NAND boot because IFC signals > IFC_AD7 are not |
| 50 | * enabled. This workaround changes RCW source to make all |
| 51 | * signals enabled. |
| 52 | */ |
| 53 | porsr1 = in_be32(&gur->porsr1); |
| 54 | pinctl = ((porsr1 & ~(FSL_CORENET_CCSR_PORSR1_RCW_MASK)) |
| 55 | | 0x24800000); |
| 56 | out_be32((unsigned int *)(CONFIG_SYS_DCSRBAR + 0x20000), |
| 57 | pinctl); |
| 58 | } |
Prabhakar Kushwaha | c8d8e1a | 2014-04-08 19:13:56 +0530 | [diff] [blame] | 59 | #endif |
| 60 | |
| 61 | /* Memcpy existing GD at CONFIG_SPL_GD_ADDR */ |
| 62 | memcpy((void *)CONFIG_SPL_GD_ADDR, (void *)gd, sizeof(gd_t)); |
| 63 | |
| 64 | /* Update GD pointer */ |
| 65 | gd = (gd_t *)(CONFIG_SPL_GD_ADDR); |
| 66 | |
Tang Yuantian | 25ccd5d | 2014-07-23 17:27:53 +0800 | [diff] [blame] | 67 | #ifdef CONFIG_DEEP_SLEEP |
| 68 | /* disable the console if boot from deep sleep */ |
Tang Yuantian | 760eafc | 2014-11-21 11:17:16 +0800 | [diff] [blame] | 69 | if (is_warm_boot()) |
| 70 | fsl_dp_disable_console(); |
Tang Yuantian | 25ccd5d | 2014-07-23 17:27:53 +0800 | [diff] [blame] | 71 | #endif |
Prabhakar Kushwaha | c8d8e1a | 2014-04-08 19:13:56 +0530 | [diff] [blame] | 72 | /* compiler optimization barrier needed for GCC >= 3.4 */ |
| 73 | __asm__ __volatile__("" : : : "memory"); |
| 74 | |
| 75 | console_init_f(); |
| 76 | |
| 77 | /* initialize selected port with appropriate baud rate */ |
| 78 | sys_clk = get_board_sys_clk(); |
| 79 | plat_ratio = (in_be32(&gur->rcwsr[0]) >> 25) & 0x1f; |
| 80 | uart_clk = sys_clk * plat_ratio / 2; |
| 81 | |
| 82 | NS16550_init((NS16550_t)CONFIG_SYS_NS16550_COM1, |
| 83 | uart_clk / 16 / CONFIG_BAUDRATE); |
| 84 | |
| 85 | relocate_code(CONFIG_SPL_RELOC_STACK, (gd_t *)CONFIG_SPL_GD_ADDR, 0x0); |
| 86 | } |
| 87 | |
| 88 | void board_init_r(gd_t *gd, ulong dest_addr) |
| 89 | { |
| 90 | bd_t *bd; |
| 91 | |
| 92 | bd = (bd_t *)(gd + sizeof(gd_t)); |
| 93 | memset(bd, 0, sizeof(bd_t)); |
| 94 | gd->bd = bd; |
| 95 | bd->bi_memstart = CONFIG_SYS_INIT_L3_ADDR; |
| 96 | bd->bi_memsize = CONFIG_SYS_L3_SIZE; |
| 97 | |
Simon Glass | 302445a | 2017-01-23 13:31:22 -0700 | [diff] [blame] | 98 | arch_cpu_init(); |
Prabhakar Kushwaha | c8d8e1a | 2014-04-08 19:13:56 +0530 | [diff] [blame] | 99 | get_clocks(); |
| 100 | mem_malloc_init(CONFIG_SPL_RELOC_MALLOC_ADDR, |
| 101 | CONFIG_SPL_RELOC_MALLOC_SIZE); |
Sumit Garg | 2ff056b | 2016-05-25 12:41:48 -0400 | [diff] [blame] | 102 | gd->flags |= GD_FLG_FULL_MALLOC_INIT; |
Prabhakar Kushwaha | c8d8e1a | 2014-04-08 19:13:56 +0530 | [diff] [blame] | 103 | |
| 104 | #ifdef CONFIG_SPL_MMC_BOOT |
| 105 | mmc_initialize(bd); |
| 106 | #endif |
| 107 | |
| 108 | /* relocate environment function pointers etc. */ |
| 109 | #ifdef CONFIG_SPL_NAND_BOOT |
| 110 | nand_spl_load_image(CONFIG_ENV_OFFSET, CONFIG_ENV_SIZE, |
| 111 | (uchar *)CONFIG_ENV_ADDR); |
| 112 | #endif |
| 113 | #ifdef CONFIG_SPL_MMC_BOOT |
| 114 | mmc_spl_load_image(CONFIG_ENV_OFFSET, CONFIG_ENV_SIZE, |
| 115 | (uchar *)CONFIG_ENV_ADDR); |
| 116 | #endif |
| 117 | #ifdef CONFIG_SPL_SPI_BOOT |
Simon Glass | dd8e224 | 2016-09-24 18:20:10 -0600 | [diff] [blame] | 118 | fsl_spi_spl_load_image(CONFIG_ENV_OFFSET, CONFIG_ENV_SIZE, |
| 119 | (uchar *)CONFIG_ENV_ADDR); |
Prabhakar Kushwaha | c8d8e1a | 2014-04-08 19:13:56 +0530 | [diff] [blame] | 120 | #endif |
| 121 | gd->env_addr = (ulong)(CONFIG_ENV_ADDR); |
Simon Glass | 4bc2ad2 | 2017-08-03 12:21:56 -0600 | [diff] [blame] | 122 | gd->env_valid = ENV_VALID; |
Prabhakar Kushwaha | c8d8e1a | 2014-04-08 19:13:56 +0530 | [diff] [blame] | 123 | |
| 124 | i2c_init_all(); |
| 125 | |
| 126 | puts("\n\n"); |
| 127 | |
Simon Glass | d35f338 | 2017-04-06 12:47:05 -0600 | [diff] [blame] | 128 | dram_init(); |
Prabhakar Kushwaha | c8d8e1a | 2014-04-08 19:13:56 +0530 | [diff] [blame] | 129 | |
| 130 | #ifdef CONFIG_SPL_MMC_BOOT |
| 131 | mmc_boot(); |
| 132 | #elif defined(CONFIG_SPL_SPI_BOOT) |
Simon Glass | dd8e224 | 2016-09-24 18:20:10 -0600 | [diff] [blame] | 133 | fsl_spi_boot(); |
Prabhakar Kushwaha | c8d8e1a | 2014-04-08 19:13:56 +0530 | [diff] [blame] | 134 | #elif defined(CONFIG_SPL_NAND_BOOT) |
| 135 | nand_boot(); |
| 136 | #endif |
| 137 | } |