blob: efbcfb36e92a44f111c128791593a25e6568cdce [file] [log] [blame]
Lokesh Vutla3d10ca82021-05-06 16:44:59 +05301// SPDX-License-Identifier: GPL-2.0
2/*
3 * Copyright (C) 2021 Texas Instruments Incorporated - https://www.ti.com/
4 */
5
6/ {
7 chosen {
8 stdout-path = "serial2:115200n8";
9 tick-timer = &timer1;
10 };
Aswath Govindrajua15380e2021-07-26 20:58:03 +053011
12 aliases {
13 mmc1 = &sdhci1;
14 };
Lokesh Vutla3d10ca82021-05-06 16:44:59 +053015};
16
17&cbass_main{
18 u-boot,dm-spl;
19 timer1: timer@2400000 {
20 compatible = "ti,omap5430-timer";
21 reg = <0x0 0x2400000 0x0 0x80>;
22 ti,timer-alwon;
23 clock-frequency = <250000000>;
24 u-boot,dm-spl;
25 };
26};
27
28&main_conf {
29 u-boot,dm-spl;
30 chipid@14 {
31 u-boot,dm-spl;
32 };
33};
34
35&main_pmx0 {
36 u-boot,dm-spl;
37 main_i2c0_pins_default: main-i2c0-pins-default {
38 u-boot,dm-spl;
39 pinctrl-single,pins = <
40 AM64X_IOPAD(0x0260, PIN_INPUT_PULLUP, 0) /* (A18) I2C0_SCL */
41 AM64X_IOPAD(0x0264, PIN_INPUT_PULLUP, 0) /* (B18) I2C0_SDA */
42 >;
43 };
44};
45
46&main_i2c0 {
47 u-boot,dm-spl;
48 pinctrl-names = "default";
49 pinctrl-0 = <&main_i2c0_pins_default>;
50 clock-frequency = <400000>;
51};
52
53&main_uart0 {
54 u-boot,dm-spl;
55};
56
57&dmss {
58 u-boot,dm-spl;
59};
60
61&secure_proxy_main {
62 u-boot,dm-spl;
63};
64
65&dmsc {
66 u-boot,dm-spl;
Suman Anna91eda102021-05-13 20:10:57 -050067 k3_sysreset: sysreset-controller {
68 compatible = "ti,sci-sysreset";
69 u-boot,dm-spl;
70 };
Lokesh Vutla3d10ca82021-05-06 16:44:59 +053071};
72
73&k3_pds {
74 u-boot,dm-spl;
75};
76
77&k3_clks {
78 u-boot,dm-spl;
79};
80
81&k3_reset {
82 u-boot,dm-spl;
83};
84
85&sdhci0 {
Aswath Govindrajua15380e2021-07-26 20:58:03 +053086 status = "disabled";
Lokesh Vutla3d10ca82021-05-06 16:44:59 +053087 u-boot,dm-spl;
88};
89
90&sdhci1 {
91 u-boot,dm-spl;
92};
93
94&main_mmc1_pins_default {
95 u-boot,dm-spl;
96};
Vignesh Raghavendrac23d7f32021-05-10 20:06:13 +053097
98&cpsw3g {
99 reg = <0x0 0x8000000 0x0 0x200000>,
100 <0x0 0x43000200 0x0 0x8>;
101 reg-names = "cpsw_nuss", "mac_efuse";
102 /delete-property/ ranges;
103
104 cpsw-phy-sel@04044 {
105 compatible = "ti,am64-phy-gmii-sel";
106 reg = <0x0 0x43004044 0x0 0x8>;
107 };
108};
109
110&cpsw_port2 {
111 status = "disabled";
112};