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Tom Rini10e47792018-05-06 17:58:06 -04001// SPDX-License-Identifier: GPL-2.0+
Nobuhiro Iwamatsu970dc332007-05-13 20:58:00 +09002/*
Jean-Christophe PLAGNIOL-VILLARD51704102009-06-04 12:06:47 +02003 * (C) Copyright 2009
4 * Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
5 *
Nobuhiro Iwamatsue763f1a2012-08-21 13:14:46 +09006 * (C) Copyright 2007-2012
Nobuhiro Iwamatsuac890472008-11-20 16:44:42 +09007 * Nobobuhiro Iwamatsu <iwamatsu@nigauri.org>
8 *
9 * (C) Copyright 2003
10 * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
Nobuhiro Iwamatsu970dc332007-05-13 20:58:00 +090011 */
12
13#include <common.h>
Simon Glass97589732020-05-10 11:40:02 -060014#include <init.h>
Nobuhiro Iwamatsu01213252008-07-08 12:03:24 +090015#include <asm/processor.h>
Nobuhiro Iwamatsuac890472008-11-20 16:44:42 +090016#include <asm/io.h>
Simon Glass4dcacfc2020-05-10 11:40:13 -060017#include <linux/bitops.h>
Marek Vasut1f92cca2018-08-24 21:37:14 +020018
Marek Vasut1f92cca2018-08-24 21:37:14 +020019#if defined(CONFIG_CPU_SH4) || defined(CONFIG_ARCH_RMOBILE)
Marek Vasutc633ed82018-08-24 21:43:17 +020020#define TSTR 0x4
Marek Vasutc633ed82018-08-24 21:43:17 +020021#define TCR0 0x10
Marek Vasut1f92cca2018-08-24 21:37:14 +020022#endif /* CONFIG_CPU_SH4 */
Nobuhiro Iwamatsue763f1a2012-08-21 13:14:46 +090023
Marek Vasutc633ed82018-08-24 21:43:17 +020024#define TCR_TPSC 0x07
Marek Vasute56385a2018-08-24 21:23:04 +020025#define TSTR_STR0 BIT(0)
Nobuhiro Iwamatsucc18f8d2013-07-23 13:57:24 +090026
Nobuhiro Iwamatsue763f1a2012-08-21 13:14:46 +090027int timer_init(void)
Nobuhiro Iwamatsu970dc332007-05-13 20:58:00 +090028{
Marek Vasutc633ed82018-08-24 21:43:17 +020029 writew(readw(TMU_BASE + TCR0) & ~TCR_TPSC, TMU_BASE + TCR0);
30 writeb(readb(TMU_BASE + TSTR) & ~TSTR_STR0, TMU_BASE + TSTR);
31 writeb(readb(TMU_BASE + TSTR) | TSTR_STR0, TMU_BASE + TSTR);
Nobuhiro Iwamatsuac890472008-11-20 16:44:42 +090032
Nobuhiro Iwamatsu970dc332007-05-13 20:58:00 +090033 return 0;
34}