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Daniel Hellstroma2d96db2008-03-26 23:26:48 +01001/* Configuration header file for Gaisler GR-XC3S-1500
2 * spartan board.
3 *
4 * (C) Copyright 2003-2005
5 * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
6 *
7 * (C) Copyright 2007
8 * Daniel Hellstrom, Gaisler Research, daniel@gaisler.com.
9 *
Wolfgang Denkbd8ec7e2013-10-07 13:07:26 +020010 * SPDX-License-Identifier: GPL-2.0+
Daniel Hellstroma2d96db2008-03-26 23:26:48 +010011 */
12
13#ifndef __CONFIG_H__
14#define __CONFIG_H__
15
16/*
17 * High Level Configuration Options
18 * (easy to change)
19 */
20
Daniel Hellstroma2d96db2008-03-26 23:26:48 +010021#define CONFIG_GRXC3S1500 1 /* ... on GR-XC3S-1500 board */
22
23/* CPU / AMBA BUS configuration */
Wolfgang Denka1be4762008-05-20 16:00:29 +020024#define CONFIG_SYS_CLK_FREQ 40000000 /* 40MHz */
Daniel Hellstroma2d96db2008-03-26 23:26:48 +010025
26/* Number of SPARC register windows */
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +020027#define CONFIG_SYS_SPARC_NWINDOWS 8
Daniel Hellstroma2d96db2008-03-26 23:26:48 +010028
29/*
30 * Serial console configuration
31 */
32#define CONFIG_BAUDRATE 38400 /* ... at 38400 bps */
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +020033#define CONFIG_SYS_BAUDRATE_TABLE { 9600, 19200, 38400, 57600, 115200, 230400 }
Daniel Hellstroma2d96db2008-03-26 23:26:48 +010034
35/* Partitions */
36#define CONFIG_DOS_PARTITION
37#define CONFIG_MAC_PARTITION
38#define CONFIG_ISO_PARTITION
39
40/*
41 * Supported commands
42 */
Daniel Hellstroma2d96db2008-03-26 23:26:48 +010043#define CONFIG_CMD_REGINFO
Daniel Hellstroma2d96db2008-03-26 23:26:48 +010044#define CONFIG_CMD_PING
45#define CONFIG_CMD_DIAG
46#define CONFIG_CMD_IRQ
47
48/*
49 * Autobooting
50 */
51#define CONFIG_BOOTDELAY 5 /* autoboot after 5 seconds */
52
53#define CONFIG_PREBOOT "echo;" \
54 "echo Type \"run flash_nfs\" to mount root filesystem over NFS;" \
55 "echo"
56
57#undef CONFIG_BOOTARGS
58
59#define CONFIG_EXTRA_ENV_SETTINGS \
60 "netdev=eth0\0" \
61 "nfsargs=setenv bootargs console=ttyS0,38400 root=/dev/nfs rw " \
62 "nfsroot=${serverip}:${rootpath}\0" \
63 "ramargs=setenv bootargs console=ttyS0,${baudrate} root=/dev/ram rw\0" \
64 "addip=setenv bootargs ${bootargs} " \
65 "ip=${ipaddr}:${serverip}:${gatewayip}:${netmask}" \
66 ":${hostname}:${netdev}:off panic=1\0" \
67 "flash_nfs=run nfsargs addip;" \
68 "bootm ${kernel_addr}\0" \
69 "flash_self=run ramargs addip;" \
70 "bootm ${kernel_addr} ${ramdisk_addr}\0" \
71 "net_nfs=tftp 40000000 ${bootfile};run nfsargs addip;bootm\0" \
72 "scratch=40200000\0" \
Mike Frysingerc3c6bf12011-10-12 19:47:51 +000073 "getkernel=tftpboot $(scratch) $(bootfile)\0" \
Daniel Hellstroma2d96db2008-03-26 23:26:48 +010074 "bootargs=console=ttyS0,38400 root=/dev/nfs rw nfsroot=192.168.0.20:/export/rootfs ip=192.168.0.206:192.168.0.20:192.168.0.1:255.255.255.0:grxc3s1500_daniel:eth0\0" \
75 ""
76
77#define CONFIG_NETMASK 255.255.255.0
78#define CONFIG_GATEWAYIP 192.168.0.1
79#define CONFIG_SERVERIP 192.168.0.20
80#define CONFIG_IPADDR 192.168.0.206
Joe Hershberger257ff782011-10-13 13:03:47 +000081#define CONFIG_ROOTPATH "/export/rootfs"
Daniel Hellstroma2d96db2008-03-26 23:26:48 +010082#define CONFIG_HOSTNAME grxc3s1500
Joe Hershbergere4da2482011-10-13 13:03:48 +000083#define CONFIG_BOOTFILE "/uImage"
Daniel Hellstroma2d96db2008-03-26 23:26:48 +010084
85#define CONFIG_BOOTCOMMAND "run flash_self"
86
87/* Memory MAP
88 *
89 * Flash:
90 * |--------------------------------|
91 * | 0x00000000 Text & Data & BSS | *
92 * | for Monitor | *
93 * | ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~| *
94 * | UNUSED / Growth | * 256kb
95 * |--------------------------------|
96 * | 0x00050000 Base custom area | *
97 * | kernel / FS | *
98 * | | * Rest of Flash
99 * |~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~|
100 * | END-0x00008000 Environment | * 32kb
101 * |--------------------------------|
102 *
103 *
104 *
105 * Main Memory:
106 * |--------------------------------|
107 * | UNUSED / scratch area |
108 * | |
109 * | |
110 * | |
111 * | |
112 * |--------------------------------|
113 * | Monitor .Text / .DATA / .BSS | * 256kb
114 * | Relocated! | *
115 * |--------------------------------|
116 * | Monitor Malloc | * 128kb (contains relocated environment)
117 * |--------------------------------|
118 * | Monitor/kernel STACK | * 64kb
119 * |--------------------------------|
120 * | Page Table for MMU systems | * 2k
121 * |--------------------------------|
122 * | PROM Code accessed from Linux | * 6kb-128b
123 * |--------------------------------|
124 * | Global data (avail from kernel)| * 128b
125 * |--------------------------------|
126 *
127 */
128
129/*
130 * Flash configuration (8,16 or 32 MB)
131 * TEXT base always at 0xFFF00000
132 * ENV_ADDR always at 0xFFF40000
133 * FLASH_BASE at 0xFC000000 for 64 MB
134 * 0xFE000000 for 32 MB
135 * 0xFF000000 for 16 MB
136 * 0xFF800000 for 8 MB
137 */
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +0200138/*#define CONFIG_SYS_NO_FLASH 1*/
139#define CONFIG_SYS_FLASH_BASE 0x00000000
140#define CONFIG_SYS_FLASH_SIZE 0x00800000
Daniel Hellstroma2d96db2008-03-26 23:26:48 +0100141
142#define PHYS_FLASH_SECT_SIZE 0x00020000 /* 128 KB sectors */
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +0200143#define CONFIG_SYS_MAX_FLASH_SECT 64 /* max num of sects on one chip */
144#define CONFIG_SYS_MAX_FLASH_BANKS 1 /* max num of memory banks */
Daniel Hellstroma2d96db2008-03-26 23:26:48 +0100145
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +0200146#define CONFIG_SYS_FLASH_ERASE_TOUT 240000 /* Flash Erase Timeout (in ms) */
147#define CONFIG_SYS_FLASH_WRITE_TOUT 500 /* Flash Write Timeout (in ms) */
148#define CONFIG_SYS_FLASH_LOCK_TOUT 5 /* Timeout for Flash Set Lock Bit (in ms) */
149#define CONFIG_SYS_FLASH_UNLOCK_TOUT 10000 /* Timeout for Flash Clear Lock Bits (in ms) */
150#define CONFIG_SYS_FLASH_PROTECTION /* "Real" (hardware) sectors protection */
Daniel Hellstroma2d96db2008-03-26 23:26:48 +0100151
152/*** CFI CONFIG ***/
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +0200153#define CONFIG_SYS_FLASH_CFI_WIDTH FLASH_CFI_8BIT
Jean-Christophe PLAGNIOL-VILLARD8d94c232008-08-13 01:40:42 +0200154#define CONFIG_FLASH_CFI_DRIVER
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +0200155#define CONFIG_SYS_FLASH_CFI
Daniel Hellstroma2d96db2008-03-26 23:26:48 +0100156/* Bypass cache when reading regs from flash memory */
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +0200157#define CONFIG_SYS_FLASH_CFI_BYPASS_READ
Daniel Hellstroma2d96db2008-03-26 23:26:48 +0100158/* Buffered writes (32byte/go) instead of single accesses */
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +0200159#define CONFIG_SYS_FLASH_USE_BUFFER_WRITE
Daniel Hellstroma2d96db2008-03-26 23:26:48 +0100160
161/*
162 * Environment settings
163 */
Jean-Christophe PLAGNIOL-VILLARD68a87562008-09-10 22:48:00 +0200164/*#define CONFIG_ENV_IS_NOWHERE 1*/
Jean-Christophe PLAGNIOL-VILLARD53db4cd2008-09-10 22:48:04 +0200165#define CONFIG_ENV_IS_IN_FLASH 1
Jean-Christophe PLAGNIOL-VILLARD7e1cda62008-09-10 22:48:06 +0200166/* CONFIG_ENV_ADDR need to be at sector boundary */
167#define CONFIG_ENV_SIZE 0x8000
168#define CONFIG_ENV_SECT_SIZE 0x20000
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +0200169#define CONFIG_ENV_ADDR (CONFIG_SYS_FLASH_BASE+CONFIG_SYS_FLASH_SIZE-CONFIG_ENV_SECT_SIZE)
Daniel Hellstroma2d96db2008-03-26 23:26:48 +0100170#define CONFIG_ENV_OVERWRITE 1
171
172/*
173 * Memory map
174 */
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +0200175#define CONFIG_SYS_SDRAM_BASE 0x40000000
176#define CONFIG_SYS_SDRAM_SIZE 0x4000000
177#define CONFIG_SYS_SDRAM_END (CONFIG_SYS_SDRAM_BASE+CONFIG_SYS_SDRAM_SIZE)
Daniel Hellstroma2d96db2008-03-26 23:26:48 +0100178
179/* no SRAM available */
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +0200180#undef CONFIG_SYS_SRAM_BASE
181#undef CONFIG_SYS_SRAM_SIZE
Daniel Hellstroma2d96db2008-03-26 23:26:48 +0100182
183/* Always Run U-Boot from SDRAM */
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +0200184#define CONFIG_SYS_RAM_BASE CONFIG_SYS_SDRAM_BASE
185#define CONFIG_SYS_RAM_SIZE CONFIG_SYS_SDRAM_SIZE
186#define CONFIG_SYS_RAM_END CONFIG_SYS_SDRAM_END
Daniel Hellstroma2d96db2008-03-26 23:26:48 +0100187
Wolfgang Denk0191e472010-10-26 14:34:52 +0200188#define CONFIG_SYS_GBL_DATA_OFFSET (CONFIG_SYS_RAM_END - GENERATED_GBL_DATA_SIZE)
Daniel Hellstroma2d96db2008-03-26 23:26:48 +0100189
Wolfgang Denk0191e472010-10-26 14:34:52 +0200190#define CONFIG_SYS_PROM_SIZE (8192-GENERATED_GBL_DATA_SIZE)
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +0200191#define CONFIG_SYS_PROM_OFFSET (CONFIG_SYS_GBL_DATA_OFFSET-CONFIG_SYS_PROM_SIZE)
Daniel Hellstroma2d96db2008-03-26 23:26:48 +0100192
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +0200193#define CONFIG_SYS_INIT_SP_OFFSET (CONFIG_SYS_PROM_OFFSET-32)
194#define CONFIG_SYS_STACK_SIZE (0x10000-32)
Daniel Hellstroma2d96db2008-03-26 23:26:48 +0100195
Wolfgang Denk0708bc62010-10-07 21:51:12 +0200196#define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_TEXT_BASE
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +0200197#if (CONFIG_SYS_MONITOR_BASE < CONFIG_SYS_FLASH_BASE)
198# define CONFIG_SYS_RAMBOOT 1
Daniel Hellstroma2d96db2008-03-26 23:26:48 +0100199#endif
200
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +0200201#define CONFIG_SYS_MONITOR_LEN (256 << 10) /* Reserve 256 kB for Monitor */
202#define CONFIG_SYS_MALLOC_LEN (128 << 10) /* Reserve 128 kB for malloc() */
203#define CONFIG_SYS_BOOTMAPSZ (8 << 20) /* Initial Memory map for Linux */
Daniel Hellstroma2d96db2008-03-26 23:26:48 +0100204
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +0200205#define CONFIG_SYS_MALLOC_END (CONFIG_SYS_INIT_SP_OFFSET-CONFIG_SYS_STACK_SIZE)
206#define CONFIG_SYS_MALLOC_BASE (CONFIG_SYS_MALLOC_END-CONFIG_SYS_MALLOC_LEN)
Daniel Hellstroma2d96db2008-03-26 23:26:48 +0100207
208/* relocated monitor area */
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +0200209#define CONFIG_SYS_RELOC_MONITOR_MAX_END CONFIG_SYS_MALLOC_BASE
210#define CONFIG_SYS_RELOC_MONITOR_BASE (CONFIG_SYS_RELOC_MONITOR_MAX_END-CONFIG_SYS_MONITOR_LEN)
Daniel Hellstroma2d96db2008-03-26 23:26:48 +0100211
212/* make un relocated address from relocated address */
Wolfgang Denk0708bc62010-10-07 21:51:12 +0200213#define UN_RELOC(address) (address-(CONFIG_SYS_RELOC_MONITOR_BASE-CONFIG_SYS_TEXT_BASE))
Daniel Hellstroma2d96db2008-03-26 23:26:48 +0100214
215/*
216 * Ethernet configuration
217 */
218#define CONFIG_GRETH 1
Daniel Hellstroma2d96db2008-03-26 23:26:48 +0100219
Daniel Hellstroma2d96db2008-03-26 23:26:48 +0100220#define CONFIG_PHY_ADDR 0x00
221
222/*
223 * Miscellaneous configurable options
224 */
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +0200225#define CONFIG_SYS_LONGHELP /* undef to save memory */
Daniel Hellstroma2d96db2008-03-26 23:26:48 +0100226#if defined(CONFIG_CMD_KGDB)
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +0200227#define CONFIG_SYS_CBSIZE 1024 /* Console I/O Buffer Size */
Daniel Hellstroma2d96db2008-03-26 23:26:48 +0100228#else
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +0200229#define CONFIG_SYS_CBSIZE 256 /* Console I/O Buffer Size */
Daniel Hellstroma2d96db2008-03-26 23:26:48 +0100230#endif
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +0200231#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE+sizeof(CONFIG_SYS_PROMPT)+16) /* Print Buffer Size */
232#define CONFIG_SYS_MAXARGS 16 /* max number of command args */
233#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE /* Boot Argument Buffer Size */
Daniel Hellstroma2d96db2008-03-26 23:26:48 +0100234
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +0200235#define CONFIG_SYS_MEMTEST_START 0x00100000 /* memtest works on */
236#define CONFIG_SYS_MEMTEST_END 0x00f00000 /* 1 ... 15 MB in DRAM */
Daniel Hellstroma2d96db2008-03-26 23:26:48 +0100237
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +0200238#define CONFIG_SYS_LOAD_ADDR 0x100000 /* default load address */
Daniel Hellstroma2d96db2008-03-26 23:26:48 +0100239
Daniel Hellstroma2d96db2008-03-26 23:26:48 +0100240/*
241 * Various low-level settings
242 */
243
244/*-----------------------------------------------------------------------
245 * USB stuff
246 *-----------------------------------------------------------------------
247 */
248#define CONFIG_USB_CLOCK 0x0001BBBB
249#define CONFIG_USB_CONFIG 0x00005000
250
251/***** Gaisler GRLIB IP-Cores Config ********/
252
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +0200253#define CONFIG_SYS_GRLIB_SDRAM 0
Daniel Hellstroma2d96db2008-03-26 23:26:48 +0100254
255/* See, GRLIB Docs (grip.pdf) on how to set up
256 * These the memory controller registers.
257 */
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +0200258#define CONFIG_SYS_GRLIB_MEMCFG1 (0x000000ff | (1<<11))
259#define CONFIG_SYS_GRLIB_MEMCFG2 0x82206000
260#define CONFIG_SYS_GRLIB_MEMCFG3 0x00136000
Daniel Hellstroma2d96db2008-03-26 23:26:48 +0100261
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +0200262#define CONFIG_SYS_GRLIB_FT_MEMCFG1 (0x000000ff | (1<<11))
263#define CONFIG_SYS_GRLIB_FT_MEMCFG2 0x82206000
264#define CONFIG_SYS_GRLIB_FT_MEMCFG3 0x00136000
Daniel Hellstroma2d96db2008-03-26 23:26:48 +0100265
266/* no DDR controller */
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +0200267#define CONFIG_SYS_GRLIB_DDR_CFG 0x00000000
Daniel Hellstroma2d96db2008-03-26 23:26:48 +0100268
269/* no DDR2 Controller */
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +0200270#define CONFIG_SYS_GRLIB_DDR2_CFG1 0x00000000
271#define CONFIG_SYS_GRLIB_DDR2_CFG3 0x00000000
Daniel Hellstroma2d96db2008-03-26 23:26:48 +0100272
Daniel Hellstroma2d96db2008-03-26 23:26:48 +0100273/* Identification string */
274#define CONFIG_IDENT_STRING "GAISLER LEON3 GR-XC3S-1500"
275
276/* default kernel command line */
277#define CONFIG_DEFAULT_KERNEL_COMMAND_LINE "console=ttyS0,38400\0\0"
278
279#endif /* __CONFIG_H */