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Neil Armstrong29647612019-10-11 17:33:54 +02001// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
2/*
3 * Copyright (c) 2019 BayLibre, SAS
4 * Author: Neil Armstrong <narmstrong@baylibre.com>
5 */
6
7#include "meson-g12-common.dtsi"
Jerome Brunetd34d5ef2020-03-05 12:12:38 +01008#include <dt-bindings/clock/axg-audio-clkc.h>
Neil Armstrong29647612019-10-11 17:33:54 +02009#include <dt-bindings/power/meson-sm1-power.h>
Jerome Brunetd34d5ef2020-03-05 12:12:38 +010010#include <dt-bindings/reset/amlogic,meson-axg-audio-arb.h>
11#include <dt-bindings/reset/amlogic,meson-g12a-audio-reset.h>
Neil Armstrong29647612019-10-11 17:33:54 +020012
13/ {
14 compatible = "amlogic,sm1";
15
Jerome Brunetd34d5ef2020-03-05 12:12:38 +010016 tdmif_a: audio-controller-0 {
17 compatible = "amlogic,axg-tdm-iface";
18 #sound-dai-cells = <0>;
19 sound-name-prefix = "TDM_A";
20 clocks = <&clkc_audio AUD_CLKID_MST_A_MCLK>,
21 <&clkc_audio AUD_CLKID_MST_A_SCLK>,
22 <&clkc_audio AUD_CLKID_MST_A_LRCLK>;
23 clock-names = "mclk", "sclk", "lrclk";
24 status = "disabled";
25 };
26
27 tdmif_b: audio-controller-1 {
28 compatible = "amlogic,axg-tdm-iface";
29 #sound-dai-cells = <0>;
30 sound-name-prefix = "TDM_B";
31 clocks = <&clkc_audio AUD_CLKID_MST_B_MCLK>,
32 <&clkc_audio AUD_CLKID_MST_B_SCLK>,
33 <&clkc_audio AUD_CLKID_MST_B_LRCLK>;
34 clock-names = "mclk", "sclk", "lrclk";
35 status = "disabled";
36 };
37
38 tdmif_c: audio-controller-2 {
39 compatible = "amlogic,axg-tdm-iface";
40 #sound-dai-cells = <0>;
41 sound-name-prefix = "TDM_C";
42 clocks = <&clkc_audio AUD_CLKID_MST_C_MCLK>,
43 <&clkc_audio AUD_CLKID_MST_C_SCLK>,
44 <&clkc_audio AUD_CLKID_MST_C_LRCLK>;
45 clock-names = "mclk", "sclk", "lrclk";
46 status = "disabled";
47 };
48
Neil Armstrong29647612019-10-11 17:33:54 +020049 cpus {
50 #address-cells = <0x2>;
51 #size-cells = <0x0>;
52
53 cpu0: cpu@0 {
54 device_type = "cpu";
55 compatible = "arm,cortex-a55";
56 reg = <0x0 0x0>;
57 enable-method = "psci";
58 next-level-cache = <&l2>;
59 };
60
61 cpu1: cpu@1 {
62 device_type = "cpu";
63 compatible = "arm,cortex-a55";
64 reg = <0x0 0x1>;
65 enable-method = "psci";
66 next-level-cache = <&l2>;
67 };
68
69 cpu2: cpu@2 {
70 device_type = "cpu";
71 compatible = "arm,cortex-a55";
72 reg = <0x0 0x2>;
73 enable-method = "psci";
74 next-level-cache = <&l2>;
75 };
76
77 cpu3: cpu@3 {
78 device_type = "cpu";
79 compatible = "arm,cortex-a55";
80 reg = <0x0 0x3>;
81 enable-method = "psci";
82 next-level-cache = <&l2>;
83 };
84
85 l2: l2-cache0 {
86 compatible = "cache";
87 };
88 };
89
90 cpu_opp_table: opp-table {
91 compatible = "operating-points-v2";
92 opp-shared;
93
94 opp-100000000 {
95 opp-hz = /bits/ 64 <100000000>;
96 opp-microvolt = <730000>;
97 };
98
99 opp-250000000 {
100 opp-hz = /bits/ 64 <250000000>;
101 opp-microvolt = <730000>;
102 };
103
104 opp-500000000 {
105 opp-hz = /bits/ 64 <500000000>;
106 opp-microvolt = <730000>;
107 };
108
109 opp-667000000 {
110 opp-hz = /bits/ 64 <666666666>;
111 opp-microvolt = <750000>;
112 };
113
114 opp-1000000000 {
115 opp-hz = /bits/ 64 <1000000000>;
116 opp-microvolt = <770000>;
117 };
118
119 opp-1200000000 {
120 opp-hz = /bits/ 64 <1200000000>;
121 opp-microvolt = <780000>;
122 };
123
124 opp-1404000000 {
125 opp-hz = /bits/ 64 <1404000000>;
126 opp-microvolt = <790000>;
127 };
128
129 opp-1512000000 {
130 opp-hz = /bits/ 64 <1500000000>;
131 opp-microvolt = <800000>;
132 };
133
134 opp-1608000000 {
135 opp-hz = /bits/ 64 <1608000000>;
136 opp-microvolt = <810000>;
137 };
138
139 opp-1704000000 {
140 opp-hz = /bits/ 64 <1704000000>;
141 opp-microvolt = <850000>;
142 };
143
144 opp-1800000000 {
145 opp-hz = /bits/ 64 <1800000000>;
146 opp-microvolt = <900000>;
147 };
148
149 opp-1908000000 {
150 opp-hz = /bits/ 64 <1908000000>;
151 opp-microvolt = <950000>;
152 };
153 };
154};
155
Jerome Brunetd34d5ef2020-03-05 12:12:38 +0100156&apb {
157 audio: bus@60000 {
158 compatible = "simple-bus";
159 reg = <0x0 0x60000 0x0 0x1000>;
160 #address-cells = <2>;
161 #size-cells = <2>;
162 ranges = <0x0 0x0 0x0 0x60000 0x0 0x1000>;
163
164 clkc_audio: clock-controller@0 {
165 status = "disabled";
166 compatible = "amlogic,sm1-audio-clkc";
167 reg = <0x0 0x0 0x0 0xb4>;
168 #clock-cells = <1>;
169 #reset-cells = <1>;
170
171 clocks = <&clkc CLKID_AUDIO>,
172 <&clkc CLKID_MPLL0>,
173 <&clkc CLKID_MPLL1>,
174 <&clkc CLKID_MPLL2>,
175 <&clkc CLKID_MPLL3>,
176 <&clkc CLKID_HIFI_PLL>,
177 <&clkc CLKID_FCLK_DIV3>,
178 <&clkc CLKID_FCLK_DIV4>,
179 <&clkc CLKID_FCLK_DIV5>;
180 clock-names = "pclk",
181 "mst_in0",
182 "mst_in1",
183 "mst_in2",
184 "mst_in3",
185 "mst_in4",
186 "mst_in5",
187 "mst_in6",
188 "mst_in7";
189
190 resets = <&reset RESET_AUDIO>;
191 };
192
193 toddr_a: audio-controller@100 {
194 compatible = "amlogic,sm1-toddr",
195 "amlogic,axg-toddr";
196 reg = <0x0 0x100 0x0 0x2c>;
197 #sound-dai-cells = <0>;
198 sound-name-prefix = "TODDR_A";
199 interrupts = <GIC_SPI 148 IRQ_TYPE_EDGE_RISING>;
200 clocks = <&clkc_audio AUD_CLKID_TODDR_A>;
201 resets = <&arb AXG_ARB_TODDR_A>,
202 <&clkc_audio AUD_RESET_TODDR_A>;
203 reset-names = "arb", "rst";
204 amlogic,fifo-depth = <8192>;
205 status = "disabled";
206 };
207
208 toddr_b: audio-controller@140 {
209 compatible = "amlogic,sm1-toddr",
210 "amlogic,axg-toddr";
211 reg = <0x0 0x140 0x0 0x2c>;
212 #sound-dai-cells = <0>;
213 sound-name-prefix = "TODDR_B";
214 interrupts = <GIC_SPI 149 IRQ_TYPE_EDGE_RISING>;
215 clocks = <&clkc_audio AUD_CLKID_TODDR_B>;
216 resets = <&arb AXG_ARB_TODDR_B>,
217 <&clkc_audio AUD_RESET_TODDR_B>;
218 reset-names = "arb", "rst";
219 amlogic,fifo-depth = <256>;
220 status = "disabled";
221 };
222
223 toddr_c: audio-controller@180 {
224 compatible = "amlogic,sm1-toddr",
225 "amlogic,axg-toddr";
226 reg = <0x0 0x180 0x0 0x2c>;
227 #sound-dai-cells = <0>;
228 sound-name-prefix = "TODDR_C";
229 interrupts = <GIC_SPI 150 IRQ_TYPE_EDGE_RISING>;
230 clocks = <&clkc_audio AUD_CLKID_TODDR_C>;
231 resets = <&arb AXG_ARB_TODDR_C>,
232 <&clkc_audio AUD_RESET_TODDR_C>;
233 reset-names = "arb", "rst";
234 amlogic,fifo-depth = <256>;
235 status = "disabled";
236 };
237
238 frddr_a: audio-controller@1c0 {
239 compatible = "amlogic,sm1-frddr",
240 "amlogic,axg-frddr";
241 reg = <0x0 0x1c0 0x0 0x2c>;
242 #sound-dai-cells = <0>;
243 sound-name-prefix = "FRDDR_A";
244 interrupts = <GIC_SPI 152 IRQ_TYPE_EDGE_RISING>;
245 clocks = <&clkc_audio AUD_CLKID_FRDDR_A>;
246 resets = <&arb AXG_ARB_FRDDR_A>,
247 <&clkc_audio AUD_RESET_FRDDR_A>;
248 reset-names = "arb", "rst";
249 amlogic,fifo-depth = <512>;
250 status = "disabled";
251 };
252
253 frddr_b: audio-controller@200 {
254 compatible = "amlogic,sm1-frddr",
255 "amlogic,axg-frddr";
256 reg = <0x0 0x200 0x0 0x2c>;
257 #sound-dai-cells = <0>;
258 sound-name-prefix = "FRDDR_B";
259 interrupts = <GIC_SPI 153 IRQ_TYPE_EDGE_RISING>;
260 clocks = <&clkc_audio AUD_CLKID_FRDDR_B>;
261 resets = <&arb AXG_ARB_FRDDR_B>,
262 <&clkc_audio AUD_RESET_FRDDR_B>;
263 reset-names = "arb", "rst";
264 amlogic,fifo-depth = <256>;
265 status = "disabled";
266 };
267
268 frddr_c: audio-controller@240 {
269 compatible = "amlogic,sm1-frddr",
270 "amlogic,axg-frddr";
271 reg = <0x0 0x240 0x0 0x2c>;
272 #sound-dai-cells = <0>;
273 sound-name-prefix = "FRDDR_C";
274 interrupts = <GIC_SPI 154 IRQ_TYPE_EDGE_RISING>;
275 clocks = <&clkc_audio AUD_CLKID_FRDDR_C>;
276 resets = <&arb AXG_ARB_FRDDR_C>,
277 <&clkc_audio AUD_RESET_FRDDR_C>;
278 reset-names = "arb", "rst";
279 amlogic,fifo-depth = <256>;
280 status = "disabled";
281 };
282
283 arb: reset-controller@280 {
284 status = "disabled";
285 compatible = "amlogic,meson-sm1-audio-arb";
286 reg = <0x0 0x280 0x0 0x4>;
287 #reset-cells = <1>;
288 clocks = <&clkc_audio AUD_CLKID_DDR_ARB>;
289 };
290
291 tdmin_a: audio-controller@300 {
292 compatible = "amlogic,sm1-tdmin",
293 "amlogic,axg-tdmin";
294 reg = <0x0 0x300 0x0 0x40>;
295 sound-name-prefix = "TDMIN_A";
296 resets = <&clkc_audio AUD_RESET_TDMIN_A>;
297 clocks = <&clkc_audio AUD_CLKID_TDMIN_A>,
298 <&clkc_audio AUD_CLKID_TDMIN_A_SCLK>,
299 <&clkc_audio AUD_CLKID_TDMIN_A_SCLK_SEL>,
300 <&clkc_audio AUD_CLKID_TDMIN_A_LRCLK>,
301 <&clkc_audio AUD_CLKID_TDMIN_A_LRCLK>;
302 clock-names = "pclk", "sclk", "sclk_sel",
303 "lrclk", "lrclk_sel";
304 status = "disabled";
305 };
306
307 tdmin_b: audio-controller@340 {
308 compatible = "amlogic,sm1-tdmin",
309 "amlogic,axg-tdmin";
310 reg = <0x0 0x340 0x0 0x40>;
311 sound-name-prefix = "TDMIN_B";
312 resets = <&clkc_audio AUD_RESET_TDMIN_B>;
313 clocks = <&clkc_audio AUD_CLKID_TDMIN_B>,
314 <&clkc_audio AUD_CLKID_TDMIN_B_SCLK>,
315 <&clkc_audio AUD_CLKID_TDMIN_B_SCLK_SEL>,
316 <&clkc_audio AUD_CLKID_TDMIN_B_LRCLK>,
317 <&clkc_audio AUD_CLKID_TDMIN_B_LRCLK>;
318 clock-names = "pclk", "sclk", "sclk_sel",
319 "lrclk", "lrclk_sel";
320 status = "disabled";
321 };
322
323 tdmin_c: audio-controller@380 {
324 compatible = "amlogic,sm1-tdmin",
325 "amlogic,axg-tdmin";
326 reg = <0x0 0x380 0x0 0x40>;
327 sound-name-prefix = "TDMIN_C";
328 resets = <&clkc_audio AUD_RESET_TDMIN_C>;
329 clocks = <&clkc_audio AUD_CLKID_TDMIN_C>,
330 <&clkc_audio AUD_CLKID_TDMIN_C_SCLK>,
331 <&clkc_audio AUD_CLKID_TDMIN_C_SCLK_SEL>,
332 <&clkc_audio AUD_CLKID_TDMIN_C_LRCLK>,
333 <&clkc_audio AUD_CLKID_TDMIN_C_LRCLK>;
334 clock-names = "pclk", "sclk", "sclk_sel",
335 "lrclk", "lrclk_sel";
336 status = "disabled";
337 };
338
339 tdmin_lb: audio-controller@3c0 {
340 compatible = "amlogic,sm1-tdmin",
341 "amlogic,axg-tdmin";
342 reg = <0x0 0x3c0 0x0 0x40>;
343 sound-name-prefix = "TDMIN_LB";
344 resets = <&clkc_audio AUD_RESET_TDMIN_LB>;
345 clocks = <&clkc_audio AUD_CLKID_TDMIN_LB>,
346 <&clkc_audio AUD_CLKID_TDMIN_LB_SCLK>,
347 <&clkc_audio AUD_CLKID_TDMIN_LB_SCLK_SEL>,
348 <&clkc_audio AUD_CLKID_TDMIN_LB_LRCLK>,
349 <&clkc_audio AUD_CLKID_TDMIN_LB_LRCLK>;
350 clock-names = "pclk", "sclk", "sclk_sel",
351 "lrclk", "lrclk_sel";
352 status = "disabled";
353 };
354
355 tdmout_a: audio-controller@500 {
356 compatible = "amlogic,sm1-tdmout";
357 reg = <0x0 0x500 0x0 0x40>;
358 sound-name-prefix = "TDMOUT_A";
359 resets = <&clkc_audio AUD_RESET_TDMOUT_A>;
360 clocks = <&clkc_audio AUD_CLKID_TDMOUT_A>,
361 <&clkc_audio AUD_CLKID_TDMOUT_A_SCLK>,
362 <&clkc_audio AUD_CLKID_TDMOUT_A_SCLK_SEL>,
363 <&clkc_audio AUD_CLKID_TDMOUT_A_LRCLK>,
364 <&clkc_audio AUD_CLKID_TDMOUT_A_LRCLK>;
365 clock-names = "pclk", "sclk", "sclk_sel",
366 "lrclk", "lrclk_sel";
367 status = "disabled";
368 };
369
370 tdmout_b: audio-controller@540 {
371 compatible = "amlogic,sm1-tdmout";
372 reg = <0x0 0x540 0x0 0x40>;
373 sound-name-prefix = "TDMOUT_B";
374 resets = <&clkc_audio AUD_RESET_TDMOUT_B>;
375 clocks = <&clkc_audio AUD_CLKID_TDMOUT_B>,
376 <&clkc_audio AUD_CLKID_TDMOUT_B_SCLK>,
377 <&clkc_audio AUD_CLKID_TDMOUT_B_SCLK_SEL>,
378 <&clkc_audio AUD_CLKID_TDMOUT_B_LRCLK>,
379 <&clkc_audio AUD_CLKID_TDMOUT_B_LRCLK>;
380 clock-names = "pclk", "sclk", "sclk_sel",
381 "lrclk", "lrclk_sel";
382 status = "disabled";
383 };
384
385 tdmout_c: audio-controller@580 {
386 compatible = "amlogic,sm1-tdmout";
387 reg = <0x0 0x580 0x0 0x40>;
388 sound-name-prefix = "TDMOUT_C";
389 resets = <&clkc_audio AUD_RESET_TDMOUT_C>;
390 clocks = <&clkc_audio AUD_CLKID_TDMOUT_C>,
391 <&clkc_audio AUD_CLKID_TDMOUT_C_SCLK>,
392 <&clkc_audio AUD_CLKID_TDMOUT_C_SCLK_SEL>,
393 <&clkc_audio AUD_CLKID_TDMOUT_C_LRCLK>,
394 <&clkc_audio AUD_CLKID_TDMOUT_C_LRCLK>;
395 clock-names = "pclk", "sclk", "sclk_sel",
396 "lrclk", "lrclk_sel";
397 status = "disabled";
398 };
399
400 tohdmitx: audio-controller@744 {
401 compatible = "amlogic,sm1-tohdmitx",
402 "amlogic,g12a-tohdmitx";
403 reg = <0x0 0x744 0x0 0x4>;
404 #sound-dai-cells = <1>;
405 sound-name-prefix = "TOHDMITX";
406 resets = <&clkc_audio AUD_RESET_TOHDMITX>;
407 status = "disabled";
408 };
409
410 toddr_d: audio-controller@840 {
411 compatible = "amlogic,sm1-toddr",
412 "amlogic,axg-toddr";
413 reg = <0x0 0x840 0x0 0x2c>;
414 #sound-dai-cells = <0>;
415 sound-name-prefix = "TODDR_D";
416 interrupts = <GIC_SPI 49 IRQ_TYPE_EDGE_RISING>;
417 clocks = <&clkc_audio AUD_CLKID_TODDR_D>;
418 resets = <&arb AXG_ARB_TODDR_D>,
419 <&clkc_audio AUD_RESET_TODDR_D>;
420 reset-names = "arb", "rst";
421 amlogic,fifo-depth = <256>;
422 status = "disabled";
423 };
424
425 frddr_d: audio-controller@880 {
426 compatible = "amlogic,sm1-frddr",
427 "amlogic,axg-frddr";
428 reg = <0x0 0x880 0x0 0x2c>;
429 #sound-dai-cells = <0>;
430 sound-name-prefix = "FRDDR_D";
431 interrupts = <GIC_SPI 50 IRQ_TYPE_EDGE_RISING>;
432 clocks = <&clkc_audio AUD_CLKID_FRDDR_D>;
433 resets = <&arb AXG_ARB_FRDDR_D>,
434 <&clkc_audio AUD_RESET_FRDDR_D>;
435 reset-names = "arb", "rst";
436 amlogic,fifo-depth = <256>;
437 status = "disabled";
438 };
439 };
440
441 pdm: audio-controller@61000 {
442 compatible = "amlogic,sm1-pdm",
443 "amlogic,axg-pdm";
444 reg = <0x0 0x61000 0x0 0x34>;
445 #sound-dai-cells = <0>;
446 sound-name-prefix = "PDM";
447 clocks = <&clkc_audio AUD_CLKID_PDM>,
448 <&clkc_audio AUD_CLKID_PDM_DCLK>,
449 <&clkc_audio AUD_CLKID_PDM_SYSCLK>;
450 clock-names = "pclk", "dclk", "sysclk";
451 status = "disabled";
452 };
453};
454
Neil Armstrong29647612019-10-11 17:33:54 +0200455&cecb_AO {
456 compatible = "amlogic,meson-sm1-ao-cec";
457};
458
459&clk_msr {
460 compatible = "amlogic,meson-sm1-clk-measure";
461};
462
463
464&clkc {
465 compatible = "amlogic,sm1-clkc";
466};
467
468&ethmac {
469 power-domains = <&pwrc PWRC_SM1_ETH_ID>;
470};
471
Jerome Brunetd34d5ef2020-03-05 12:12:38 +0100472&gpio_intc {
473 compatible = "amlogic,meson-sm1-gpio-intc",
474 "amlogic,meson-gpio-intc";
475};
476
477&pcie {
478 power-domains = <&pwrc PWRC_SM1_PCIE_ID>;
479};
480
Neil Armstrong29647612019-10-11 17:33:54 +0200481&pwrc {
482 compatible = "amlogic,meson-sm1-pwrc";
483};
484
Jerome Brunetd34d5ef2020-03-05 12:12:38 +0100485&simplefb_cvbs {
486 power-domains = <&pwrc PWRC_SM1_VPU_ID>;
487};
488
489&simplefb_hdmi {
490 power-domains = <&pwrc PWRC_SM1_VPU_ID>;
491};
492
493&vdec {
494 compatible = "amlogic,sm1-vdec";
495};
496
Neil Armstrong29647612019-10-11 17:33:54 +0200497&vpu {
498 power-domains = <&pwrc PWRC_SM1_VPU_ID>;
499};
500
501&usb {
502 power-domains = <&pwrc PWRC_SM1_USB_ID>;
503};