Tom Rini | 10e4779 | 2018-05-06 17:58:06 -0400 | [diff] [blame] | 1 | /* SPDX-License-Identifier: GPL-2.0+ */ |
Aneesh V | 00836d4 | 2011-09-08 11:05:49 -0400 | [diff] [blame] | 2 | /* |
| 3 | * (C) Copyright 2010 |
| 4 | * Texas Instruments Incorporated. |
| 5 | * Aneesh V <aneesh@ti.com> |
| 6 | * Steve Sakoman <steve@sakoman.com> |
| 7 | * |
| 8 | * TI OMAP4 common configuration settings |
Aneesh V | 00836d4 | 2011-09-08 11:05:49 -0400 | [diff] [blame] | 9 | */ |
| 10 | |
Enric Balletbò i Serra | cbf0407 | 2013-12-06 21:30:18 +0100 | [diff] [blame] | 11 | #ifndef __CONFIG_TI_OMAP4_COMMON_H |
| 12 | #define __CONFIG_TI_OMAP4_COMMON_H |
Aneesh V | 00836d4 | 2011-09-08 11:05:49 -0400 | [diff] [blame] | 13 | |
Lokesh Vutla | 2b8edea | 2013-09-03 19:47:18 +0530 | [diff] [blame] | 14 | #ifndef CONFIG_SYS_L2CACHE_OFF |
| 15 | #define CONFIG_SYS_L2_PL310 1 |
| 16 | #define CONFIG_SYS_PL310_BASE 0x48242000 |
| 17 | #endif |
Aneesh V | 00836d4 | 2011-09-08 11:05:49 -0400 | [diff] [blame] | 18 | |
| 19 | /* Get CPU defs */ |
| 20 | #include <asm/arch/cpu.h> |
Sricharan | 9310ff7 | 2011-11-15 09:49:55 -0500 | [diff] [blame] | 21 | #include <asm/arch/omap.h> |
Aneesh V | 00836d4 | 2011-09-08 11:05:49 -0400 | [diff] [blame] | 22 | |
Lokesh Vutla | 2b8edea | 2013-09-03 19:47:18 +0530 | [diff] [blame] | 23 | /* Use General purpose timer 1 */ |
| 24 | #define CONFIG_SYS_TIMERBASE GPT2_BASE |
Aneesh V | 00836d4 | 2011-09-08 11:05:49 -0400 | [diff] [blame] | 25 | |
| 26 | /* |
Lokesh Vutla | 2b8edea | 2013-09-03 19:47:18 +0530 | [diff] [blame] | 27 | * For the DDR timing information we can either dynamically determine |
| 28 | * the timings to use or use pre-determined timings (based on using the |
| 29 | * dynamic method. Default to the static timing infomation. |
Aneesh V | 00836d4 | 2011-09-08 11:05:49 -0400 | [diff] [blame] | 30 | */ |
Lokesh Vutla | 2b8edea | 2013-09-03 19:47:18 +0530 | [diff] [blame] | 31 | #define CONFIG_SYS_EMIF_PRECALCULATED_TIMING_REGS |
| 32 | #ifndef CONFIG_SYS_EMIF_PRECALCULATED_TIMING_REGS |
| 33 | #define CONFIG_SYS_AUTOMATIC_SDRAM_DETECTION |
| 34 | #define CONFIG_SYS_DEFAULT_LPDDR2_TIMINGS |
| 35 | #endif |
| 36 | |
Nishanth Menon | ad63dd7 | 2015-07-22 18:05:41 -0500 | [diff] [blame] | 37 | #include <configs/ti_armv7_omap.h> |
Aneesh V | 00836d4 | 2011-09-08 11:05:49 -0400 | [diff] [blame] | 38 | |
| 39 | /* |
Lokesh Vutla | 2b8edea | 2013-09-03 19:47:18 +0530 | [diff] [blame] | 40 | * Hardware drivers |
Aneesh V | 00836d4 | 2011-09-08 11:05:49 -0400 | [diff] [blame] | 41 | */ |
Thomas Chou | 52ac443 | 2015-11-19 21:48:12 +0800 | [diff] [blame] | 42 | #define CONFIG_SYS_NS16550_CLK 48000000 |
Tom Rini | 7a9ca3c | 2015-09-17 16:47:03 -0400 | [diff] [blame] | 43 | #if defined(CONFIG_SPL_BUILD) || !defined(CONFIG_DM_SERIAL) |
Aneesh V | 00836d4 | 2011-09-08 11:05:49 -0400 | [diff] [blame] | 44 | #define CONFIG_SYS_NS16550_SERIAL |
| 45 | #define CONFIG_SYS_NS16550_REG_SIZE (-4) |
Aneesh V | 00836d4 | 2011-09-08 11:05:49 -0400 | [diff] [blame] | 46 | #define CONFIG_SYS_NS16550_COM3 UART3_BASE |
Tom Rini | 7a9ca3c | 2015-09-17 16:47:03 -0400 | [diff] [blame] | 47 | #endif |
Aneesh V | 00836d4 | 2011-09-08 11:05:49 -0400 | [diff] [blame] | 48 | |
Aneesh V | 00836d4 | 2011-09-08 11:05:49 -0400 | [diff] [blame] | 49 | /* TWL6030 */ |
Balaji T K | f843d33 | 2011-09-08 06:34:57 +0000 | [diff] [blame] | 50 | #ifndef CONFIG_SPL_BUILD |
Aneesh V | 00836d4 | 2011-09-08 11:05:49 -0400 | [diff] [blame] | 51 | #define CONFIG_TWL6030_POWER 1 |
Balaji T K | f843d33 | 2011-09-08 06:34:57 +0000 | [diff] [blame] | 52 | #endif |
Aneesh V | 00836d4 | 2011-09-08 11:05:49 -0400 | [diff] [blame] | 53 | |
Aneesh V | 00836d4 | 2011-09-08 11:05:49 -0400 | [diff] [blame] | 54 | /* USB */ |
Aneesh V | 00836d4 | 2011-09-08 11:05:49 -0400 | [diff] [blame] | 55 | |
| 56 | /* USB device configuration */ |
| 57 | #define CONFIG_USB_DEVICE 1 |
| 58 | #define CONFIG_USB_TTY 1 |
Aneesh V | 00836d4 | 2011-09-08 11:05:49 -0400 | [diff] [blame] | 59 | |
Aneesh V | 00836d4 | 2011-09-08 11:05:49 -0400 | [diff] [blame] | 60 | /* |
| 61 | * Environment setup |
| 62 | */ |
Tom Rini | 6975fed | 2015-12-10 16:46:03 -0500 | [diff] [blame] | 63 | #define BOOTENV_DEV_LEGACY_MMC(devtypeu, devtypel, instance) \ |
| 64 | "bootcmd_" #devtypel #instance "=" \ |
| 65 | "setenv mmcdev " #instance"; "\ |
| 66 | "setenv bootpart " #instance":2 ; "\ |
| 67 | "run mmcboot\0" |
| 68 | |
| 69 | #define BOOTENV_DEV_NAME_LEGACY_MMC(devtypeu, devtypel, instance) \ |
| 70 | #devtypel #instance " " |
| 71 | |
| 72 | #define BOOTENV_DEV_NAME_NAND(devtypeu, devtypel, instance) \ |
| 73 | #devtypel #instance " " |
| 74 | |
| 75 | #define BOOT_TARGET_DEVICES(func) \ |
| 76 | func(MMC, mmc, 0) \ |
| 77 | func(LEGACY_MMC, legacy_mmc, 0) \ |
| 78 | func(MMC, mmc, 1) \ |
| 79 | func(LEGACY_MMC, legacy_mmc, 1) \ |
| 80 | func(PXE, pxe, na) \ |
| 81 | func(DHCP, dhcp, na) |
| 82 | |
Tom Rini | 6975fed | 2015-12-10 16:46:03 -0500 | [diff] [blame] | 83 | #include <config_distro_bootcmd.h> |
Sekhar Nori | 0ea56fe | 2017-04-06 14:52:56 +0530 | [diff] [blame] | 84 | #include <environment/ti/mmc.h> |
Tom Rini | 6975fed | 2015-12-10 16:46:03 -0500 | [diff] [blame] | 85 | |
Aneesh V | 00836d4 | 2011-09-08 11:05:49 -0400 | [diff] [blame] | 86 | #define CONFIG_EXTRA_ENV_SETTINGS \ |
Tom Rini | 96886f2 | 2014-03-28 15:03:29 -0400 | [diff] [blame] | 87 | DEFAULT_LINUX_BOOT_ENV \ |
Lokesh Vutla | b207c47 | 2015-08-28 13:35:07 +0530 | [diff] [blame] | 88 | DEFAULT_MMC_TI_ARGS \ |
Lokesh Vutla | c2913ac | 2016-11-29 11:58:00 +0530 | [diff] [blame] | 89 | DEFAULT_FIT_TI_ARGS \ |
Aneesh V | 69a4779 | 2011-11-21 23:38:58 +0000 | [diff] [blame] | 90 | "console=ttyO2,115200n8\0" \ |
Dan Murphy | ff30272 | 2013-06-06 13:27:06 -0500 | [diff] [blame] | 91 | "fdtfile=undefined\0" \ |
SRICHARAN R | 14a9519 | 2013-04-04 23:39:27 +0000 | [diff] [blame] | 92 | "bootpart=0:2\0" \ |
| 93 | "bootdir=/boot\0" \ |
SRICHARAN R | 31d0c15 | 2013-04-04 23:39:47 +0000 | [diff] [blame] | 94 | "bootfile=zImage\0" \ |
Aneesh V | 00836d4 | 2011-09-08 11:05:49 -0400 | [diff] [blame] | 95 | "usbtty=cdc_acm\0" \ |
| 96 | "vram=16M\0" \ |
Ash Charles | 48971ac | 2014-05-14 08:34:34 -0700 | [diff] [blame] | 97 | "loaduimage=load mmc ${mmcdev} ${loadaddr} uImage\0" \ |
Ash Charles | 48971ac | 2014-05-14 08:34:34 -0700 | [diff] [blame] | 98 | "uimageboot=echo Booting from mmc${mmcdev} ...; " \ |
Lokesh Vutla | b207c47 | 2015-08-28 13:35:07 +0530 | [diff] [blame] | 99 | "run args_mmc; " \ |
Ash Charles | 48971ac | 2014-05-14 08:34:34 -0700 | [diff] [blame] | 100 | "bootm ${loadaddr}\0" \ |
SRICHARAN R | 14a9519 | 2013-04-04 23:39:27 +0000 | [diff] [blame] | 101 | "findfdt="\ |
| 102 | "if test $board_name = sdp4430; then " \ |
| 103 | "setenv fdtfile omap4-sdp.dtb; fi; " \ |
| 104 | "if test $board_name = panda; then " \ |
Dan Murphy | e44c6d7 | 2013-04-18 06:29:53 +0000 | [diff] [blame] | 105 | "setenv fdtfile omap4-panda.dtb; fi;" \ |
Dan Murphy | e56459e | 2013-06-13 11:21:13 -0500 | [diff] [blame] | 106 | "if test $board_name = panda-a4; then " \ |
| 107 | "setenv fdtfile omap4-panda-a4.dtb; fi;" \ |
Dan Murphy | e44c6d7 | 2013-04-18 06:29:53 +0000 | [diff] [blame] | 108 | "if test $board_name = panda-es; then " \ |
Dan Murphy | ff30272 | 2013-06-06 13:27:06 -0500 | [diff] [blame] | 109 | "setenv fdtfile omap4-panda-es.dtb; fi;" \ |
Ash Charles | 48971ac | 2014-05-14 08:34:34 -0700 | [diff] [blame] | 110 | "if test $board_name = duovero; then " \ |
Ash Charles | aafaa79 | 2014-06-06 11:36:50 -0700 | [diff] [blame] | 111 | "setenv fdtfile omap4-duovero-parlor.dtb; fi;" \ |
Dan Murphy | ff30272 | 2013-06-06 13:27:06 -0500 | [diff] [blame] | 112 | "if test $fdtfile = undefined; then " \ |
| 113 | "echo WARNING: Could not determine device tree to use; fi; \0" \ |
Tom Rini | 6975fed | 2015-12-10 16:46:03 -0500 | [diff] [blame] | 114 | BOOTENV |
Aneesh V | 00836d4 | 2011-09-08 11:05:49 -0400 | [diff] [blame] | 115 | |
Lokesh Vutla | 6429657 | 2013-12-04 12:22:55 +0530 | [diff] [blame] | 116 | /* |
| 117 | * Defines for SPL |
| 118 | * It is known that this will break HS devices. Since the current size of |
| 119 | * SPL is overlapped with public stack and breaking non HS devices to boot. |
| 120 | * So moving TEXT_BASE down to non-HS limit. |
| 121 | */ |
Tom Rini | d9f808d | 2014-04-03 07:52:53 -0400 | [diff] [blame] | 122 | #define CONFIG_SYS_SPL_ARGS_ADDR (CONFIG_SYS_SDRAM_BASE + \ |
| 123 | (128 << 20)) |
Aneesh V | 00836d4 | 2011-09-08 11:05:49 -0400 | [diff] [blame] | 124 | |
Nishanth Menon | 5c866ff | 2014-01-07 20:06:56 -0600 | [diff] [blame] | 125 | #ifdef CONFIG_SPL_BUILD |
| 126 | /* No need for i2c in SPL mode as we will use SRI2C for PMIC access on OMAP4 */ |
| 127 | #undef CONFIG_SYS_I2C |
Nishanth Menon | 5c866ff | 2014-01-07 20:06:56 -0600 | [diff] [blame] | 128 | #endif |
| 129 | |
Enric Balletbò i Serra | cbf0407 | 2013-12-06 21:30:18 +0100 | [diff] [blame] | 130 | #endif /* __CONFIG_TI_OMAP4_COMMON_H */ |