Bo Shen | c0eede0 | 2012-06-27 21:58:20 +0000 | [diff] [blame] | 1 | /* |
| 2 | * (C) Copyright 2012 |
| 3 | * Atmel Semiconductor <www.atmel.com> |
| 4 | * Written-by: Bo Shen <voice.shen@atmel.com> |
| 5 | * |
Wolfgang Denk | d79de1d | 2013-07-08 09:37:19 +0200 | [diff] [blame] | 6 | * SPDX-License-Identifier: GPL-2.0+ |
Bo Shen | c0eede0 | 2012-06-27 21:58:20 +0000 | [diff] [blame] | 7 | */ |
| 8 | |
| 9 | #include <common.h> |
| 10 | #include <watchdog.h> |
| 11 | #include <usb.h> |
| 12 | #include <asm/io.h> |
| 13 | #include <asm/arch/hardware.h> |
| 14 | #include <asm/arch/at91_pmc.h> |
| 15 | #include <asm/arch/clk.h> |
| 16 | |
| 17 | #include "ehci.h" |
Bo Shen | c0eede0 | 2012-06-27 21:58:20 +0000 | [diff] [blame] | 18 | |
| 19 | /* Enable UTMI PLL time out 500us |
| 20 | * 10 times as datasheet specified |
| 21 | */ |
| 22 | #define EN_UPLL_TIMEOUT 500UL |
| 23 | |
Troy Kisky | 7d6bbb9 | 2013-10-10 15:27:57 -0700 | [diff] [blame] | 24 | int ehci_hcd_init(int index, enum usb_init_type init, |
| 25 | struct ehci_hccr **hccr, struct ehci_hcor **hcor) |
Bo Shen | c0eede0 | 2012-06-27 21:58:20 +0000 | [diff] [blame] | 26 | { |
| 27 | at91_pmc_t *pmc = (at91_pmc_t *)ATMEL_BASE_PMC; |
| 28 | ulong start_time, tmp_time; |
| 29 | |
| 30 | start_time = get_timer(0); |
| 31 | /* Enable UTMI PLL */ |
| 32 | writel(AT91_PMC_UPLLEN | AT91_PMC_BIASEN, &pmc->uckr); |
Andreas Bießmann | ed42bf7 | 2012-06-28 02:50:37 +0000 | [diff] [blame] | 33 | while ((readl(&pmc->sr) & AT91_PMC_LOCKU) != AT91_PMC_LOCKU) { |
Bo Shen | c0eede0 | 2012-06-27 21:58:20 +0000 | [diff] [blame] | 34 | WATCHDOG_RESET(); |
| 35 | tmp_time = get_timer(0); |
| 36 | if ((tmp_time - start_time) > EN_UPLL_TIMEOUT) { |
| 37 | printf("ERROR: failed to enable UPLL\n"); |
| 38 | return -1; |
| 39 | } |
| 40 | } |
| 41 | |
| 42 | /* Enable USB Host clock */ |
Bo Shen | a2a637d | 2014-08-06 17:24:57 +0800 | [diff] [blame] | 43 | #ifdef CPU_HAS_PCR |
| 44 | at91_periph_clk_enable(ATMEL_ID_UHPHS); |
| 45 | #else |
Bo Shen | c0eede0 | 2012-06-27 21:58:20 +0000 | [diff] [blame] | 46 | writel(1 << ATMEL_ID_UHPHS, &pmc->pcer); |
Bo Shen | a2a637d | 2014-08-06 17:24:57 +0800 | [diff] [blame] | 47 | #endif |
Bo Shen | c0eede0 | 2012-06-27 21:58:20 +0000 | [diff] [blame] | 48 | |
Lucas Stach | 3494a4c | 2012-09-26 00:14:35 +0200 | [diff] [blame] | 49 | *hccr = (struct ehci_hccr *)ATMEL_BASE_EHCI; |
| 50 | *hcor = (struct ehci_hcor *)((uint32_t)*hccr + |
| 51 | HC_LENGTH(ehci_readl(&(*hccr)->cr_capbase))); |
Bo Shen | c0eede0 | 2012-06-27 21:58:20 +0000 | [diff] [blame] | 52 | |
| 53 | return 0; |
| 54 | } |
| 55 | |
Lucas Stach | 3494a4c | 2012-09-26 00:14:35 +0200 | [diff] [blame] | 56 | int ehci_hcd_stop(int index) |
Bo Shen | c0eede0 | 2012-06-27 21:58:20 +0000 | [diff] [blame] | 57 | { |
| 58 | at91_pmc_t *pmc = (at91_pmc_t *)ATMEL_BASE_PMC; |
| 59 | ulong start_time, tmp_time; |
| 60 | |
| 61 | /* Disable USB Host Clock */ |
Bo Shen | a2a637d | 2014-08-06 17:24:57 +0800 | [diff] [blame] | 62 | #ifdef CPU_HAS_PCR |
| 63 | at91_periph_clk_disable(ATMEL_ID_UHPHS); |
| 64 | #else |
Bo Shen | c0eede0 | 2012-06-27 21:58:20 +0000 | [diff] [blame] | 65 | writel(1 << ATMEL_ID_UHPHS, &pmc->pcdr); |
Bo Shen | a2a637d | 2014-08-06 17:24:57 +0800 | [diff] [blame] | 66 | #endif |
Bo Shen | c0eede0 | 2012-06-27 21:58:20 +0000 | [diff] [blame] | 67 | |
| 68 | start_time = get_timer(0); |
| 69 | /* Disable UTMI PLL */ |
| 70 | writel(readl(&pmc->uckr) & ~AT91_PMC_UPLLEN, &pmc->uckr); |
Andreas Bießmann | ed42bf7 | 2012-06-28 02:50:37 +0000 | [diff] [blame] | 71 | while ((readl(&pmc->sr) & AT91_PMC_LOCKU) == AT91_PMC_LOCKU) { |
Bo Shen | c0eede0 | 2012-06-27 21:58:20 +0000 | [diff] [blame] | 72 | WATCHDOG_RESET(); |
| 73 | tmp_time = get_timer(0); |
| 74 | if ((tmp_time - start_time) > EN_UPLL_TIMEOUT) { |
| 75 | printf("ERROR: failed to stop UPLL\n"); |
| 76 | return -1; |
| 77 | } |
| 78 | } |
| 79 | |
| 80 | return 0; |
| 81 | } |