Dave Gerlach | 278e7ac | 2021-04-23 11:27:46 -0500 | [diff] [blame] | 1 | // SPDX-License-Identifier: GPL-2.0 |
| 2 | /* |
| 3 | * Copyright (C) 2020-2021 Texas Instruments Incorporated - https://www.ti.com/ |
| 4 | */ |
| 5 | |
| 6 | /dts-v1/; |
| 7 | |
| 8 | #include "k3-am642.dtsi" |
Dave Gerlach | 3daecde | 2021-05-04 18:00:52 -0500 | [diff] [blame] | 9 | #include "k3-am64-evm-ddr4-1600MTs.dtsi" |
| 10 | #include "k3-am64-ddr.dtsi" |
Dave Gerlach | 278e7ac | 2021-04-23 11:27:46 -0500 | [diff] [blame] | 11 | |
| 12 | / { |
| 13 | chosen { |
| 14 | stdout-path = "serial2:115200n8"; |
| 15 | tick-timer = &timer1; |
| 16 | }; |
| 17 | |
| 18 | aliases { |
| 19 | remoteproc0 = &sysctrler; |
| 20 | remoteproc1 = &a53_0; |
| 21 | }; |
| 22 | |
| 23 | memory@80000000 { |
| 24 | device_type = "memory"; |
| 25 | /* 2G RAM */ |
| 26 | reg = <0x00000000 0x80000000 0x00000000 0x80000000>; |
| 27 | |
Simon Glass | d3a98cb | 2023-02-13 08:56:33 -0700 | [diff] [blame] | 28 | bootph-pre-ram; |
Dave Gerlach | 278e7ac | 2021-04-23 11:27:46 -0500 | [diff] [blame] | 29 | }; |
| 30 | |
| 31 | a53_0: a53@0 { |
| 32 | compatible = "ti,am654-rproc"; |
| 33 | reg = <0x00 0x00a90000 0x00 0x10>; |
| 34 | power-domains = <&k3_pds 61 TI_SCI_PD_EXCLUSIVE>, |
| 35 | <&k3_pds 135 TI_SCI_PD_EXCLUSIVE>; |
| 36 | resets = <&k3_reset 135 0>; |
| 37 | clocks = <&k3_clks 61 0>; |
| 38 | assigned-clocks = <&k3_clks 61 0>, <&k3_clks 135 0>; |
| 39 | assigned-clock-parents = <&k3_clks 61 2>; |
| 40 | assigned-clock-rates = <200000000>, <1000000000>; |
| 41 | ti,sci = <&dmsc>; |
| 42 | ti,sci-proc-id = <32>; |
| 43 | ti,sci-host-id = <10>; |
Simon Glass | d3a98cb | 2023-02-13 08:56:33 -0700 | [diff] [blame] | 44 | bootph-pre-ram; |
Dave Gerlach | 278e7ac | 2021-04-23 11:27:46 -0500 | [diff] [blame] | 45 | }; |
| 46 | |
| 47 | reserved-memory { |
| 48 | #address-cells = <2>; |
| 49 | #size-cells = <2>; |
| 50 | ranges; |
| 51 | |
| 52 | secure_ddr: optee@9e800000 { |
| 53 | reg = <0x00 0x9e800000 0x00 0x01800000>; /* for OP-TEE */ |
| 54 | alignment = <0x1000>; |
| 55 | no-map; |
| 56 | }; |
| 57 | }; |
| 58 | |
| 59 | clk_200mhz: dummy-clock-200mhz { |
| 60 | compatible = "fixed-clock"; |
| 61 | #clock-cells = <0>; |
| 62 | clock-frequency = <200000000>; |
Simon Glass | d3a98cb | 2023-02-13 08:56:33 -0700 | [diff] [blame] | 63 | bootph-pre-ram; |
Dave Gerlach | 278e7ac | 2021-04-23 11:27:46 -0500 | [diff] [blame] | 64 | }; |
Nishanth Menon | d6a453c | 2021-05-04 18:00:55 -0500 | [diff] [blame] | 65 | |
| 66 | vtt_supply: vtt-supply { |
| 67 | compatible = "regulator-gpio"; |
| 68 | regulator-name = "vtt"; |
| 69 | regulator-min-microvolt = <0>; |
| 70 | regulator-max-microvolt = <3300000>; |
| 71 | gpios = <&main_gpio0 12 GPIO_ACTIVE_HIGH>; |
| 72 | states = <0 0x0 3300000 0x1>; |
Simon Glass | d3a98cb | 2023-02-13 08:56:33 -0700 | [diff] [blame] | 73 | bootph-pre-ram; |
Nishanth Menon | d6a453c | 2021-05-04 18:00:55 -0500 | [diff] [blame] | 74 | }; |
Dave Gerlach | 278e7ac | 2021-04-23 11:27:46 -0500 | [diff] [blame] | 75 | }; |
| 76 | |
| 77 | &cbass_main { |
| 78 | sysctrler: sysctrler { |
| 79 | compatible = "ti,am654-system-controller"; |
| 80 | mboxes= <&secure_proxy_main 1>, <&secure_proxy_main 0>; |
| 81 | mbox-names = "tx", "rx"; |
Simon Glass | d3a98cb | 2023-02-13 08:56:33 -0700 | [diff] [blame] | 82 | bootph-pre-ram; |
Dave Gerlach | 278e7ac | 2021-04-23 11:27:46 -0500 | [diff] [blame] | 83 | }; |
| 84 | }; |
| 85 | |
Hari Nagalla | 789225e | 2022-03-09 14:42:29 -0600 | [diff] [blame] | 86 | &cbass_main { |
| 87 | main_esm: esm@420000 { |
| 88 | compatible = "ti,j721e-esm"; |
| 89 | reg = <0x0 0x420000 0x0 0x1000>; |
| 90 | ti,esm-pins = <160>, <161>; |
Simon Glass | d3a98cb | 2023-02-13 08:56:33 -0700 | [diff] [blame] | 91 | bootph-pre-ram; |
Hari Nagalla | 789225e | 2022-03-09 14:42:29 -0600 | [diff] [blame] | 92 | }; |
| 93 | }; |
| 94 | |
| 95 | &cbass_mcu { |
Simon Glass | d3a98cb | 2023-02-13 08:56:33 -0700 | [diff] [blame] | 96 | bootph-pre-ram; |
Hari Nagalla | 789225e | 2022-03-09 14:42:29 -0600 | [diff] [blame] | 97 | mcu_esm: esm@4100000 { |
| 98 | compatible = "ti,j721e-esm"; |
| 99 | reg = <0x0 0x4100000 0x0 0x1000>; |
| 100 | ti,esm-pins = <0>, <1>; |
Simon Glass | d3a98cb | 2023-02-13 08:56:33 -0700 | [diff] [blame] | 101 | bootph-pre-ram; |
Hari Nagalla | 789225e | 2022-03-09 14:42:29 -0600 | [diff] [blame] | 102 | }; |
| 103 | }; |
| 104 | |
Dave Gerlach | 278e7ac | 2021-04-23 11:27:46 -0500 | [diff] [blame] | 105 | &main_pmx0 { |
Simon Glass | d3a98cb | 2023-02-13 08:56:33 -0700 | [diff] [blame] | 106 | bootph-pre-ram; |
Dave Gerlach | 278e7ac | 2021-04-23 11:27:46 -0500 | [diff] [blame] | 107 | main_uart0_pins_default: main-uart0-pins-default { |
Simon Glass | d3a98cb | 2023-02-13 08:56:33 -0700 | [diff] [blame] | 108 | bootph-pre-ram; |
Dave Gerlach | 278e7ac | 2021-04-23 11:27:46 -0500 | [diff] [blame] | 109 | pinctrl-single,pins = < |
| 110 | AM64X_IOPAD(0x0238, PIN_INPUT, 0) /* (B16) UART0_CTSn */ |
| 111 | AM64X_IOPAD(0x023c, PIN_OUTPUT, 0) /* (A16) UART0_RTSn */ |
| 112 | AM64X_IOPAD(0x0230, PIN_INPUT, 0) /* (D15) UART0_RXD */ |
| 113 | AM64X_IOPAD(0x0234, PIN_OUTPUT, 0) /* (C16) UART0_TXD */ |
| 114 | >; |
| 115 | }; |
| 116 | |
| 117 | main_uart1_pins_default: main-uart1-pins-default { |
Simon Glass | d3a98cb | 2023-02-13 08:56:33 -0700 | [diff] [blame] | 118 | bootph-pre-ram; |
Dave Gerlach | 278e7ac | 2021-04-23 11:27:46 -0500 | [diff] [blame] | 119 | pinctrl-single,pins = < |
| 120 | AM64X_IOPAD(0x0248, PIN_INPUT, 0) /* (D16) UART1_CTSn */ |
| 121 | AM64X_IOPAD(0x024c, PIN_OUTPUT, 0) /* (E16) UART1_RTSn */ |
| 122 | AM64X_IOPAD(0x0240, PIN_INPUT, 0) /* (E15) UART1_RXD */ |
| 123 | AM64X_IOPAD(0x0244, PIN_OUTPUT, 0) /* (E14) UART1_TXD */ |
| 124 | >; |
| 125 | }; |
| 126 | |
| 127 | main_mmc0_pins_default: main-mmc0-pins-default { |
Simon Glass | d3a98cb | 2023-02-13 08:56:33 -0700 | [diff] [blame] | 128 | bootph-pre-ram; |
Dave Gerlach | 278e7ac | 2021-04-23 11:27:46 -0500 | [diff] [blame] | 129 | pinctrl-single,pins = < |
| 130 | AM64X_IOPAD(0x01a8, PIN_INPUT_PULLDOWN, 0) /* (B25) MMC0_CLK */ |
| 131 | AM64X_IOPAD(0x01aC, PIN_INPUT_PULLUP, 0) /* (B27) MMC0_CMD */ |
| 132 | AM64X_IOPAD(0x01a4, PIN_INPUT_PULLUP, 0) /* (A26) MMC0_DAT0 */ |
| 133 | AM64X_IOPAD(0x01a0, PIN_INPUT_PULLUP, 0) /* (E25) MMC0_DAT1 */ |
| 134 | AM64X_IOPAD(0x019c, PIN_INPUT_PULLUP, 0) /* (C26) MMC0_DAT2 */ |
| 135 | AM64X_IOPAD(0x0198, PIN_INPUT_PULLUP, 0) /* (A25) MMC0_DAT3 */ |
| 136 | AM64X_IOPAD(0x0194, PIN_INPUT_PULLUP, 0) /* (E24) MMC0_DAT4 */ |
| 137 | AM64X_IOPAD(0x0190, PIN_INPUT_PULLUP, 0) /* (A24) MMC0_DAT5 */ |
| 138 | AM64X_IOPAD(0x018c, PIN_INPUT_PULLUP, 0) /* (B26) MMC0_DAT6 */ |
| 139 | AM64X_IOPAD(0x0188, PIN_INPUT_PULLUP, 0) /* (D25) MMC0_DAT7 */ |
| 140 | AM64X_IOPAD(0x01b0, PIN_INPUT, 0) /* (C25) MMC0_DS */ |
| 141 | >; |
| 142 | }; |
| 143 | |
| 144 | main_mmc1_pins_default: main-mmc1-pins-default { |
Simon Glass | d3a98cb | 2023-02-13 08:56:33 -0700 | [diff] [blame] | 145 | bootph-pre-ram; |
Dave Gerlach | 278e7ac | 2021-04-23 11:27:46 -0500 | [diff] [blame] | 146 | pinctrl-single,pins = < |
| 147 | AM64X_IOPAD(0x0294, PIN_INPUT_PULLUP, 0) /* (J19) MMC1_CMD */ |
| 148 | AM64X_IOPAD(0x028c, PIN_INPUT_PULLDOWN, 0) /* (L20) MMC1_CLK */ |
| 149 | AM64X_IOPAD(0x0288, PIN_INPUT_PULLUP, 0) /* (K21) MMC1_DAT0 */ |
| 150 | AM64X_IOPAD(0x0284, PIN_INPUT_PULLUP, 0) /* (L21) MMC1_DAT1 */ |
| 151 | AM64X_IOPAD(0x0280, PIN_INPUT_PULLUP, 0) /* (K19) MMC1_DAT2 */ |
| 152 | AM64X_IOPAD(0x027c, PIN_INPUT_PULLUP, 0) /* (K18) MMC1_DAT3 */ |
| 153 | AM64X_IOPAD(0x0298, PIN_INPUT_PULLUP, 0) /* (D19) MMC1_SDCD */ |
| 154 | AM64X_IOPAD(0x029c, PIN_INPUT_PULLUP, 0) /* (C20) MMC1_SDWP */ |
| 155 | >; |
| 156 | }; |
Nishanth Menon | d6a453c | 2021-05-04 18:00:55 -0500 | [diff] [blame] | 157 | |
| 158 | ddr_vtt_pins_default: ddr-vtt-pins-default { |
Simon Glass | d3a98cb | 2023-02-13 08:56:33 -0700 | [diff] [blame] | 159 | bootph-pre-ram; |
Nishanth Menon | d6a453c | 2021-05-04 18:00:55 -0500 | [diff] [blame] | 160 | pinctrl-single,pins = < |
| 161 | AM64X_IOPAD(0x0030, PIN_OUTPUT_PULLUP, 7) /* (L18) OSPI0_CSN1.GPIO0_12 */ |
| 162 | >; |
| 163 | }; |
Aswath Govindraju | 0b2481e | 2021-06-04 22:00:36 +0530 | [diff] [blame] | 164 | |
| 165 | main_usb0_pins_default: main-usb0-pins-default { |
| 166 | pinctrl-single,pins = < |
| 167 | AM64X_IOPAD(0x02a8, PIN_OUTPUT, 0) /* (E19) USB0_DRVVBUS */ |
| 168 | >; |
| 169 | }; |
Roger Quadros | 7350eb2 | 2023-01-24 11:43:27 +0200 | [diff] [blame] | 170 | |
| 171 | mdio1_pins_default: mdio1-pins-default { |
| 172 | pinctrl-single,pins = < |
| 173 | AM64X_IOPAD(0x01fc, PIN_OUTPUT, 4) /* (R2) PRG0_PRU1_GPO19.MDIO0_MDC */ |
| 174 | AM64X_IOPAD(0x01f8, PIN_INPUT, 4) /* (P5) PRG0_PRU1_GPO18.MDIO0_MDIO */ |
| 175 | >; |
| 176 | }; |
| 177 | |
| 178 | rgmii1_pins_default: rgmii1-pins-default { |
| 179 | pinctrl-single,pins = < |
| 180 | AM64X_IOPAD(0x01cc, PIN_INPUT, 4) /* (W5) PRG0_PRU1_GPO7.RGMII1_RD0 */ |
| 181 | AM64X_IOPAD(0x01d4, PIN_INPUT, 4) /* (Y5) PRG0_PRU1_GPO9.RGMII1_RD1 */ |
| 182 | AM64X_IOPAD(0x01d8, PIN_INPUT, 4) /* (V6) PRG0_PRU1_GPO10.RGMII1_RD2 */ |
| 183 | AM64X_IOPAD(0x01f4, PIN_INPUT, 4) /* (V5) PRG0_PRU1_GPO17.RGMII1_RD3 */ |
| 184 | AM64X_IOPAD(0x0188, PIN_INPUT, 4) /* (AA5) PRG0_PRU0_GPO10.RGMII1_RXC */ |
| 185 | AM64X_IOPAD(0x0184, PIN_INPUT, 4) /* (W6) PRG0_PRU0_GPO9.RGMII1_RX_CTL */ |
| 186 | AM64X_IOPAD(0x0124, PIN_OUTPUT, 4) /* (V15) PRG1_PRU1_GPO7.RGMII1_TD0 */ |
| 187 | AM64X_IOPAD(0x012c, PIN_OUTPUT, 4) /* (V14) PRG1_PRU1_GPO9.RGMII1_TD1 */ |
| 188 | AM64X_IOPAD(0x0130, PIN_OUTPUT, 4) /* (W14) PRG1_PRU1_GPO10.RGMII1_TD2 */ |
| 189 | AM64X_IOPAD(0x014c, PIN_OUTPUT, 4) /* (AA14) PRG1_PRU1_GPO17.RGMII1_TD3 */ |
| 190 | AM64X_IOPAD(0x00e0, PIN_OUTPUT, 4) /* (U14) PRG1_PRU0_GPO10.RGMII1_TXC */ |
| 191 | AM64X_IOPAD(0x00dc, PIN_OUTPUT, 4) /* (U15) PRG1_PRU0_GPO9.RGMII1_TX_CTL */ |
| 192 | >; |
| 193 | }; |
| 194 | |
| 195 | rgmii2_pins_default: rgmii2-pins-default { |
| 196 | pinctrl-single,pins = < |
| 197 | AM64X_IOPAD(0x0108, PIN_INPUT, 4) /* (W11) PRG1_PRU1_GPO0.RGMII2_RD0 */ |
| 198 | AM64X_IOPAD(0x010c, PIN_INPUT, 4) /* (V11) PRG1_PRU1_GPO1.RGMII2_RD1 */ |
| 199 | AM64X_IOPAD(0x0110, PIN_INPUT, 4) /* (AA12) PRG1_PRU1_GPO2.RGMII2_RD2 */ |
| 200 | AM64X_IOPAD(0x0114, PIN_INPUT, 4) /* (Y12) PRG1_PRU1_GPO3.RGMII2_RD3 */ |
| 201 | AM64X_IOPAD(0x0120, PIN_INPUT, 4) /* (U11) PRG1_PRU1_GPO6.RGMII2_RXC */ |
| 202 | AM64X_IOPAD(0x0118, PIN_INPUT, 4) /* (W12) PRG1_PRU1_GPO4.RGMII2_RX_CTL */ |
| 203 | AM64X_IOPAD(0x0134, PIN_OUTPUT, 4) /* (AA10) PRG1_PRU1_GPO11.RGMII2_TD0 */ |
| 204 | AM64X_IOPAD(0x0138, PIN_OUTPUT, 4) /* (V10) PRG1_PRU1_GPO12.RGMII2_TD1 */ |
| 205 | AM64X_IOPAD(0x013c, PIN_OUTPUT, 4) /* (U10) PRG1_PRU1_GPO13.RGMII2_TD2 */ |
| 206 | AM64X_IOPAD(0x0140, PIN_OUTPUT, 4) /* (AA11) PRG1_PRU1_GPO14.RGMII2_TD3 */ |
| 207 | AM64X_IOPAD(0x0148, PIN_OUTPUT, 4) /* (Y10) PRG1_PRU1_GPO16.RGMII2_TXC */ |
| 208 | AM64X_IOPAD(0x0144, PIN_OUTPUT, 4) /* (Y11) PRG1_PRU1_GPO15.RGMII2_TX_CTL */ |
| 209 | >; |
| 210 | }; |
Dave Gerlach | 278e7ac | 2021-04-23 11:27:46 -0500 | [diff] [blame] | 211 | }; |
| 212 | |
| 213 | &dmsc { |
| 214 | mboxes= <&secure_proxy_main 0>, |
| 215 | <&secure_proxy_main 1>, |
| 216 | <&secure_proxy_main 0>; |
| 217 | mbox-names = "rx", "tx", "notify"; |
| 218 | ti,host-id = <35>; |
| 219 | ti,secure-host; |
| 220 | }; |
| 221 | |
| 222 | &main_uart0 { |
| 223 | /delete-property/ power-domains; |
| 224 | /delete-property/ clocks; |
| 225 | /delete-property/ clock-names; |
| 226 | pinctrl-names = "default"; |
| 227 | pinctrl-0 = <&main_uart0_pins_default>; |
| 228 | status = "okay"; |
| 229 | }; |
| 230 | |
| 231 | &main_uart1 { |
Simon Glass | d3a98cb | 2023-02-13 08:56:33 -0700 | [diff] [blame] | 232 | bootph-pre-ram; |
Dave Gerlach | 278e7ac | 2021-04-23 11:27:46 -0500 | [diff] [blame] | 233 | pinctrl-names = "default"; |
| 234 | pinctrl-0 = <&main_uart1_pins_default>; |
| 235 | }; |
| 236 | |
Nishanth Menon | d6a453c | 2021-05-04 18:00:55 -0500 | [diff] [blame] | 237 | &memorycontroller { |
| 238 | vtt-supply = <&vtt_supply>; |
| 239 | pinctrl-names = "default"; |
| 240 | pinctrl-0 = <&ddr_vtt_pins_default>; |
| 241 | }; |
| 242 | |
Dave Gerlach | 278e7ac | 2021-04-23 11:27:46 -0500 | [diff] [blame] | 243 | &sdhci0 { |
| 244 | /delete-property/ power-domains; |
| 245 | clocks = <&clk_200mhz>; |
| 246 | clock-names = "clk_xin"; |
| 247 | ti,driver-strength-ohm = <50>; |
| 248 | disable-wp; |
| 249 | pinctrl-0 = <&main_mmc0_pins_default>; |
| 250 | }; |
| 251 | |
| 252 | &sdhci1 { |
| 253 | /delete-property/ power-domains; |
| 254 | clocks = <&clk_200mhz>; |
| 255 | clock-names = "clk_xin"; |
| 256 | ti,driver-strength-ohm = <50>; |
| 257 | disable-wp; |
| 258 | pinctrl-0 = <&main_mmc1_pins_default>; |
| 259 | }; |
| 260 | |
Nishanth Menon | d6a453c | 2021-05-04 18:00:55 -0500 | [diff] [blame] | 261 | &main_gpio0 { |
Simon Glass | d3a98cb | 2023-02-13 08:56:33 -0700 | [diff] [blame] | 262 | bootph-pre-ram; |
Nishanth Menon | d6a453c | 2021-05-04 18:00:55 -0500 | [diff] [blame] | 263 | /delete-property/ power-domains; |
| 264 | }; |
| 265 | |
Lokesh Vutla | e1c5a5d | 2021-05-06 16:44:57 +0530 | [diff] [blame] | 266 | /* EEPROM might be read before SYSFW is available */ |
| 267 | &main_i2c0 { |
| 268 | /delete-property/ power-domains; |
| 269 | }; |
| 270 | |
Aswath Govindraju | 0b2481e | 2021-06-04 22:00:36 +0530 | [diff] [blame] | 271 | &usbss0 { |
| 272 | ti,vbus-divider; |
| 273 | ti,usb2-only; |
| 274 | }; |
| 275 | |
| 276 | &usb0 { |
| 277 | dr_mode = "otg"; |
| 278 | maximum-speed = "high-speed"; |
| 279 | pinctrl-names = "default"; |
| 280 | pinctrl-0 = <&main_usb0_pins_default>; |
| 281 | }; |
| 282 | |
Dave Gerlach | 278e7ac | 2021-04-23 11:27:46 -0500 | [diff] [blame] | 283 | #include "k3-am642-evm-u-boot.dtsi" |