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Masahiro Yamada1b0a06b2014-11-07 18:48:31 +09001#
2# USB Host Controller Drivers
3#
4comment "USB Host Controller Drivers"
5
Masahiro Yamada59cfdc02016-08-01 00:16:34 +09006config USB_HOST
7 bool
8
Masahiro Yamada1b0a06b2014-11-07 18:48:31 +09009config USB_XHCI_HCD
10 bool "xHCI HCD (USB 3.0) support"
Masahiro Yamada59cfdc02016-08-01 00:16:34 +090011 select USB_HOST
Masahiro Yamada1b0a06b2014-11-07 18:48:31 +090012 ---help---
13 The eXtensible Host Controller Interface (xHCI) is standard for USB 3.0
14 "SuperSpeed" host controller hardware.
15
Masahiro Yamada1b0a06b2014-11-07 18:48:31 +090016if USB_XHCI_HCD
17
Masahiro Yamadad3b72ca2016-06-04 07:35:04 +090018config USB_XHCI_DWC3
19 bool "DesignWare USB3 DRD Core Support"
20 help
21 Say Y or if your system has a Dual Role SuperSpeed
22 USB controller based on the DesignWare USB3 IP Core.
23
Stefan Roese07faf112016-07-14 11:39:20 +020024config USB_XHCI_MVEBU
25 bool "MVEBU USB 3.0 support"
26 default y
27 depends on ARCH_MVEBU
Konstantin Porotchkin1b5ed4d2017-02-12 11:10:30 +020028 select DM_REGULATOR
Stefan Roese07faf112016-07-14 11:39:20 +020029 help
30 Choose this option to add support for USB 3.0 driver on mvebu
31 SoCs, which includes Armada8K, Armada3700 and other Armada
32 family SoCs.
33
Bin Mengd34d6fc2017-07-19 21:50:08 +080034config USB_XHCI_PCI
35 bool "Support for PCI-based xHCI USB controller"
Bin Meng7e8644d2017-07-19 21:51:07 +080036 depends on DM_USB
Bin Mengd34d6fc2017-07-19 21:50:08 +080037 default y if X86
38 help
39 Enables support for the PCI-based xHCI controller.
40
Kever Yang84e841b2016-09-21 11:35:42 +080041config USB_XHCI_ROCKCHIP
42 bool "Support for Rockchip on-chip xHCI USB controller"
43 depends on ARCH_ROCKCHIP
Meng Dongyangc1a15502017-06-28 19:22:39 +080044 depends on DM_REGULATOR
45 depends on DM_USB
Kever Yang84e841b2016-09-21 11:35:42 +080046 default y
47 help
48 Enables support for the on-chip xHCI controller on Rockchip SoCs.
49
Patrice Chotardf2505b12017-09-05 11:04:24 +020050config USB_XHCI_STI
51 bool "Support for STMicroelectronics STiH407 family on-chip xHCI USB controller"
52 depends on ARCH_STI
53 default y
54 help
55 Enables support for the on-chip xHCI controller on STMicroelectronics
56 STiH407 family SoCs. This is a driver for the dwc3 to provide the glue logic
57 to configure the controller.
58
Michal Simek4e2465d2016-12-21 14:18:31 +010059config USB_XHCI_ZYNQMP
60 bool "Support for Xilinx ZynqMP on-chip xHCI USB controller"
61 depends on ARCH_ZYNQMP
62 help
63 Enables support for the on-chip xHCI controller on Xilinx ZynqMP SoCs.
64
Uri Mashiachf6ff74e2017-02-23 15:39:36 +020065config USB_XHCI_DRA7XX_INDEX
66 int "DRA7XX xHCI USB index"
67 range 0 1
68 default 0
69 depends on DRA7XX
70 help
71 Select the DRA7XX xHCI USB index.
72 Current supported values: 0, 1.
73
Masahiro Yamada78a9c792016-08-01 00:16:32 +090074endif # USB_XHCI_HCD
Alexey Brodkin83fd3122015-12-14 17:18:50 +030075
Masahiro Yamada1b0a06b2014-11-07 18:48:31 +090076config USB_EHCI_HCD
77 bool "EHCI HCD (USB 2.0) support"
Tom Rini7716cd62017-05-12 22:33:28 -040078 default y if ARCH_MX5 || ARCH_MX6
Masahiro Yamada59cfdc02016-08-01 00:16:34 +090079 select USB_HOST
Masahiro Yamada1b0a06b2014-11-07 18:48:31 +090080 ---help---
81 The Enhanced Host Controller Interface (EHCI) is standard for USB 2.0
82 "high speed" (480 Mbit/sec, 60 Mbyte/sec) host controller hardware.
83 If your USB host controller supports USB 2.0, you will likely want to
84 configure this Host Controller Driver.
85
86 EHCI controllers are packaged with "companion" host controllers (OHCI
87 or UHCI) to handle USB 1.1 devices connected to root hub ports. Ports
88 will connect to EHCI if the device is high speed, otherwise they
89 connect to a companion controller. If you configure EHCI, you should
90 probably configure the OHCI (for NEC and some other vendors) USB Host
91 Controller Driver or UHCI (for Via motherboards) Host Controller
92 Driver too.
93
94 You may want to read <file:Documentation/usb/ehci.txt>.
95
Masahiro Yamada1b0a06b2014-11-07 18:48:31 +090096if USB_EHCI_HCD
97
Wenyou Yang11e26652016-08-05 08:57:35 +080098config USB_EHCI_ATMEL
99 bool "Support for Atmel on-chip EHCI USB controller"
100 depends on ARCH_AT91
101 default y
102 ---help---
103 Enables support for the on-chip EHCI controller on Atmel chips.
104
Stefan Roese03901022015-09-01 11:39:44 +0200105config USB_EHCI_MARVELL
Tom Rini496a4172017-05-12 22:33:29 -0400106 bool "Support for Marvell on-chip EHCI USB controller"
107 depends on ARCH_MVEBU || KIRKWOOD || ORION5X
Stefan Roese03901022015-09-01 11:39:44 +0200108 default y
109 ---help---
110 Enables support for the on-chip EHCI controller on MVEBU SoCs.
111
Nikita Kiryanov99241032015-07-23 17:19:35 +0300112config USB_EHCI_MX6
113 bool "Support for i.MX6 on-chip EHCI USB controller"
114 depends on ARCH_MX6
115 default y
116 ---help---
117 Enables support for the on-chip EHCI controller on i.MX6 SoCs.
118
Stefan Agner100fe072016-07-13 00:25:36 -0700119config USB_EHCI_MX7
120 bool "Support for i.MX7 on-chip EHCI USB controller"
121 depends on ARCH_MX7
122 default y
123 ---help---
124 Enables support for the on-chip EHCI controller on i.MX7 SoCs.
125
Tom Rini639a8402017-05-12 22:33:30 -0400126config USB_EHCI_OMAP
127 bool "Support for OMAP3+ on-chip EHCI USB controller"
128 depends on ARCH_OMAP2PLUS
129 default y
130 ---help---
131 Enables support for the on-chip EHCI controller on OMAP3 and later
132 SoCs.
133
Stefan Agner8652ce92016-07-13 00:25:38 -0700134if USB_EHCI_MX7
135
136config MXC_USB_OTG_HACTIVE
137 bool "USB Power pin high active"
138 ---help---
139 Set the USB Power pin polarity to be high active (PWR_POL)
140
141endif
142
Mateusz Kulikowskidc381172016-03-31 23:12:26 +0200143config USB_EHCI_MSM
144 bool "Support for Qualcomm on-chip EHCI USB controller"
145 depends on DM_USB
146 select USB_ULPI_VIEWPORT
147 default n
148 ---help---
149 Enables support for the on-chip EHCI controller on Qualcomm
150 Snapdragon SoCs.
151 This driver supports combination of Chipidea USB controller
152 and Synapsys USB PHY in host mode only.
153
Bin Mengec4b5732017-08-09 00:21:54 -0700154config USB_EHCI_PCI
155 bool "Support for PCI-based EHCI USB controller"
156 default y if X86
157 help
158 Enables support for the PCI-based EHCI controller.
159
Siva Durga Prasad Paladugu42fcc182016-07-22 14:51:51 +0530160config USB_EHCI_ZYNQ
161 bool "Support for Xilinx Zynq on-chip EHCI USB controller"
162 depends on ARCH_ZYNQ
163 default y
164 ---help---
165 Enable support for Zynq on-chip EHCI USB controller
166
Alexey Brodkina6aff432015-12-02 12:32:02 +0300167config USB_EHCI_GENERIC
168 bool "Support for generic EHCI USB controller"
169 depends on OF_CONTROL
170 depends on DM_USB
171 default n
172 ---help---
173 Enables support for generic EHCI controller.
174
Masahiro Yamada78a9c792016-08-01 00:16:32 +0900175endif # USB_EHCI_HCD
176
177config USB_OHCI_HCD
178 bool "OHCI HCD (USB 1.1) support"
179 ---help---
180 The Open Host Controller Interface (OHCI) is a standard for accessing
181 USB 1.1 host controller hardware. It does more in hardware than Intel's
182 UHCI specification. If your USB host controller follows the OHCI spec,
183 say Y. On most non-x86 systems, and on x86 hardware that's not using a
184 USB controller from Intel or VIA, this is appropriate. If your host
185 controller doesn't use PCI, this is probably appropriate. For a PCI
186 based system where you're not sure, the "lspci -v" entry will list the
187 right "prog-if" for your USB controller(s): EHCI, OHCI, or UHCI.
188
189if USB_OHCI_HCD
190
191config USB_OHCI_GENERIC
192 bool "Support for generic OHCI USB controller"
193 depends on OF_CONTROL
194 depends on DM_USB
Masahiro Yamada59cfdc02016-08-01 00:16:34 +0900195 select USB_HOST
Masahiro Yamada78a9c792016-08-01 00:16:32 +0900196 ---help---
197 Enables support for generic OHCI controller.
198
199endif # USB_OHCI_HCD
Masahiro Yamada718ba3c2016-08-01 00:16:33 +0900200
201config USB_UHCI_HCD
202 bool "UHCI HCD (most Intel and VIA) support"
Masahiro Yamada59cfdc02016-08-01 00:16:34 +0900203 select USB_HOST
Masahiro Yamada718ba3c2016-08-01 00:16:33 +0900204 ---help---
205 The Universal Host Controller Interface is a standard by Intel for
206 accessing the USB hardware in the PC (which is also called the USB
207 host controller). If your USB host controller conforms to this
208 standard, you may want to say Y, but see below. All recent boards
209 with Intel PCI chipsets (like intel 430TX, 440FX, 440LX, 440BX,
210 i810, i820) conform to this standard. Also all VIA PCI chipsets
211 (like VIA VP2, VP3, MVP3, Apollo Pro, Apollo Pro II or Apollo Pro
212 133) and LEON/GRLIB SoCs with the GRUSBHC controller.
213 If unsure, say Y.
214
215if USB_UHCI_HCD
216
217endif # USB_UHCI_HCD
Philipp Tomsich54983812017-07-03 18:30:06 +0200218
219config USB_DWC2
220 bool "DesignWare USB2 Core support"
221 select USB_HOST
222 ---help---
223 The DesignWare USB 2.0 controller is compliant with the
224 USB-Implementers Forum (USB-IF) USB 2.0 specifications.
225 Hi-Speed (480 Mbps), Full-Speed (12 Mbps), and Low-Speed (1.5 Mbps)
226 operation is compliant to the controller Supplement. If you want to
227 enable this controller in host mode, say Y.