blob: 511113f2e39928ed337d2d0484c9f66ff611fd59 [file] [log] [blame]
Patrick Delaunay48c5e902020-03-06 17:54:41 +01001// SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause)
2/*
3 * Copyright (C) STMicroelectronics 2019 - All Rights Reserved
4 * Author: Alexandre Torgue <alexandre.torgue@st.com> for STMicroelectronics.
5 */
6
7#include <dt-bindings/gpio/gpio.h>
8#include <dt-bindings/mfd/st,stpmic1.h>
9
10/ {
Patrick Delaunay4597d262023-07-10 10:38:45 +020011 aliases {
12 serial0 = &uart4;
13 serial1 = &usart3;
14 serial2 = &uart7;
15 };
16
Patrick Delaunay48c5e902020-03-06 17:54:41 +010017 memory@c0000000 {
18 device_type = "memory";
19 reg = <0xc0000000 0x20000000>;
20 };
21
22 reserved-memory {
23 #address-cells = <1>;
24 #size-cells = <1>;
25 ranges;
26
27 mcuram2: mcuram2@10000000 {
28 compatible = "shared-dma-pool";
29 reg = <0x10000000 0x40000>;
30 no-map;
31 };
32
33 vdev0vring0: vdev0vring0@10040000 {
34 compatible = "shared-dma-pool";
35 reg = <0x10040000 0x1000>;
36 no-map;
37 };
38
39 vdev0vring1: vdev0vring1@10041000 {
40 compatible = "shared-dma-pool";
41 reg = <0x10041000 0x1000>;
42 no-map;
43 };
44
45 vdev0buffer: vdev0buffer@10042000 {
46 compatible = "shared-dma-pool";
47 reg = <0x10042000 0x4000>;
48 no-map;
49 };
50
51 mcuram: mcuram@30000000 {
52 compatible = "shared-dma-pool";
53 reg = <0x30000000 0x40000>;
54 no-map;
55 };
56
57 retram: retram@38000000 {
58 compatible = "shared-dma-pool";
59 reg = <0x38000000 0x10000>;
60 no-map;
61 };
Patrick Delaunay48c5e902020-03-06 17:54:41 +010062 };
63
64 led {
65 compatible = "gpio-leds";
Patrick Delaunay551efca2020-09-16 10:01:32 +020066 led-blue {
Patrick Delaunay48c5e902020-03-06 17:54:41 +010067 label = "heartbeat";
68 gpios = <&gpiod 11 GPIO_ACTIVE_HIGH>;
69 linux,default-trigger = "heartbeat";
70 default-state = "off";
71 };
72 };
73
74 sound {
75 compatible = "audio-graph-card";
Patrick Delaunay7f2cba42023-04-24 16:21:10 +020076 label = "STM32MP15-DK";
Patrick Delaunay48c5e902020-03-06 17:54:41 +010077 routing =
78 "Playback" , "MCLK",
79 "Capture" , "MCLK",
80 "MICL" , "Mic Bias";
81 dais = <&sai2a_port &sai2b_port &i2s2_port>;
82 status = "okay";
83 };
Patrick Delaunay6d397052021-01-11 12:33:36 +010084
85 vin: vin {
86 compatible = "regulator-fixed";
87 regulator-name = "vin";
88 regulator-min-microvolt = <5000000>;
89 regulator-max-microvolt = <5000000>;
90 regulator-always-on;
91 };
Patrick Delaunay48c5e902020-03-06 17:54:41 +010092};
93
94&adc {
95 pinctrl-names = "default";
Patrice Chotard02d88c02023-09-26 17:09:18 +020096 pinctrl-0 = <&adc12_usb_cc_pins_a>;
Patrick Delaunay48c5e902020-03-06 17:54:41 +010097 vdd-supply = <&vdd>;
98 vdda-supply = <&vdd>;
99 vref-supply = <&vrefbuf>;
Patrice Chotard02d88c02023-09-26 17:09:18 +0200100 status = "okay";
Patrick Delaunay48c5e902020-03-06 17:54:41 +0100101 adc1: adc@0 {
Patrice Chotard02d88c02023-09-26 17:09:18 +0200102 status = "okay";
Patrick Delaunay48c5e902020-03-06 17:54:41 +0100103 /*
104 * Type-C USB_PWR_CC1 & USB_PWR_CC2 on in18 & in19.
105 * Use at least 5 * RC time, e.g. 5 * (Rp + Rd) * C:
106 * 5 * (56 + 47kOhms) * 5pF => 2.5us.
107 * Use arbitrary margin here (e.g. 5us).
108 */
Patrice Chotard02d88c02023-09-26 17:09:18 +0200109 channel@18 {
110 reg = <18>;
111 st,min-sample-time-ns = <5000>;
112 };
113 channel@19 {
114 reg = <19>;
115 st,min-sample-time-ns = <5000>;
116 };
Patrick Delaunay48c5e902020-03-06 17:54:41 +0100117 };
118 adc2: adc@100 {
Patrick Delaunay48c5e902020-03-06 17:54:41 +0100119 status = "okay";
Patrice Chotard02d88c02023-09-26 17:09:18 +0200120 /* USB Type-C CC1 & CC2 */
121 channel@18 {
122 reg = <18>;
123 st,min-sample-time-ns = <5000>;
124 };
125 channel@19 {
126 reg = <19>;
127 st,min-sample-time-ns = <5000>;
128 };
Patrick Delaunay48c5e902020-03-06 17:54:41 +0100129 };
130};
131
132&cec {
133 pinctrl-names = "default", "sleep";
134 pinctrl-0 = <&cec_pins_b>;
Patrick Delaunaycdc2ca12020-07-06 13:26:53 +0200135 pinctrl-1 = <&cec_sleep_pins_b>;
Patrick Delaunay48c5e902020-03-06 17:54:41 +0100136 status = "okay";
137};
138
Patrick Delaunay6d397052021-01-11 12:33:36 +0100139&crc1 {
140 status = "okay";
141};
142
Patrick Delaunaycdc2ca12020-07-06 13:26:53 +0200143&dts {
144 status = "okay";
145};
146
Patrick Delaunay48c5e902020-03-06 17:54:41 +0100147&ethernet0 {
148 status = "okay";
149 pinctrl-0 = <&ethernet0_rgmii_pins_a>;
Patrick Delaunaycdc2ca12020-07-06 13:26:53 +0200150 pinctrl-1 = <&ethernet0_rgmii_sleep_pins_a>;
Patrick Delaunay48c5e902020-03-06 17:54:41 +0100151 pinctrl-names = "default", "sleep";
152 phy-mode = "rgmii-id";
153 max-speed = <1000>;
154 phy-handle = <&phy0>;
155
Patrick Delaunay7f2cba42023-04-24 16:21:10 +0200156 mdio {
Patrick Delaunay48c5e902020-03-06 17:54:41 +0100157 #address-cells = <1>;
158 #size-cells = <0>;
159 compatible = "snps,dwmac-mdio";
160 phy0: ethernet-phy@0 {
161 reg = <0>;
162 };
163 };
164};
165
Patrick Delaunay6d397052021-01-11 12:33:36 +0100166&hash1 {
167 status = "okay";
168};
169
Patrick Delaunay48c5e902020-03-06 17:54:41 +0100170&i2c1 {
171 pinctrl-names = "default", "sleep";
172 pinctrl-0 = <&i2c1_pins_a>;
Patrick Delaunaycdc2ca12020-07-06 13:26:53 +0200173 pinctrl-1 = <&i2c1_sleep_pins_a>;
Patrick Delaunay48c5e902020-03-06 17:54:41 +0100174 i2c-scl-rising-time-ns = <100>;
175 i2c-scl-falling-time-ns = <7>;
176 status = "okay";
177 /delete-property/dmas;
178 /delete-property/dma-names;
179
180 hdmi-transmitter@39 {
181 compatible = "sil,sii9022";
182 reg = <0x39>;
183 iovcc-supply = <&v3v3_hdmi>;
184 cvcc12-supply = <&v1v2_hdmi>;
185 reset-gpios = <&gpioa 10 GPIO_ACTIVE_LOW>;
186 interrupts = <1 IRQ_TYPE_EDGE_FALLING>;
187 interrupt-parent = <&gpiog>;
188 #sound-dai-cells = <0>;
189 status = "okay";
190
191 ports {
192 #address-cells = <1>;
193 #size-cells = <0>;
194
195 port@0 {
196 reg = <0>;
197 sii9022_in: endpoint {
198 remote-endpoint = <&ltdc_ep0_out>;
199 };
200 };
201
202 port@3 {
203 reg = <3>;
204 sii9022_tx_endpoint: endpoint {
205 remote-endpoint = <&i2s2_endpoint>;
206 };
207 };
208 };
209 };
210
211 cs42l51: cs42l51@4a {
212 compatible = "cirrus,cs42l51";
213 reg = <0x4a>;
214 #sound-dai-cells = <0>;
215 VL-supply = <&v3v3>;
216 VD-supply = <&v1v8_audio>;
217 VA-supply = <&v1v8_audio>;
218 VAHP-supply = <&v1v8_audio>;
219 reset-gpios = <&gpiog 9 GPIO_ACTIVE_LOW>;
220 clocks = <&sai2a>;
221 clock-names = "MCLK";
222 status = "okay";
223
224 cs42l51_port: port {
225 #address-cells = <1>;
226 #size-cells = <0>;
227
228 cs42l51_tx_endpoint: endpoint@0 {
229 reg = <0>;
230 remote-endpoint = <&sai2a_endpoint>;
Patrick Delaunayc4c5c5f2021-10-21 11:54:11 +0200231 frame-master = <&cs42l51_tx_endpoint>;
232 bitclock-master = <&cs42l51_tx_endpoint>;
Patrick Delaunay48c5e902020-03-06 17:54:41 +0100233 };
234
235 cs42l51_rx_endpoint: endpoint@1 {
236 reg = <1>;
237 remote-endpoint = <&sai2b_endpoint>;
Patrick Delaunayc4c5c5f2021-10-21 11:54:11 +0200238 frame-master = <&cs42l51_rx_endpoint>;
239 bitclock-master = <&cs42l51_rx_endpoint>;
Patrick Delaunay48c5e902020-03-06 17:54:41 +0100240 };
241 };
242 };
243};
244
245&i2c4 {
Patrick Delaunaydf0d20a2020-04-30 15:52:46 +0200246 pinctrl-names = "default", "sleep";
Patrick Delaunay48c5e902020-03-06 17:54:41 +0100247 pinctrl-0 = <&i2c4_pins_a>;
Patrick Delaunaycdc2ca12020-07-06 13:26:53 +0200248 pinctrl-1 = <&i2c4_sleep_pins_a>;
Patrick Delaunay48c5e902020-03-06 17:54:41 +0100249 i2c-scl-rising-time-ns = <185>;
250 i2c-scl-falling-time-ns = <20>;
Patrick Delaunaydf0d20a2020-04-30 15:52:46 +0200251 clock-frequency = <400000>;
Patrick Delaunay48c5e902020-03-06 17:54:41 +0100252 status = "okay";
253 /* spare dmas for other usage */
254 /delete-property/dmas;
255 /delete-property/dma-names;
256
Patrick Delaunay6d397052021-01-11 12:33:36 +0100257 stusb1600@28 {
Patrick Delaunay48c5e902020-03-06 17:54:41 +0100258 compatible = "st,stusb1600";
259 reg = <0x28>;
Patrick Delaunay37868aa2021-12-17 16:30:22 +0100260 interrupts = <11 IRQ_TYPE_LEVEL_LOW>;
Patrick Delaunay48c5e902020-03-06 17:54:41 +0100261 interrupt-parent = <&gpioi>;
262 pinctrl-names = "default";
263 pinctrl-0 = <&stusb1600_pins_a>;
Patrick Delaunay48c5e902020-03-06 17:54:41 +0100264 status = "okay";
Patrick Delaunay6d397052021-01-11 12:33:36 +0100265 vdd-supply = <&vin>;
Patrick Delaunay48c5e902020-03-06 17:54:41 +0100266
Patrick Delaunay6d397052021-01-11 12:33:36 +0100267 connector {
Patrick Delaunay48c5e902020-03-06 17:54:41 +0100268 compatible = "usb-c-connector";
269 label = "USB-C";
Patrick Delaunay6d397052021-01-11 12:33:36 +0100270 power-role = "dual";
271 typec-power-opmode = "default";
272
273 port {
274 con_usbotg_hs_ep: endpoint {
275 remote-endpoint = <&usbotg_hs_ep>;
276 };
277 };
Patrick Delaunay48c5e902020-03-06 17:54:41 +0100278 };
279 };
280
281 pmic: stpmic@33 {
282 compatible = "st,stpmic1";
283 reg = <0x33>;
284 interrupts-extended = <&gpioa 0 IRQ_TYPE_EDGE_FALLING>;
285 interrupt-controller;
286 #interrupt-cells = <2>;
287 status = "okay";
288
289 regulators {
290 compatible = "st,stpmic1-regulators";
Patrick Delaunay6d397052021-01-11 12:33:36 +0100291 buck1-supply = <&vin>;
292 buck2-supply = <&vin>;
293 buck3-supply = <&vin>;
294 buck4-supply = <&vin>;
Patrick Delaunay48c5e902020-03-06 17:54:41 +0100295 ldo1-supply = <&v3v3>;
Patrick Delaunay6d397052021-01-11 12:33:36 +0100296 ldo2-supply = <&vin>;
Patrick Delaunay48c5e902020-03-06 17:54:41 +0100297 ldo3-supply = <&vdd_ddr>;
Patrick Delaunay6d397052021-01-11 12:33:36 +0100298 ldo4-supply = <&vin>;
299 ldo5-supply = <&vin>;
Patrick Delaunay48c5e902020-03-06 17:54:41 +0100300 ldo6-supply = <&v3v3>;
Patrick Delaunay6d397052021-01-11 12:33:36 +0100301 vref_ddr-supply = <&vin>;
302 boost-supply = <&vin>;
Patrick Delaunay48c5e902020-03-06 17:54:41 +0100303 pwr_sw1-supply = <&bst_out>;
304 pwr_sw2-supply = <&bst_out>;
305
306 vddcore: buck1 {
307 regulator-name = "vddcore";
308 regulator-min-microvolt = <1200000>;
309 regulator-max-microvolt = <1350000>;
310 regulator-always-on;
311 regulator-initial-mode = <0>;
312 regulator-over-current-protection;
313 };
314
315 vdd_ddr: buck2 {
316 regulator-name = "vdd_ddr";
317 regulator-min-microvolt = <1350000>;
318 regulator-max-microvolt = <1350000>;
319 regulator-always-on;
320 regulator-initial-mode = <0>;
321 regulator-over-current-protection;
322 };
323
324 vdd: buck3 {
325 regulator-name = "vdd";
326 regulator-min-microvolt = <3300000>;
327 regulator-max-microvolt = <3300000>;
328 regulator-always-on;
329 st,mask-reset;
330 regulator-initial-mode = <0>;
331 regulator-over-current-protection;
332 };
333
334 v3v3: buck4 {
335 regulator-name = "v3v3";
336 regulator-min-microvolt = <3300000>;
337 regulator-max-microvolt = <3300000>;
338 regulator-always-on;
339 regulator-over-current-protection;
340 regulator-initial-mode = <0>;
341 };
342
343 v1v8_audio: ldo1 {
344 regulator-name = "v1v8_audio";
345 regulator-min-microvolt = <1800000>;
346 regulator-max-microvolt = <1800000>;
347 regulator-always-on;
348 interrupts = <IT_CURLIM_LDO1 0>;
349 };
350
351 v3v3_hdmi: ldo2 {
352 regulator-name = "v3v3_hdmi";
353 regulator-min-microvolt = <3300000>;
354 regulator-max-microvolt = <3300000>;
355 regulator-always-on;
356 interrupts = <IT_CURLIM_LDO2 0>;
357 };
358
359 vtt_ddr: ldo3 {
360 regulator-name = "vtt_ddr";
361 regulator-min-microvolt = <500000>;
362 regulator-max-microvolt = <750000>;
363 regulator-always-on;
364 regulator-over-current-protection;
365 };
366
367 vdd_usb: ldo4 {
368 regulator-name = "vdd_usb";
Patrick Delaunay48c5e902020-03-06 17:54:41 +0100369 interrupts = <IT_CURLIM_LDO4 0>;
370 };
371
372 vdda: ldo5 {
373 regulator-name = "vdda";
374 regulator-min-microvolt = <2900000>;
375 regulator-max-microvolt = <2900000>;
376 interrupts = <IT_CURLIM_LDO5 0>;
377 regulator-boot-on;
378 };
379
380 v1v2_hdmi: ldo6 {
381 regulator-name = "v1v2_hdmi";
382 regulator-min-microvolt = <1200000>;
383 regulator-max-microvolt = <1200000>;
384 regulator-always-on;
385 interrupts = <IT_CURLIM_LDO6 0>;
386 };
387
388 vref_ddr: vref_ddr {
389 regulator-name = "vref_ddr";
390 regulator-always-on;
Patrick Delaunay48c5e902020-03-06 17:54:41 +0100391 };
392
Patrick Delaunay5be6a7f2022-12-14 16:25:00 +0100393 bst_out: boost {
Patrick Delaunay48c5e902020-03-06 17:54:41 +0100394 regulator-name = "bst_out";
395 interrupts = <IT_OCP_BOOST 0>;
Patrick Delaunay5be6a7f2022-12-14 16:25:00 +0100396 };
Patrick Delaunay48c5e902020-03-06 17:54:41 +0100397
398 vbus_otg: pwr_sw1 {
399 regulator-name = "vbus_otg";
400 interrupts = <IT_OCP_OTG 0>;
Patrick Delaunay5be6a7f2022-12-14 16:25:00 +0100401 };
Patrick Delaunay48c5e902020-03-06 17:54:41 +0100402
Patrick Delaunay5be6a7f2022-12-14 16:25:00 +0100403 vbus_sw: pwr_sw2 {
Patrick Delaunay48c5e902020-03-06 17:54:41 +0100404 regulator-name = "vbus_sw";
405 interrupts = <IT_OCP_SWOUT 0>;
406 regulator-active-discharge = <1>;
Patrick Delaunay5be6a7f2022-12-14 16:25:00 +0100407 };
Patrick Delaunay48c5e902020-03-06 17:54:41 +0100408 };
409
410 onkey {
411 compatible = "st,stpmic1-onkey";
412 interrupts = <IT_PONKEY_F 0>, <IT_PONKEY_R 0>;
413 interrupt-names = "onkey-falling", "onkey-rising";
414 power-off-time-sec = <10>;
415 status = "okay";
416 };
417
418 watchdog {
419 compatible = "st,stpmic1-wdt";
420 status = "disabled";
421 };
422 };
423};
424
Patrick Delaunay551efca2020-09-16 10:01:32 +0200425&i2c5 {
426 pinctrl-names = "default", "sleep";
427 pinctrl-0 = <&i2c5_pins_a>;
428 pinctrl-1 = <&i2c5_sleep_pins_a>;
429 i2c-scl-rising-time-ns = <185>;
430 i2c-scl-falling-time-ns = <20>;
431 clock-frequency = <400000>;
432 /* spare dmas for other usage */
433 /delete-property/dmas;
434 /delete-property/dma-names;
435 status = "disabled";
436};
437
Patrick Delaunay48c5e902020-03-06 17:54:41 +0100438&i2s2 {
439 clocks = <&rcc SPI2>, <&rcc SPI2_K>, <&rcc PLL3_Q>, <&rcc PLL3_R>;
440 clock-names = "pclk", "i2sclk", "x8k", "x11k";
441 pinctrl-names = "default", "sleep";
442 pinctrl-0 = <&i2s2_pins_a>;
Patrick Delaunaycdc2ca12020-07-06 13:26:53 +0200443 pinctrl-1 = <&i2s2_sleep_pins_a>;
Patrick Delaunay48c5e902020-03-06 17:54:41 +0100444 status = "okay";
445
446 i2s2_port: port {
447 i2s2_endpoint: endpoint {
448 remote-endpoint = <&sii9022_tx_endpoint>;
Patrice Chotard02d88c02023-09-26 17:09:18 +0200449 dai-format = "i2s";
Patrick Delaunay48c5e902020-03-06 17:54:41 +0100450 mclk-fs = <256>;
451 };
452 };
453};
454
455&ipcc {
456 status = "okay";
457};
458
459&iwdg2 {
460 timeout-sec = <32>;
461 status = "okay";
462};
463
464&ltdc {
465 pinctrl-names = "default", "sleep";
466 pinctrl-0 = <&ltdc_pins_a>;
Patrick Delaunaycdc2ca12020-07-06 13:26:53 +0200467 pinctrl-1 = <&ltdc_sleep_pins_a>;
Patrick Delaunay48c5e902020-03-06 17:54:41 +0100468 status = "okay";
469
470 port {
Patrice Chotard02d88c02023-09-26 17:09:18 +0200471 ltdc_ep0_out: endpoint {
Patrick Delaunay48c5e902020-03-06 17:54:41 +0100472 remote-endpoint = <&sii9022_in>;
473 };
474 };
475};
476
477&m4_rproc {
478 memory-region = <&retram>, <&mcuram>, <&mcuram2>, <&vdev0vring0>,
479 <&vdev0vring1>, <&vdev0buffer>;
Patrick Delaunayc4c5c5f2021-10-21 11:54:11 +0200480 mboxes = <&ipcc 0>, <&ipcc 1>, <&ipcc 2>, <&ipcc 3>;
481 mbox-names = "vq0", "vq1", "shutdown", "detach";
Patrick Delaunay48c5e902020-03-06 17:54:41 +0100482 interrupt-parent = <&exti>;
483 interrupts = <68 1>;
484 status = "okay";
485};
486
487&pwr_regulators {
488 vdd-supply = <&vdd>;
489 vdd_3v3_usbfs-supply = <&vdd_usb>;
490};
491
492&rng1 {
493 status = "okay";
494};
495
496&rtc {
497 status = "okay";
498};
499
500&sai2 {
501 clocks = <&rcc SAI2>, <&rcc PLL3_Q>, <&rcc PLL3_R>;
502 clock-names = "pclk", "x8k", "x11k";
503 pinctrl-names = "default", "sleep";
504 pinctrl-0 = <&sai2a_pins_a>, <&sai2b_pins_b>;
505 pinctrl-1 = <&sai2a_sleep_pins_a>, <&sai2b_sleep_pins_b>;
506 status = "okay";
507
508 sai2a: audio-controller@4400b004 {
509 #clock-cells = <0>;
510 dma-names = "tx";
Patrick Delaunay48c5e902020-03-06 17:54:41 +0100511 status = "okay";
512
513 sai2a_port: port {
514 sai2a_endpoint: endpoint {
515 remote-endpoint = <&cs42l51_tx_endpoint>;
Patrick Delaunay7f2cba42023-04-24 16:21:10 +0200516 dai-format = "i2s";
Patrick Delaunay48c5e902020-03-06 17:54:41 +0100517 mclk-fs = <256>;
518 dai-tdm-slot-num = <2>;
519 dai-tdm-slot-width = <32>;
520 };
521 };
522 };
523
524 sai2b: audio-controller@4400b024 {
525 dma-names = "rx";
526 st,sync = <&sai2a 2>;
527 clocks = <&rcc SAI2_K>, <&sai2a>;
528 clock-names = "sai_ck", "MCLK";
529 status = "okay";
530
531 sai2b_port: port {
532 sai2b_endpoint: endpoint {
533 remote-endpoint = <&cs42l51_rx_endpoint>;
Patrick Delaunay7f2cba42023-04-24 16:21:10 +0200534 dai-format = "i2s";
Patrick Delaunay48c5e902020-03-06 17:54:41 +0100535 mclk-fs = <256>;
536 dai-tdm-slot-num = <2>;
537 dai-tdm-slot-width = <32>;
538 };
539 };
540 };
541};
542
543&sdmmc1 {
544 pinctrl-names = "default", "opendrain", "sleep";
545 pinctrl-0 = <&sdmmc1_b4_pins_a>;
546 pinctrl-1 = <&sdmmc1_b4_od_pins_a>;
547 pinctrl-2 = <&sdmmc1_b4_sleep_pins_a>;
Patrick Delaunaydf0d20a2020-04-30 15:52:46 +0200548 cd-gpios = <&gpiob 7 (GPIO_ACTIVE_LOW | GPIO_PULL_UP)>;
549 disable-wp;
Patrick Delaunay48c5e902020-03-06 17:54:41 +0100550 st,neg-edge;
551 bus-width = <4>;
552 vmmc-supply = <&v3v3>;
553 status = "okay";
554};
555
556&sdmmc3 {
557 pinctrl-names = "default", "opendrain", "sleep";
558 pinctrl-0 = <&sdmmc3_b4_pins_a>;
559 pinctrl-1 = <&sdmmc3_b4_od_pins_a>;
560 pinctrl-2 = <&sdmmc3_b4_sleep_pins_a>;
561 broken-cd;
562 st,neg-edge;
563 bus-width = <4>;
564 vmmc-supply = <&v3v3>;
565 status = "disabled";
566};
567
568&timers1 {
569 /* spare dmas for other usage */
570 /delete-property/dmas;
571 /delete-property/dma-names;
572 status = "disabled";
573 pwm {
574 pinctrl-0 = <&pwm1_pins_a>;
575 pinctrl-1 = <&pwm1_sleep_pins_a>;
576 pinctrl-names = "default", "sleep";
577 status = "okay";
578 };
579 timer@0 {
580 status = "okay";
581 };
582};
583
584&timers3 {
585 /delete-property/dmas;
586 /delete-property/dma-names;
587 status = "disabled";
588 pwm {
589 pinctrl-0 = <&pwm3_pins_a>;
590 pinctrl-1 = <&pwm3_sleep_pins_a>;
591 pinctrl-names = "default", "sleep";
592 status = "okay";
593 };
594 timer@2 {
595 status = "okay";
596 };
597};
598
599&timers4 {
600 /delete-property/dmas;
601 /delete-property/dma-names;
602 status = "disabled";
603 pwm {
604 pinctrl-0 = <&pwm4_pins_a &pwm4_pins_b>;
605 pinctrl-1 = <&pwm4_sleep_pins_a &pwm4_sleep_pins_b>;
606 pinctrl-names = "default", "sleep";
607 status = "okay";
608 };
609 timer@3 {
610 status = "okay";
611 };
612};
613
614&timers5 {
615 /delete-property/dmas;
616 /delete-property/dma-names;
617 status = "disabled";
618 pwm {
619 pinctrl-0 = <&pwm5_pins_a>;
620 pinctrl-1 = <&pwm5_sleep_pins_a>;
621 pinctrl-names = "default", "sleep";
622 status = "okay";
623 };
624 timer@4 {
625 status = "okay";
626 };
627};
628
629&timers6 {
630 /delete-property/dmas;
631 /delete-property/dma-names;
632 status = "disabled";
633 timer@5 {
634 status = "okay";
635 };
636};
637
638&timers12 {
639 /delete-property/dmas;
640 /delete-property/dma-names;
641 status = "disabled";
642 pwm {
643 pinctrl-0 = <&pwm12_pins_a>;
644 pinctrl-1 = <&pwm12_sleep_pins_a>;
645 pinctrl-names = "default", "sleep";
646 status = "okay";
647 };
648 timer@11 {
649 status = "okay";
650 };
651};
652
653&uart4 {
Patrick Delaunay551efca2020-09-16 10:01:32 +0200654 pinctrl-names = "default", "sleep", "idle";
Patrick Delaunay48c5e902020-03-06 17:54:41 +0100655 pinctrl-0 = <&uart4_pins_a>;
Patrick Delaunay551efca2020-09-16 10:01:32 +0200656 pinctrl-1 = <&uart4_sleep_pins_a>;
657 pinctrl-2 = <&uart4_idle_pins_a>;
Patrick Delaunay6f182192022-04-26 15:38:05 +0200658 /delete-property/dmas;
659 /delete-property/dma-names;
Patrick Delaunay48c5e902020-03-06 17:54:41 +0100660 status = "okay";
661};
662
Patrick Delaunay551efca2020-09-16 10:01:32 +0200663&uart7 {
664 pinctrl-names = "default", "sleep", "idle";
665 pinctrl-0 = <&uart7_pins_c>;
666 pinctrl-1 = <&uart7_sleep_pins_c>;
667 pinctrl-2 = <&uart7_idle_pins_c>;
Patrick Delaunay6f182192022-04-26 15:38:05 +0200668 /delete-property/dmas;
669 /delete-property/dma-names;
Patrick Delaunay551efca2020-09-16 10:01:32 +0200670 status = "disabled";
671};
672
673&usart3 {
674 pinctrl-names = "default", "sleep", "idle";
675 pinctrl-0 = <&usart3_pins_c>;
676 pinctrl-1 = <&usart3_sleep_pins_c>;
677 pinctrl-2 = <&usart3_idle_pins_c>;
678 uart-has-rtscts;
679 status = "disabled";
680};
681
Patrick Delaunay48c5e902020-03-06 17:54:41 +0100682&usbh_ehci {
683 phys = <&usbphyc_port0>;
684 status = "okay";
Patrick Delaunay75785d42022-09-07 13:42:23 +0200685 #address-cells = <1>;
686 #size-cells = <0>;
687 /* onboard HUB */
688 hub@1 {
689 compatible = "usb424,2514";
690 reg = <1>;
691 vdd-supply = <&v3v3>;
692 };
Patrick Delaunay48c5e902020-03-06 17:54:41 +0100693};
694
695&usbotg_hs {
Patrick Delaunay48c5e902020-03-06 17:54:41 +0100696 phys = <&usbphyc_port1 0>;
697 phy-names = "usb2-phy";
Patrick Delaunay551efca2020-09-16 10:01:32 +0200698 usb-role-switch;
Patrick Delaunay48c5e902020-03-06 17:54:41 +0100699 status = "okay";
Patrick Delaunay6d397052021-01-11 12:33:36 +0100700
701 port {
702 usbotg_hs_ep: endpoint {
703 remote-endpoint = <&con_usbotg_hs_ep>;
704 };
705 };
Patrick Delaunay48c5e902020-03-06 17:54:41 +0100706};
707
708&usbphyc {
709 status = "okay";
710};
711
712&usbphyc_port0 {
713 phy-supply = <&vdd_usb>;
Patrick Delaunayb3f8d832022-01-31 16:07:54 +0100714 st,tune-hs-dc-level = <2>;
715 st,enable-fs-rftime-tuning;
716 st,enable-hs-rftime-reduction;
717 st,trim-hs-current = <15>;
718 st,trim-hs-impedance = <1>;
719 st,tune-squelch-level = <3>;
720 st,tune-hs-rx-offset = <2>;
721 st,no-lsfs-sc;
Patrick Delaunay48c5e902020-03-06 17:54:41 +0100722};
723
724&usbphyc_port1 {
725 phy-supply = <&vdd_usb>;
Patrick Delaunayb3f8d832022-01-31 16:07:54 +0100726 st,tune-hs-dc-level = <2>;
727 st,enable-fs-rftime-tuning;
728 st,enable-hs-rftime-reduction;
729 st,trim-hs-current = <15>;
730 st,trim-hs-impedance = <1>;
731 st,tune-squelch-level = <3>;
732 st,tune-hs-rx-offset = <2>;
733 st,no-lsfs-sc;
Patrick Delaunay48c5e902020-03-06 17:54:41 +0100734};
735
736&vrefbuf {
737 regulator-min-microvolt = <2500000>;
738 regulator-max-microvolt = <2500000>;
739 vdda-supply = <&vdd>;
740 status = "okay";
741};