| Tom Rini | 10e4779 | 2018-05-06 17:58:06 -0400 | [diff] [blame] | 1 | /* SPDX-License-Identifier: GPL-2.0+ */ |
| Scott Branden | 5653a82 | 2014-08-11 13:58:22 -0700 | [diff] [blame] | 2 | /* |
| 3 | * Copyright 2014 Broadcom Corporation. |
| Scott Branden | 5653a82 | 2014-08-11 13:58:22 -0700 | [diff] [blame] | 4 | */ |
| 5 | |
| 6 | #ifndef __SYSMAP_H |
| 7 | #define __SYSMAP_H |
| 8 | |
| 9 | #define IHOST_PROC_CLK_PLLARMA 0X19000C00 |
| 10 | #define IHOST_PROC_CLK_PLLARMB 0X19000C04 |
| 11 | #define IHOST_PROC_CLK_PLLARMA__PLLARM_PDIV_R 24 |
| 12 | |
| 13 | #define IHOST_PROC_CLK_WR_ACCESS 0X19000000 |
| 14 | #define IHOST_PROC_CLK_POLICY_FREQ 0X19000008 |
| 15 | #define IHOST_PROC_CLK_POLICY_FREQ__PRIV_ACCESS_MODE 31 |
| 16 | #define IHOST_PROC_CLK_POLICY_FREQ__POLICY3_FREQ_R 24 |
| 17 | #define IHOST_PROC_CLK_POLICY_FREQ__POLICY2_FREQ_R 16 |
| 18 | #define IHOST_PROC_CLK_POLICY_FREQ__POLICY1_FREQ_R 8 |
| 19 | #define IHOST_PROC_CLK_POLICY_CTL 0X1900000C |
| 20 | #define IHOST_PROC_CLK_POLICY_CTL__GO 0 |
| 21 | #define IHOST_PROC_CLK_POLICY_CTL__GO_AC 1 |
| 22 | #define IHOST_PROC_CLK_PLLARMB__PLLARM_NDIV_FRAC_R 0 |
| 23 | #define IHOST_PROC_CLK_PLLARMB__PLLARM_NDIV_FRAC_WIDTH 20 |
| 24 | #define IHOST_PROC_CLK_PLLARMA__PLLARM_LOCK 28 |
| 25 | #define IHOST_PROC_CLK_POLICY_FREQ__POLICY0_FREQ_R 0 |
| 26 | #define IHOST_PROC_CLK_PLLARMA__PLLARM_NDIV_INT_R 8 |
| 27 | #define IHOST_PROC_CLK_PLLARMA__PLLARM_SOFT_POST_RESETB 1 |
| 28 | #define IHOST_PROC_CLK_PLLARMA__PLLARM_SOFT_RESETB 0 |
| 29 | #define IHOST_PROC_CLK_CORE0_CLKGATE 0X19000200 |
| 30 | #define IHOST_PROC_CLK_CORE1_CLKGATE 0X19000204 |
| 31 | #define IHOST_PROC_CLK_ARM_SWITCH_CLKGATE 0X19000210 |
| 32 | #define IHOST_PROC_CLK_ARM_PERIPH_CLKGATE 0X19000300 |
| 33 | #define IHOST_PROC_CLK_APB0_CLKGATE 0X19000400 |
| 34 | #define IPROC_CLKCT_HDELAY_SW_EN 0x00000303 |
| 35 | |
| 36 | #define IPROC_REG_WRITE_ACCESS 0x00a5a501 |
| 37 | |
| 38 | #define IPROC_PERIPH_BASE 0x19020000 |
| 39 | #define IPROC_PERIPH_INT_CTRL_REG_BASE (IPROC_PERIPH_BASE + 0x100) |
| 40 | #define IPROC_PERIPH_GLB_TIM_REG_BASE (IPROC_PERIPH_BASE + 0x200) |
| 41 | #define IPROC_PERIPH_PVT_TIM_REG_BASE (IPROC_PERIPH_BASE + 0x600) |
| 42 | #define IPROC_PERIPH_INT_DISTR_REG_BASE (IPROC_PERIPH_BASE + 0x1000) |
| 43 | |
| 44 | #define PLL_AXI_CLK 0x1DCD6500 |
| 45 | |
| 46 | #endif /* __SYSMAP_H */ |