blob: 22171bd344e38207dd7144cee082d096ccbfb084 [file] [log] [blame]
Ying-Chun Liu (PaulLiu)f183f132022-01-26 20:33:02 +08001// SPDX-License-Identifier: GPL-2.0+
2/*
3 * Copyright 2019 NXP
4 * Copyright 2022 Linaro
5 */
6
7#include "imx8mp-u-boot.dtsi"
8
9/ {
10 wdt-reboot {
11 compatible = "wdt-reboot";
12 wdt = <&wdog1>;
Simon Glassd3a98cb2023-02-13 08:56:33 -070013 bootph-pre-ram;
Ying-Chun Liu (PaulLiu)f183f132022-01-26 20:33:02 +080014 };
Ying-Chun Liu (PaulLiu)f183f132022-01-26 20:33:02 +080015};
16
17&iomuxc {
Simon Glassd3a98cb2023-02-13 08:56:33 -070018 bootph-pre-ram;
Ying-Chun Liu (PaulLiu)f183f132022-01-26 20:33:02 +080019};
20
21&reg_usdhc2_vmmc {
Simon Glassd3a98cb2023-02-13 08:56:33 -070022 bootph-pre-ram;
Ying-Chun Liu (PaulLiu)f183f132022-01-26 20:33:02 +080023};
24
25&pinctrl_uart2 {
Simon Glassd3a98cb2023-02-13 08:56:33 -070026 bootph-pre-ram;
Ying-Chun Liu (PaulLiu)f183f132022-01-26 20:33:02 +080027};
28
29&pinctrl_uart3 {
Simon Glassd3a98cb2023-02-13 08:56:33 -070030 bootph-pre-ram;
Ying-Chun Liu (PaulLiu)f183f132022-01-26 20:33:02 +080031};
32
33&pinctrl_usdhc2_gpio {
Simon Glassd3a98cb2023-02-13 08:56:33 -070034 bootph-pre-ram;
Ying-Chun Liu (PaulLiu)f183f132022-01-26 20:33:02 +080035};
36
37&pinctrl_usdhc2 {
Simon Glassd3a98cb2023-02-13 08:56:33 -070038 bootph-pre-ram;
Ying-Chun Liu (PaulLiu)f183f132022-01-26 20:33:02 +080039};
40
41&pinctrl_usdhc3 {
Simon Glassd3a98cb2023-02-13 08:56:33 -070042 bootph-pre-ram;
Ying-Chun Liu (PaulLiu)f183f132022-01-26 20:33:02 +080043};
44
45&gpio1 {
Simon Glassd3a98cb2023-02-13 08:56:33 -070046 bootph-pre-ram;
Ying-Chun Liu (PaulLiu)f183f132022-01-26 20:33:02 +080047};
48
49&gpio2 {
Simon Glassd3a98cb2023-02-13 08:56:33 -070050 bootph-pre-ram;
Ying-Chun Liu (PaulLiu)f183f132022-01-26 20:33:02 +080051};
52
53&gpio3 {
Simon Glassd3a98cb2023-02-13 08:56:33 -070054 bootph-pre-ram;
Ying-Chun Liu (PaulLiu)f183f132022-01-26 20:33:02 +080055};
56
57&gpio4 {
Simon Glassd3a98cb2023-02-13 08:56:33 -070058 bootph-pre-ram;
Ying-Chun Liu (PaulLiu)f183f132022-01-26 20:33:02 +080059};
60
61&gpio5 {
Simon Glassd3a98cb2023-02-13 08:56:33 -070062 bootph-pre-ram;
Ying-Chun Liu (PaulLiu)f183f132022-01-26 20:33:02 +080063};
64
65&uart2 {
Simon Glassd3a98cb2023-02-13 08:56:33 -070066 bootph-pre-ram;
Ying-Chun Liu (PaulLiu)f183f132022-01-26 20:33:02 +080067};
68
69&uart3 {
Simon Glassd3a98cb2023-02-13 08:56:33 -070070 bootph-pre-ram;
Ying-Chun Liu (PaulLiu)f183f132022-01-26 20:33:02 +080071};
72
73&i2c1 {
Simon Glassd3a98cb2023-02-13 08:56:33 -070074 bootph-pre-ram;
Ying-Chun Liu (PaulLiu)f183f132022-01-26 20:33:02 +080075};
76
77&i2c2 {
Simon Glassd3a98cb2023-02-13 08:56:33 -070078 bootph-pre-ram;
Ying-Chun Liu (PaulLiu)f183f132022-01-26 20:33:02 +080079};
80
81&i2c3 {
Simon Glassd3a98cb2023-02-13 08:56:33 -070082 bootph-pre-ram;
Ying-Chun Liu (PaulLiu)f183f132022-01-26 20:33:02 +080083};
84
Peng Fanb00e4292022-06-11 20:21:08 +080085&wdog1 {
Simon Glassd3a98cb2023-02-13 08:56:33 -070086 bootph-pre-ram;
Peng Fanb00e4292022-06-11 20:21:08 +080087};
88
89&pinctrl_wdog {
Simon Glassd3a98cb2023-02-13 08:56:33 -070090 bootph-pre-ram;
Peng Fanb00e4292022-06-11 20:21:08 +080091};
92
Ying-Chun Liu (PaulLiu)f183f132022-01-26 20:33:02 +080093&pinctrl_i2c1 {
Simon Glassd3a98cb2023-02-13 08:56:33 -070094 bootph-pre-ram;
Ying-Chun Liu (PaulLiu)f183f132022-01-26 20:33:02 +080095};
96
97&pinctrl_i2c1_gpio {
Simon Glassd3a98cb2023-02-13 08:56:33 -070098 bootph-pre-ram;
Ying-Chun Liu (PaulLiu)f183f132022-01-26 20:33:02 +080099};
100
101&pinctrl_pmic {
Simon Glassd3a98cb2023-02-13 08:56:33 -0700102 bootph-pre-ram;
Ying-Chun Liu (PaulLiu)f183f132022-01-26 20:33:02 +0800103};
104
105&{/soc@0/bus@30800000/i2c@30a20000/pca9450@25} {
Simon Glassd3a98cb2023-02-13 08:56:33 -0700106 bootph-pre-ram;
Ying-Chun Liu (PaulLiu)f183f132022-01-26 20:33:02 +0800107};
108
109&{/soc@0/bus@30800000/i2c@30a20000/pca9450@25/regulators} {
Simon Glassd3a98cb2023-02-13 08:56:33 -0700110 bootph-pre-ram;
Ying-Chun Liu (PaulLiu)f183f132022-01-26 20:33:02 +0800111};
112
113&usdhc1 {
Simon Glassd3a98cb2023-02-13 08:56:33 -0700114 bootph-pre-ram;
Ying-Chun Liu (PaulLiu)f183f132022-01-26 20:33:02 +0800115 assigned-clocks = <&clk IMX8MP_CLK_USDHC1>;
116 assigned-clock-rates = <400000000>;
117 assigned-clock-parents = <&clk IMX8MP_SYS_PLL1_400M>;
118};
119
120&usdhc2 {
Simon Glassd3a98cb2023-02-13 08:56:33 -0700121 bootph-pre-ram;
Ying-Chun Liu (PaulLiu)f183f132022-01-26 20:33:02 +0800122 sd-uhs-sdr104;
123 sd-uhs-ddr50;
124 assigned-clocks = <&clk IMX8MP_CLK_USDHC2>;
125 assigned-clock-rates = <400000000>;
126 assigned-clock-parents = <&clk IMX8MP_SYS_PLL1_400M>;
127};
128
129&usdhc3 {
Simon Glassd3a98cb2023-02-13 08:56:33 -0700130 bootph-pre-ram;
Ying-Chun Liu (PaulLiu)f183f132022-01-26 20:33:02 +0800131 mmc-hs400-1_8v;
132 mmc-hs400-enhanced-strobe;
133 assigned-clocks = <&clk IMX8MP_CLK_USDHC3>;
134 assigned-clock-rates = <400000000>;
135 assigned-clock-parents = <&clk IMX8MP_SYS_PLL1_400M>;
136};
137
138&binman {
139 itb {
140 fit {
141 images {
142 fip {
143 description = "Trusted Firmware FIP";
144 type = "firmware";
145 arch = "arm64";
146 compression = "none";
147 load = <0x40310000>;
148
149 fip_blob: blob-ext{
150 filename = "fip.bin";
151 };
152 };
153 };
Ying-Chun Liu (PaulLiu)f183f132022-01-26 20:33:02 +0800154 };
155 };
156};
Ying-Chun Liu (PaulLiu)7cccd052023-01-18 03:15:00 +0800157
Simon Glassceea7842023-08-23 19:18:01 -0600158/* This cannot work since it refers to a template node
Ying-Chun Liu (PaulLiu)7cccd052023-01-18 03:15:00 +0800159&binman_configuration {
160 loadables = "atf", "fip";
161};
Simon Glassceea7842023-08-23 19:18:01 -0600162*/