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git01.mediatek.com / filogic / uboot / a23e6ee58a4af1035a0dd9ded2c6892133738256 / . / include / configs / mt7629.h
blob: 22d11d014761c33550aff51860481def810b4e0a [file] [log] [blame]
developerf4a079c2018-11-15 10:07:52 +0800[diff] [blame]1/* SPDX-License-Identifier: GPL-2.0 */
2/*
3 * Configuration for MediaTek MT7629 SoC
4 *
5 * Copyright (C) 2018 MediaTek Inc.
6 * Author: Ryder Lee <ryder.lee@mediatek.com>
7 */
8
9#ifndef __MT7629_H
10#define __MT7629_H
11
12#include <linux/sizes.h>
13
14/* Miscellaneous configurable options */
developerf4a079c2018-11-15 10:07:52 +0800[diff] [blame]15
developerb8de3ee2018-12-20 16:12:57 +0800[diff] [blame]16#define CONFIG_SYS_NONCACHED_MEMORY SZ_1M
developerf4a079c2018-11-15 10:07:52 +0800[diff] [blame]17
18/* Environment */
developerf4a079c2018-11-15 10:07:52 +0800[diff] [blame]19
20/* Defines for SPL */
developerf4a079c2018-11-15 10:07:52 +0800[diff] [blame]21
22#define CONFIG_SPI_ADDR 0x30000000
developerf4a079c2018-11-15 10:07:52 +0800[diff] [blame]23#define CONFIG_SYS_UBOOT_BASE (CONFIG_SPI_ADDR + CONFIG_SPL_PAD_TO)
24
25/* SPL -> Uboot */
developerf4a079c2018-11-15 10:07:52 +0800[diff] [blame]26
27/* UBoot -> Kernel */
developerf4a079c2018-11-15 10:07:52 +0800[diff] [blame]28
29/* DRAM */
30#define CONFIG_SYS_SDRAM_BASE 0x40000000
31
developerb8de3ee2018-12-20 16:12:57 +0800[diff] [blame]32/* Ethernet */
33#define CONFIG_IPADDR 192.168.1.1
34#define CONFIG_SERVERIP 192.168.1.2
35
developerf4a079c2018-11-15 10:07:52 +0800[diff] [blame]36#endif