| Tom Rini | 51b06fa | 2017-01-22 19:43:10 -0500 | [diff] [blame] | 1 | config CHAIN_OF_TRUST |
| Udit Agarwal | 22ec238 | 2019-11-07 16:11:32 +0000 | [diff] [blame] | 2 | depends on !FIT_SIGNATURE && NXP_ESBC |
| Simon Glass | 311ec4f | 2017-04-26 22:27:53 -0600 | [diff] [blame] | 3 | imply CMD_BLOB |
| Simon Glass | 027608e | 2017-05-17 03:25:25 -0600 | [diff] [blame] | 4 | imply CMD_HASH if ARM |
| Tom Rini | a5c4d40 | 2017-03-01 16:51:58 -0500 | [diff] [blame] | 5 | select FSL_CAAM |
| Gaurav Jain | bd50fd1 | 2022-06-09 16:32:15 +0530 | [diff] [blame] | 6 | select ARCH_MISC_INIT |
| Tom Rini | 0b58c2e | 2022-06-16 14:04:39 -0400 | [diff] [blame^] | 7 | select FSL_SEC_MON |
| Ley Foon Tan | 48fcc4a | 2017-05-03 17:13:32 +0800 | [diff] [blame] | 8 | select SPL_BOARD_INIT if (ARM && SPL) |
| Alexandru Gagniuc | 97464ff | 2021-09-02 19:54:19 -0500 | [diff] [blame] | 9 | select SPL_HASH if (ARM && SPL) |
| Tom Rini | 5bdd919 | 2017-05-15 12:17:49 -0400 | [diff] [blame] | 10 | select SHA_HW_ACCEL |
| 11 | select SHA_PROG_HW_ACCEL |
| Simon Glass | 73c18b4 | 2017-07-23 21:19:39 -0600 | [diff] [blame] | 12 | select ENV_IS_NOWHERE |
| Sumit Garg | 13ad290 | 2018-01-09 01:27:46 +0530 | [diff] [blame] | 13 | select CMD_EXT4 if ARM |
| 14 | select CMD_EXT4_WRITE if ARM |
| Tom Rini | 51b06fa | 2017-01-22 19:43:10 -0500 | [diff] [blame] | 15 | bool |
| 16 | default y |
| Simon Glass | a6a9ea4 | 2017-05-17 03:25:16 -0600 | [diff] [blame] | 17 | |
| 18 | config CMD_ESBC_VALIDATE |
| 19 | bool "Enable the 'esbc_validate' and 'esbc_halt' commands" |
| Tom Rini | aac187d | 2022-06-16 14:04:35 -0400 | [diff] [blame] | 20 | depends on CHAIN_OF_TRUST |
| 21 | default y |
| Simon Glass | a6a9ea4 | 2017-05-17 03:25:16 -0600 | [diff] [blame] | 22 | help |
| 23 | This option enables two commands used for secure booting: |
| 24 | |
| 25 | esbc_validate - validate signature using RSA verification |
| 26 | esbc_halt - put the core in spin loop (Secure Boot Only) |
| Rajesh Bhagat | 241a3cc | 2018-01-17 16:13:04 +0530 | [diff] [blame] | 27 | |
| Tom Rini | eb56a39 | 2022-06-16 14:04:37 -0400 | [diff] [blame] | 28 | config ESBC_HDR_LS |
| 29 | bool |
| 30 | |
| 31 | config ESBC_ADDR_64BIT |
| 32 | def_bool y |
| 33 | depends on ESBC_HDR_LS && FSL_LAYERSCAPE |
| 34 | help |
| 35 | For Layerscape based platforms, ESBC image Address in Header is 64bit. |
| 36 | |
| Tom Rini | b643ebd | 2022-03-24 17:17:58 -0400 | [diff] [blame] | 37 | config DEEP_SLEEP |
| 38 | bool "Enable SoC deep sleep feature" |
| Tom Rini | aac187d | 2022-06-16 14:04:35 -0400 | [diff] [blame] | 39 | depends on ARCH_T1024 || ARCH_T1040 || ARCH_T1042 || ARCH_LS1021A |
| 40 | default y |
| Tom Rini | b643ebd | 2022-03-24 17:17:58 -0400 | [diff] [blame] | 41 | help |
| 42 | Indicates this SoC supports deep sleep feature. If deep sleep is |
| 43 | supported, core will start to execute uboot when wakes up. |
| 44 | |
| Stephen Carlson | e36d49c | 2021-06-22 16:35:20 -0700 | [diff] [blame] | 45 | config FSL_USE_PCA9547_MUX |
| 46 | bool "Enable PCA9547 I2C Mux on Freescale boards" |
| Tom Rini | aac187d | 2022-06-16 14:04:35 -0400 | [diff] [blame] | 47 | depends on PPC || ARCH_LS1021A || FSL_LSCH2 || FSL_LSCH3 |
| Stephen Carlson | e36d49c | 2021-06-22 16:35:20 -0700 | [diff] [blame] | 48 | help |
| 49 | This option enables the PCA9547 I2C mux on Freescale boards. |
| 50 | |
| Stephen Carlson | c3301a2 | 2021-02-08 11:11:29 +0100 | [diff] [blame] | 51 | config VID |
| Stephen Carlson | c3301a2 | 2021-02-08 11:11:29 +0100 | [diff] [blame] | 52 | bool "Enable Freescale VID" |
| Tom Rini | aac187d | 2022-06-16 14:04:35 -0400 | [diff] [blame] | 53 | depends on (PPC || ARCH_LS1021A || FSL_LSCH2 || FSL_LSCH3) && (I2C || DM_I2C) |
| Stephen Carlson | c3301a2 | 2021-02-08 11:11:29 +0100 | [diff] [blame] | 54 | help |
| 55 | This option enables setting core voltage based on individual |
| 56 | values saved in SoC fuses. |
| 57 | |
| Tom Rini | 89cdcab | 2021-12-12 22:12:31 -0500 | [diff] [blame] | 58 | config SPL_VID |
| 59 | bool "Enable Freescale VID in SPL" |
| Tom Rini | aac187d | 2022-06-16 14:04:35 -0400 | [diff] [blame] | 60 | depends on (PPC || ARCH_LS1021A || FSL_LSCH2 || FSL_LSCH3) && (SPL_I2C || DM_SPL_I2C) |
| Tom Rini | 89cdcab | 2021-12-12 22:12:31 -0500 | [diff] [blame] | 61 | help |
| 62 | This option enables setting core voltage based on individual |
| 63 | values saved in SoC fuses, in SPL. |
| 64 | |
| 65 | if VID || SPL_VID |
| 66 | |
| 67 | config VID_FLS_ENV |
| 68 | string "Environment variable for overriding VDD" |
| 69 | help |
| 70 | This option allows for specifying the environment variable |
| 71 | to check to override VDD information. |
| 72 | |
| 73 | config VOL_MONITOR_INA220 |
| 74 | bool "Enable the INA220 voltage monitor read" |
| 75 | help |
| 76 | This option enables INA220 voltage monitor read |
| 77 | functionality. It is used by the common VID driver. |
| 78 | |
| 79 | config VOL_MONITOR_IR36021_READ |
| 80 | bool "Enable the IR36021 voltage monitor read" |
| 81 | help |
| 82 | This option enables IR36021 voltage monitor read |
| 83 | functionality. It is used by the common VID driver. |
| 84 | |
| 85 | config VOL_MONITOR_IR36021_SET |
| 86 | bool "Enable the IR36021 voltage monitor set" |
| 87 | help |
| 88 | This option enables IR36021 voltage monitor set |
| 89 | functionality. It is used by the common VID driver. |
| 90 | |
| Rajesh Bhagat | 241a3cc | 2018-01-17 16:13:04 +0530 | [diff] [blame] | 91 | config VOL_MONITOR_LTC3882_READ |
| Rajesh Bhagat | 241a3cc | 2018-01-17 16:13:04 +0530 | [diff] [blame] | 92 | bool "Enable the LTC3882 voltage monitor read" |
| Rajesh Bhagat | 241a3cc | 2018-01-17 16:13:04 +0530 | [diff] [blame] | 93 | help |
| 94 | This option enables LTC3882 voltage monitor read |
| Stephen Carlson | c3301a2 | 2021-02-08 11:11:29 +0100 | [diff] [blame] | 95 | functionality. It is used by the common VID driver. |
| Rajesh Bhagat | 241a3cc | 2018-01-17 16:13:04 +0530 | [diff] [blame] | 96 | |
| 97 | config VOL_MONITOR_LTC3882_SET |
| Rajesh Bhagat | 241a3cc | 2018-01-17 16:13:04 +0530 | [diff] [blame] | 98 | bool "Enable the LTC3882 voltage monitor set" |
| Rajesh Bhagat | 241a3cc | 2018-01-17 16:13:04 +0530 | [diff] [blame] | 99 | help |
| 100 | This option enables LTC3882 voltage monitor set |
| Stephen Carlson | c3301a2 | 2021-02-08 11:11:29 +0100 | [diff] [blame] | 101 | functionality. It is used by the common VID driver. |
| 102 | |
| 103 | config VOL_MONITOR_ISL68233_READ |
| Stephen Carlson | c3301a2 | 2021-02-08 11:11:29 +0100 | [diff] [blame] | 104 | bool "Enable the ISL68233 voltage monitor read" |
| 105 | help |
| 106 | This option enables ISL68233 voltage monitor read |
| 107 | functionality. It is used by the common VID driver. |
| 108 | |
| 109 | config VOL_MONITOR_ISL68233_SET |
| Stephen Carlson | c3301a2 | 2021-02-08 11:11:29 +0100 | [diff] [blame] | 110 | bool "Enable the ISL68233 voltage monitor set" |
| 111 | help |
| 112 | This option enables ISL68233 voltage monitor set |
| 113 | functionality. It is used by the common VID driver. |
| Tom Rini | 89cdcab | 2021-12-12 22:12:31 -0500 | [diff] [blame] | 114 | |
| 115 | endif |
| Tom Rini | e24547a | 2022-03-30 18:07:32 -0400 | [diff] [blame] | 116 | |
| 117 | config FSL_QIXIS |
| 118 | bool "Enable QIXIS support" |
| Tom Rini | aac187d | 2022-06-16 14:04:35 -0400 | [diff] [blame] | 119 | depends on PPC || ARCH_LS1021A || FSL_LSCH2 || FSL_LSCH3 |
| Tom Rini | e24547a | 2022-03-30 18:07:32 -0400 | [diff] [blame] | 120 | |
| 121 | config QIXIS_I2C_ACCESS |
| 122 | bool "Access to QIXIS is over i2c" |
| 123 | depends on FSL_QIXIS |
| 124 | default y |
| Tom Rini | 4171301 | 2022-06-08 08:24:28 -0400 | [diff] [blame] | 125 | |
| 126 | config HAS_FSL_DR_USB |
| 127 | def_bool y |
| 128 | depends on USB_EHCI_HCD && PPC |