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Tom Rini53633a82024-02-29 12:33:36 -05001# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
2%YAML 1.2
3---
4$id: http://devicetree.org/schemas/media/qcom,msm8996-venus.yaml#
5$schema: http://devicetree.org/meta-schemas/core.yaml#
6
7title: Qualcomm MSM8996 Venus video encode and decode accelerators
8
9maintainers:
10 - Stanimir Varbanov <stanimir.varbanov@linaro.org>
11
12description: |
13 The Venus IP is a video encode and decode accelerator present
14 on Qualcomm platforms
15
16allOf:
17 - $ref: qcom,venus-common.yaml#
18
19properties:
20 compatible:
Tom Rini6b642ac2024-10-01 12:20:28 -060021 enum:
22 - qcom,msm8996-venus
23 - qcom,msm8998-venus
Tom Rini53633a82024-02-29 12:33:36 -050024
25 power-domains:
26 maxItems: 1
27
28 clocks:
29 maxItems: 4
30
31 clock-names:
32 items:
33 - const: core
34 - const: iface
35 - const: bus
36 - const: mbus
37
38 interconnects:
39 maxItems: 2
40
41 interconnect-names:
42 items:
43 - const: video-mem
44 - const: cpu-cfg
45
46 iommus:
47 maxItems: 20
48
49 video-decoder:
50 type: object
51
52 properties:
53 compatible:
54 const: venus-decoder
55
56 clocks:
57 maxItems: 1
58
59 clock-names:
60 items:
61 - const: core
62
63 power-domains:
64 maxItems: 1
65
66 required:
67 - compatible
68 - clocks
69 - clock-names
70 - power-domains
71
72 additionalProperties: false
73
74 video-encoder:
75 type: object
76
77 properties:
78 compatible:
79 const: venus-encoder
80
81 clocks:
82 maxItems: 1
83
84 clock-names:
85 items:
86 - const: core
87
88 power-domains:
89 maxItems: 1
90
91 required:
92 - compatible
93 - clocks
94 - clock-names
95 - power-domains
96
97 additionalProperties: false
98
99required:
100 - compatible
101 - iommus
102 - video-decoder
103 - video-encoder
104
105unevaluatedProperties: false
106
107examples:
108 - |
109 #include <dt-bindings/interrupt-controller/arm-gic.h>
110 #include <dt-bindings/clock/qcom,mmcc-msm8996.h>
111
112 video-codec@c00000 {
113 compatible = "qcom,msm8996-venus";
114 reg = <0x00c00000 0xff000>;
115 interrupts = <GIC_SPI 287 IRQ_TYPE_LEVEL_HIGH>;
116 clocks = <&mmcc VIDEO_CORE_CLK>,
117 <&mmcc VIDEO_AHB_CLK>,
118 <&mmcc VIDEO_AXI_CLK>,
119 <&mmcc VIDEO_MAXI_CLK>;
120 clock-names = "core", "iface", "bus", "mbus";
121 power-domains = <&mmcc VENUS_GDSC>;
122 iommus = <&venus_smmu 0x00>,
123 <&venus_smmu 0x01>,
124 <&venus_smmu 0x0a>,
125 <&venus_smmu 0x07>,
126 <&venus_smmu 0x0e>,
127 <&venus_smmu 0x0f>,
128 <&venus_smmu 0x08>,
129 <&venus_smmu 0x09>,
130 <&venus_smmu 0x0b>,
131 <&venus_smmu 0x0c>,
132 <&venus_smmu 0x0d>,
133 <&venus_smmu 0x10>,
134 <&venus_smmu 0x11>,
135 <&venus_smmu 0x21>,
136 <&venus_smmu 0x28>,
137 <&venus_smmu 0x29>,
138 <&venus_smmu 0x2b>,
139 <&venus_smmu 0x2c>,
140 <&venus_smmu 0x2d>,
141 <&venus_smmu 0x31>;
142 memory-region = <&venus_mem>;
143
144 video-decoder {
145 compatible = "venus-decoder";
146 clocks = <&mmcc VIDEO_SUBCORE0_CLK>;
147 clock-names = "core";
148 power-domains = <&mmcc VENUS_CORE0_GDSC>;
149 };
150
151 video-encoder {
152 compatible = "venus-encoder";
153 clocks = <&mmcc VIDEO_SUBCORE1_CLK>;
154 clock-names = "core";
155 power-domains = <&mmcc VENUS_CORE1_GDSC>;
156 };
157 };