blob: 1dcf97c0c064ed56cb249846a0d6f7b032cb3d2f [file] [log] [blame]
Tom Rini53633a82024-02-29 12:33:36 -05001# SPDX-License-Identifier: GPL-2.0-only
2%YAML 1.2
3---
4$id: http://devicetree.org/schemas/clock/qcom,gcc-sm8150.yaml#
5$schema: http://devicetree.org/meta-schemas/core.yaml#
6
7title: Qualcomm Global Clock & Reset Controller on SM8150
8
9maintainers:
10 - Stephen Boyd <sboyd@kernel.org>
11 - Taniya Das <quic_tdas@quicinc.com>
12
13description: |
14 Qualcomm global clock control module provides the clocks, resets and power
15 domains on SM8150.
16
17 See also:: include/dt-bindings/clock/qcom,gcc-sm8150.h
18
19properties:
20 compatible:
21 const: qcom,gcc-sm8150
22
23 clocks:
24 items:
25 - description: Board XO source
26 - description: Sleep clock source
27
28 clock-names:
29 items:
30 - const: bi_tcxo
31 - const: sleep_clk
32
33required:
34 - compatible
35 - clocks
36 - clock-names
Tom Rini6b642ac2024-10-01 12:20:28 -060037 - '#power-domain-cells'
Tom Rini53633a82024-02-29 12:33:36 -050038
39allOf:
40 - $ref: qcom,gcc.yaml#
41
42unevaluatedProperties: false
43
44examples:
45 - |
46 #include <dt-bindings/clock/qcom,rpmh.h>
47 clock-controller@100000 {
48 compatible = "qcom,gcc-sm8150";
49 reg = <0x00100000 0x1f0000>;
50 clocks = <&rpmhcc RPMH_CXO_CLK>,
51 <&sleep_clk>;
52 clock-names = "bi_tcxo", "sleep_clk";
53 #clock-cells = <1>;
54 #reset-cells = <1>;
55 #power-domain-cells = <1>;
56 };
57...