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wdenk1dda0b12002-08-27 10:52:29 +00001/*
2 * (C) Copyright 2000, 2001
3 * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
4 *
Wolfgang Denkd79de1d2013-07-08 09:37:19 +02005 * SPDX-License-Identifier: GPL-2.0+
wdenk1dda0b12002-08-27 10:52:29 +00006 */
7
8#include <common.h>
Christophe Leroy394f9b32017-07-06 10:33:13 +02009#include <asm/io.h>
wdenk1dda0b12002-08-27 10:52:29 +000010
wdenk1dda0b12002-08-27 10:52:29 +000011/* ------------------------------------------------------------------------- */
12
13/*
14 * This function is intended for SHORT delays only.
15 * It will overflow at around 10 seconds @ 400MHz,
16 * or 20 seconds @ 200MHz.
17 */
18unsigned long usec2ticks(unsigned long usec)
19{
20 ulong ticks;
21
22 if (usec < 1000) {
23 ticks = ((usec * (get_tbclk()/1000)) + 500) / 1000;
24 } else {
25 ticks = ((usec / 10) * (get_tbclk() / 100000));
26 }
27
28 return (ticks);
29}
30
31/* ------------------------------------------------------------------------- */
32
33/*
34 * We implement the delay by converting the delay (the number of
35 * microseconds to wait) into a number of time base ticks; then we
36 * watch the time base until it has incremented by that amount.
37 */
Ingo van Lilf0f778a2009-11-24 14:09:21 +010038void __udelay(unsigned long usec)
wdenk1dda0b12002-08-27 10:52:29 +000039{
Ingo van Lilf0f778a2009-11-24 14:09:21 +010040 ulong ticks = usec2ticks (usec);
41 wait_ticks (ticks);
wdenk1dda0b12002-08-27 10:52:29 +000042}
43
44/* ------------------------------------------------------------------------- */
Scott Woodb71689b2008-06-30 14:13:28 -050045#ifndef CONFIG_NAND_SPL
wdenk1dda0b12002-08-27 10:52:29 +000046unsigned long ticks2usec(unsigned long ticks)
47{
48 ulong tbclk = get_tbclk();
49
50 /* usec = ticks * 1000000 / tbclk
51 * Multiplication would overflow at ~4.2e3 ticks,
52 * so we break it up into
53 * usec = ( ( ticks * 1000) / tbclk ) * 1000;
54 */
55 ticks *= 1000L;
56 ticks /= tbclk;
57 ticks *= 1000L;
58
59 return ((ulong)ticks);
60}
Scott Woodb71689b2008-06-30 14:13:28 -050061#endif
wdenk1dda0b12002-08-27 10:52:29 +000062/* ------------------------------------------------------------------------- */
63
Simon Glass4c974d72017-03-28 10:27:24 -060064int timer_init(void)
wdenk1dda0b12002-08-27 10:52:29 +000065{
Timur Tabi4705e002010-12-14 17:18:51 -060066 unsigned long temp;
67
Christophe Leroy069fa832017-07-06 10:23:22 +020068#if defined(CONFIG_8xx)
Christophe Leroy394f9b32017-07-06 10:33:13 +020069 immap_t __iomem *immap = (immap_t __iomem *)CONFIG_SYS_IMMR;
Christophe Leroy069fa832017-07-06 10:23:22 +020070
71 /* unlock */
Christophe Leroy394f9b32017-07-06 10:33:13 +020072 out_be32(&immap->im_sitk.sitk_tbk, KAPWR_KEY);
Christophe Leroy069fa832017-07-06 10:23:22 +020073#endif
74
wdenk1dda0b12002-08-27 10:52:29 +000075 /* reset */
Timur Tabi4705e002010-12-14 17:18:51 -060076 asm volatile("li %0,0 ; mttbu %0 ; mttbl %0;"
77 : "=&r"(temp) );
wdenk1dda0b12002-08-27 10:52:29 +000078
Christophe Leroy069fa832017-07-06 10:23:22 +020079#if defined(CONFIG_8xx)
80 /* enable */
Christophe Leroy394f9b32017-07-06 10:33:13 +020081 setbits_be16(&immap->im_sit.sit_tbscr, TBSCR_TBE);
Christophe Leroy069fa832017-07-06 10:23:22 +020082#endif
wdenk1dda0b12002-08-27 10:52:29 +000083 return (0);
84}
85/* ------------------------------------------------------------------------- */