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Priyanka Jainfd45ca02018-11-28 13:04:27 +00001// SPDX-License-Identifier: GPL-2.0+ OR X11
2/*
3 * NXP LX2160ARDB device tree source
4 *
5 * Author: Priyanka Jain <priyanka.jain@nxp.com>
6 * Sriram Dash <sriram.dash@nxp.com>
7 *
8 * Copyright 2018 NXP
9 *
10 */
11
12/dts-v1/;
13
14#include "fsl-lx2160a.dtsi"
15
16/ {
17 model = "NXP Layerscape LX2160ARDB Board";
18 compatible = "fsl,lx2160ardb", "fsl,lx2160a";
Kuldeep Singh6b614242019-11-06 16:38:01 +053019 aliases {
20 spi0 = &fspi;
21 };
Priyanka Jainfd45ca02018-11-28 13:04:27 +000022};
23
24&esdhc0 {
25 status = "okay";
26};
27
28&esdhc1 {
29 status = "okay";
Yinbo Zhud8a7c222019-07-16 15:09:09 +080030 mmc-hs200-1_8v;
Priyanka Jainfd45ca02018-11-28 13:04:27 +000031};
32
Kuldeep Singh6b614242019-11-06 16:38:01 +053033&fspi {
34 status = "okay";
35
36 mt35xu512aba0: flash@0 {
37 #address-cells = <1>;
38 #size-cells = <1>;
39 compatible = "jedec,spi-nor";
40 spi-max-frequency = <50000000>;
41 reg = <0>;
42 };
43
44 mt35xu512aba1: flash@1 {
45 #address-cells = <1>;
46 #size-cells = <1>;
47 compatible = "jedec,spi-nor";
48 spi-max-frequency = <50000000>;
49 reg = <1>;
50 };
51};
52
Chuanhua Han1a64fb02019-07-10 21:00:26 +080053&i2c0 {
54 status = "okay";
55 u-boot,dm-pre-reloc;
56};
57
Chuanhua Han9312dcb2019-07-10 21:00:25 +080058&i2c4 {
59 status = "okay";
60
61 rtc@51 {
62 compatible = "pcf2127-rtc";
63 reg = <0x51>;
64 };
65};
66
Priyanka Jainfd45ca02018-11-28 13:04:27 +000067&sata0 {
68 status = "okay";
69};
70
71&sata1 {
72 status = "okay";
73};
74
75&sata2 {
76 status = "okay";
77};
78
79&sata3 {
80 status = "okay";
81};