blob: 5bd440f1db33e524c295cdd7b3603d84dd1d0912 [file] [log] [blame]
Tom Rini10e47792018-05-06 17:58:06 -04001/* SPDX-License-Identifier: GPL-2.0+ */
Sanchayan Maitycc4d78f2015-04-15 16:24:26 +05302/*
Marcel Ziswiler510c2dd2019-03-25 17:25:01 +01003 * Copyright 2015-2019 Toradex, Inc.
Sanchayan Maitycc4d78f2015-04-15 16:24:26 +05304 *
Marcel Ziswilerd92dee52016-11-16 17:49:23 +01005 * Configuration settings for the Toradex VF50/VF61 modules.
Sanchayan Maitycc4d78f2015-04-15 16:24:26 +05306 *
7 * Based on vf610twr.h:
8 * Copyright 2013 Freescale Semiconductor, Inc.
Sanchayan Maitycc4d78f2015-04-15 16:24:26 +05309 */
10
11#ifndef __CONFIG_H
12#define __CONFIG_H
13
14#include <asm/arch/imx-regs.h>
Marcel Ziswiler2e3b3d52019-03-25 17:25:02 +010015#include <linux/sizes.h>
Sanchayan Maitycc4d78f2015-04-15 16:24:26 +053016
Gong Qianyu52de2e52015-10-26 19:47:42 +080017#define CONFIG_SYS_FSL_CLK
Sanchayan Maitycc4d78f2015-04-15 16:24:26 +053018
Sanchayan Maitycc4d78f2015-04-15 16:24:26 +053019#define CONFIG_SKIP_LOWLEVEL_INIT
20
Stefan Agner13011752017-04-11 11:12:14 +053021#ifdef CONFIG_VIDEO_FSL_DCU_FB
Stefan Agner13011752017-04-11 11:12:14 +053022#define CONFIG_VIDEO_LOGO
23#define CONFIG_VIDEO_BMP_LOGO
24#define CONFIG_SYS_FSL_DCU_LE
25
26#define CONFIG_SYS_DCU_ADDR DCU0_BASE_ADDR
27#define DCU_LAYER_MAX_NUM 64
28#endif
29
Sanchayan Maitycc4d78f2015-04-15 16:24:26 +053030/* Size of malloc() pool */
Marcel Ziswiler2e3b3d52019-03-25 17:25:02 +010031#define CONFIG_SYS_MALLOC_LEN (CONFIG_ENV_SIZE + 2 * SZ_1M)
Sanchayan Maitycc4d78f2015-04-15 16:24:26 +053032
Sanchayan Maitycc4d78f2015-04-15 16:24:26 +053033/* NAND support */
Stefan Agner4ce682a2015-05-08 19:07:13 +020034#define CONFIG_SYS_NAND_ONFI_DETECTION
Sanchayan Maitycc4d78f2015-04-15 16:24:26 +053035#define CONFIG_SYS_MAX_NAND_DEVICE 1
Sanchayan Maitycc4d78f2015-04-15 16:24:26 +053036
37#define CONFIG_IPADDR 192.168.10.2
38#define CONFIG_NETMASK 255.255.255.0
39#define CONFIG_SERVERIP 192.168.10.1
40
Sanchayan Maitycc4d78f2015-04-15 16:24:26 +053041#define CONFIG_LOADADDR 0x80008000
42#define CONFIG_FDTADDR 0x84000000
43
44/* We boot from the gfxRAM area of the OCRAM. */
Stefan Agner1faaa3c2017-10-17 13:59:19 +020045#define CONFIG_BOARD_SIZE_LIMIT 520192
Sanchayan Maitycc4d78f2015-04-15 16:24:26 +053046
Stefan Agnerc0594832019-03-25 17:25:03 +010047#define MEM_LAYOUT_ENV_SETTINGS \
48 "bootm_size=0x10000000\0" \
49 "fdt_addr_r=0x82000000\0" \
Stefan Agnerc0594832019-03-25 17:25:03 +010050 "kernel_addr_r=0x81000000\0" \
51 "pxefile_addr_r=0x87100000\0" \
52 "ramdisk_addr_r=0x82100000\0" \
53 "scriptaddr=0x87000000\0"
Sanchayan Maitycc4d78f2015-04-15 16:24:26 +053054
Igor Opaniukaf80e152019-12-09 12:33:32 +020055#define UBOOT_UPDATE \
56 "update_uboot=nand erase.part u-boot && " \
57 "nand write ${loadaddr} u-boot ${filesize}\0" \
58
Sanchayan Maitycc4d78f2015-04-15 16:24:26 +053059#define NFS_BOOTCMD \
60 "nfsargs=ip=:::::eth0: root=/dev/nfs\0" \
61 "nfsboot=run setup; " \
62 "setenv bootargs ${defargs} ${nfsargs} ${mtdparts} " \
63 "${setupargs} ${vidargs}; echo Booting from NFS...;" \
64 "dhcp ${kernel_addr_r} && " \
65 "tftp ${fdt_addr_r} ${soc}-colibri-${fdt_board}.dtb && " \
Sanchayan Maitya48b4272016-12-02 14:28:27 +053066 "run fdt_fixup && bootz ${kernel_addr_r} - ${fdt_addr_r}\0" \
Sanchayan Maitycc4d78f2015-04-15 16:24:26 +053067
Stefan Agnerc0594832019-03-25 17:25:03 +010068#define UBI_BOOTCMD \
Sanchayan Maitycc4d78f2015-04-15 16:24:26 +053069 "ubiargs=ubi.mtd=ubi root=ubi0:rootfs rootfstype=ubifs " \
70 "ubi.fm_autoconvert=1\0" \
71 "ubiboot=run setup; " \
72 "setenv bootargs ${defargs} ${ubiargs} ${mtdparts} " \
73 "${setupargs} ${vidargs}; echo Booting from NAND...; " \
Sanchayan Maity27e4e102016-11-25 16:19:17 +053074 "ubi part ubi && " \
75 "ubi read ${kernel_addr_r} kernel && " \
76 "ubi read ${fdt_addr_r} dtb && " \
Sanchayan Maitya48b4272016-12-02 14:28:27 +053077 "run fdt_fixup && bootz ${kernel_addr_r} - ${fdt_addr_r}\0" \
Sanchayan Maitycc4d78f2015-04-15 16:24:26 +053078
Igor Opaniukdd3b7b82020-09-14 11:01:09 +030079#define CONFIG_BOOTCOMMAND "run ubiboot || run distro_bootcmd;"
Stefan Agnerc0594832019-03-25 17:25:03 +010080
81#define BOOT_TARGET_DEVICES(func) \
82 func(MMC, mmc, 0) \
83 func(USB, usb, 0) \
84 func(DHCP, dhcp, na)
85#include <config_distro_bootcmd.h>
86#undef BOOTENV_RUN_NET_USB_START
87#define BOOTENV_RUN_NET_USB_START ""
Sanchayan Maitycc4d78f2015-04-15 16:24:26 +053088
Sanchayan Maity7755e532015-04-17 18:56:42 +053089#define DFU_ALT_NAND_INFO "vf-bcb part 0,1;u-boot part 0,2;ubi part 0,4"
90
Sanchayan Maitycc4d78f2015-04-15 16:24:26 +053091#define CONFIG_EXTRA_ENV_SETTINGS \
Stefan Agnerc0594832019-03-25 17:25:03 +010092 BOOTENV \
93 MEM_LAYOUT_ENV_SETTINGS \
94 NFS_BOOTCMD \
Stefan Agnerc0594832019-03-25 17:25:03 +010095 UBI_BOOTCMD \
Igor Opaniukaf80e152019-12-09 12:33:32 +020096 UBOOT_UPDATE \
Stefan Agnerc0594832019-03-25 17:25:03 +010097 "console=ttyLP0\0" \
Stefan Agnerb093f0f2019-03-25 17:25:07 +010098 "defargs=user_debug=30\0" \
Stefan Agnerc0594832019-03-25 17:25:03 +010099 "dfu_alt_info=" DFU_ALT_NAND_INFO "\0" \
Sanchayan Maitycc4d78f2015-04-15 16:24:26 +0530100 "fdt_board=eval-v3\0" \
Sanchayan Maitya48b4272016-12-02 14:28:27 +0530101 "fdt_fixup=;\0" \
Max Krummenacher115d21f2020-06-16 22:20:05 +0300102 "kernel_image=zImage\0" \
Stefan Agnerc0594832019-03-25 17:25:03 +0100103 "mtdparts=" CONFIG_MTDPARTS_DEFAULT "\0" \
Sanchayan Maitycc4d78f2015-04-15 16:24:26 +0530104 "setsdupdate=mmc rescan && set interface mmc && " \
Stefan Agnerc0594832019-03-25 17:25:03 +0100105 "fatload ${interface} 0:1 ${loadaddr} flash_blk.img && " \
106 "source ${loadaddr}\0" \
107 "setup=setenv setupargs console=tty1 console=${console}" \
108 ",${baudrate}n8 ${memargs}\0" \
Sanchayan Maitycc4d78f2015-04-15 16:24:26 +0530109 "setupdate=run setsdupdate || run setusbupdate\0" \
Stefan Agnerc0594832019-03-25 17:25:03 +0100110 "setusbupdate=usb start && set interface usb && " \
111 "fatload ${interface} 0:1 ${loadaddr} flash_blk.img && " \
112 "source ${loadaddr}\0" \
Stefan Agner13011752017-04-11 11:12:14 +0530113 "splashpos=m,m\0" \
Stefan Agnerc0594832019-03-25 17:25:03 +0100114 "video-mode=dcufb:640x480-16@60,monitor=lcd\0"
Sanchayan Maitycc4d78f2015-04-15 16:24:26 +0530115
116/* Miscellaneous configurable options */
Sanchayan Maity0d92de42015-06-08 12:40:41 +0530117#define CONFIG_SYS_CBSIZE 1024 /* Console I/O Buffer Size */
Sanchayan Maitycc4d78f2015-04-15 16:24:26 +0530118#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE
119
Sanchayan Maitycc4d78f2015-04-15 16:24:26 +0530120#define CONFIG_SYS_LOAD_ADDR CONFIG_LOADADDR
121#define CONFIG_SYS_HZ 1000
Sanchayan Maitycc4d78f2015-04-15 16:24:26 +0530122
Sanchayan Maitycc4d78f2015-04-15 16:24:26 +0530123/* Physical memory map */
Sanchayan Maitycc4d78f2015-04-15 16:24:26 +0530124#define PHYS_SDRAM (0x80000000)
Marcel Ziswiler2e3b3d52019-03-25 17:25:02 +0100125#define PHYS_SDRAM_SIZE (256 * SZ_1M)
Sanchayan Maitycc4d78f2015-04-15 16:24:26 +0530126
127#define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM
128#define CONFIG_SYS_INIT_RAM_ADDR IRAM_BASE_ADDR
129#define CONFIG_SYS_INIT_RAM_SIZE IRAM_SIZE
130
131#define CONFIG_SYS_INIT_SP_OFFSET \
132 (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE)
133#define CONFIG_SYS_INIT_SP_ADDR \
134 (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET)
135
136/* Environment organization */
Sanchayan Maitycc4d78f2015-04-15 16:24:26 +0530137#ifdef CONFIG_ENV_IS_IN_NAND
Sanchayan Maitycc4d78f2015-04-15 16:24:26 +0530138#define CONFIG_ENV_RANGE (4 * 64 * 2048)
Sanchayan Maitycc4d78f2015-04-15 16:24:26 +0530139#endif
140
Sanchayan Maity7755e532015-04-17 18:56:42 +0530141/* USB Host Support */
Sanchayan Maity7755e532015-04-17 18:56:42 +0530142#define CONFIG_USB_MAX_CONTROLLER_COUNT 2
143#define CONFIG_EHCI_HCD_INIT_AFTER_RESET
144
Sanchayan Maity7755e532015-04-17 18:56:42 +0530145/* USB DFU */
Sanchayan Maity7755e532015-04-17 18:56:42 +0530146
Sanchayan Maitycc4d78f2015-04-15 16:24:26 +0530147#endif /* __CONFIG_H */