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Tom Rini10e47792018-05-06 17:58:06 -04001// SPDX-License-Identifier: GPL-2.0+
Wang Huan8ce6bec2014-09-05 13:52:34 +08002/*
3 * Copyright 2014 Freescale Semiconductor, Inc.
Wang Huan8ce6bec2014-09-05 13:52:34 +08004 */
5
6#include <common.h>
7#include <asm/io.h>
8#include <div64.h>
9#include <asm/arch/immap_ls102xa.h>
10#include <asm/arch/clock.h>
11
12DECLARE_GLOBAL_DATA_PTR;
13
14/*
15 * This function is intended for SHORT delays only.
16 * It will overflow at around 10 seconds @ 400MHz,
17 * or 20 seconds @ 200MHz.
18 */
19unsigned long usec2ticks(unsigned long usec)
20{
21 ulong ticks;
22
23 if (usec < 1000)
24 ticks = ((usec * (get_tbclk()/1000)) + 500) / 1000;
25 else
26 ticks = ((usec / 10) * (get_tbclk() / 100000));
27
28 return ticks;
29}
30
31static inline unsigned long long tick_to_time(unsigned long long tick)
32{
33 unsigned long freq;
34
35 asm volatile("mrc p15, 0, %0, c14, c0, 0" : "=r" (freq));
36
37 tick *= CONFIG_SYS_HZ;
38 do_div(tick, freq);
39
40 return tick;
41}
42
43static inline unsigned long long us_to_tick(unsigned long long usec)
44{
45 unsigned long freq;
46
47 asm volatile("mrc p15, 0, %0, c14, c0, 0" : "=r" (freq));
48
49 usec = usec * freq + 999999;
50 do_div(usec, 1000000);
51
52 return usec;
53}
54
55int timer_init(void)
56{
57 struct sctr_regs *sctr = (struct sctr_regs *)SCTR_BASE_ADDR;
Alison Wang25c9dc52015-07-15 15:13:05 +080058 unsigned long ctrl, freq;
59 unsigned long long val;
Wang Huan8ce6bec2014-09-05 13:52:34 +080060
61 /* Enable System Counter */
62 writel(SYS_COUNTER_CTRL_ENABLE, &sctr->cntcr);
63
Andre Przywara9d095c32017-02-16 01:20:20 +000064 freq = COUNTER_FREQUENCY;
Wang Huan8ce6bec2014-09-05 13:52:34 +080065 asm("mcr p15, 0, %0, c14, c0, 0" : : "r" (freq));
66
67 /* Set PL1 Physical Timer Ctrl */
68 ctrl = ARCH_TIMER_CTRL_ENABLE;
69 asm("mcr p15, 0, %0, c14, c2, 1" : : "r" (ctrl));
70
71 /* Set PL1 Physical Comp Value */
72 val = TIMER_COMP_VAL;
73 asm("mcrr p15, 2, %Q0, %R0, c14" : : "r" (val));
74
75 gd->arch.tbl = 0;
76 gd->arch.tbu = 0;
77
78 return 0;
79}
80
81unsigned long long get_ticks(void)
82{
83 unsigned long long now;
84
85 asm("mrrc p15, 0, %Q0, %R0, c14" : "=r" (now));
86
87 gd->arch.tbl = (unsigned long)(now & 0xffffffff);
88 gd->arch.tbu = (unsigned long)(now >> 32);
89
90 return now;
91}
92
93unsigned long get_timer_masked(void)
94{
95 return tick_to_time(get_ticks());
96}
97
98unsigned long get_timer(ulong base)
99{
100 return get_timer_masked() - base;
101}
102
103/* delay x useconds and preserve advance timstamp value */
104void __udelay(unsigned long usec)
105{
106 unsigned long long start;
107 unsigned long tmo;
108
109 start = get_ticks(); /* get current timestamp */
110 tmo = us_to_tick(usec); /* convert usecs to ticks */
111
112 while ((get_ticks() - start) < tmo)
113 ; /* loop till time has passed */
114}
115
116/*
117 * This function is derived from PowerPC code (timebase clock frequency).
118 * On ARM it returns the number of timer ticks per second.
119 */
120unsigned long get_tbclk(void)
121{
122 unsigned long freq;
123
124 asm volatile("mrc p15, 0, %0, c14, c0, 0" : "=r" (freq));
125
126 return freq;
127}