Andre Przywara | b652b69 | 2022-12-18 00:12:07 +0000 | [diff] [blame] | 1 | config DRAM_SUN20I_D1 |
| 2 | bool |
| 3 | depends on ARCH_SUNXI |
| 4 | help |
| 5 | This enables support for the DRAM controller driver covering |
| 6 | the Allwinner D1/R528/T113s SoCs. |
Andre Przywara | ffec940 | 2022-12-31 18:38:21 +0000 | [diff] [blame] | 7 | |
| 8 | if DRAM_SUN20I_D1 |
| 9 | |
| 10 | config DRAM_SUNXI_ODT_EN |
| 11 | hex "DRAM ODT EN parameter" |
| 12 | help |
| 13 | ODT EN value from vendor DRAM settings. |
| 14 | |
| 15 | config DRAM_SUNXI_TPR0 |
| 16 | hex "DRAM TPR0 parameter" |
| 17 | help |
| 18 | TPR0 value from vendor DRAM settings. |
| 19 | |
| 20 | config DRAM_SUNXI_TPR11 |
| 21 | hex "DRAM TPR11 parameter" |
| 22 | help |
| 23 | TPR11 value from vendor DRAM settings. |
| 24 | |
| 25 | config DRAM_SUNXI_TPR12 |
| 26 | hex "DRAM TPR12 parameter" |
| 27 | help |
| 28 | TPR12 value from vendor DRAM settings. |
| 29 | |
| 30 | config DRAM_SUNXI_TPR13 |
| 31 | hex "DRAM TPR13 parameter" |
| 32 | help |
| 33 | TPR13 value from vendor DRAM settings. It tells which features |
| 34 | should be configured. |
| 35 | |
| 36 | choice |
| 37 | prompt "DRAM chip type" |
| 38 | default SUNXI_DRAM_TYPE_DDR3 if DRAM_SUN20I_D1 |
| 39 | |
| 40 | config SUNXI_DRAM_TYPE_DDR2 |
| 41 | bool "DDR2 chips" |
| 42 | |
| 43 | config SUNXI_DRAM_TYPE_DDR3 |
| 44 | bool "DDR3 chips" |
| 45 | |
| 46 | config SUNXI_DRAM_TYPE_LPDDR2 |
| 47 | bool "LPDDR2 chips" |
| 48 | |
| 49 | config SUNXI_DRAM_TYPE_LPDDR3 |
| 50 | bool "LPDDR3 chips" |
| 51 | endchoice |
| 52 | |
| 53 | config SUNXI_DRAM_TYPE |
| 54 | int |
| 55 | default 2 if SUNXI_DRAM_TYPE_DDR2 |
| 56 | default 3 if SUNXI_DRAM_TYPE_DDR3 |
| 57 | default 6 if SUNXI_DRAM_TYPE_LPDDR2 |
| 58 | default 7 if SUNXI_DRAM_TYPE_LPDDR3 |
| 59 | |
| 60 | endif |