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Tom Rini10e47792018-05-06 17:58:06 -04001// SPDX-License-Identifier: GPL-2.0+
Michal Simeke60148d2014-01-14 14:21:52 +01002/*
Michal Simek98d0f1f2018-01-17 07:37:47 +01003 * (C) Copyright 2014 - 2017 Xilinx, Inc. Michal Simek
Michal Simeke60148d2014-01-14 14:21:52 +01004 */
5#include <common.h>
Simon Glass091f6a32015-10-17 19:41:22 -06006#include <debug_uart.h>
Simon Glassf11478f2019-12-28 10:45:07 -07007#include <hang.h>
Simon Glass2dc9c342020-05-10 11:40:01 -06008#include <image.h>
Michal Simeke60148d2014-01-14 14:21:52 +01009#include <spl.h>
Michal Simekdb2337c2020-02-18 15:03:13 +010010#include <generated/dt.h>
Michal Simeke60148d2014-01-14 14:21:52 +010011
12#include <asm/io.h>
Michal Simek162c6372014-08-11 14:03:15 +020013#include <asm/spl.h>
Simon Glass122216d2015-10-17 19:41:21 -060014#include <asm/arch/hardware.h>
Michal Simeke60148d2014-01-14 14:21:52 +010015#include <asm/arch/sys_proto.h>
Michal Simek85dc76a2017-11-08 16:14:47 +010016#include <asm/arch/ps7_init_gpl.h>
Michal Simeke60148d2014-01-14 14:21:52 +010017
Michal Simeke60148d2014-01-14 14:21:52 +010018void board_init_f(ulong dummy)
19{
20 ps7_init();
21
Michal Simeke60148d2014-01-14 14:21:52 +010022 arch_cpu_init();
Michal Simeke533ad22018-04-19 12:36:48 +020023
24#ifdef CONFIG_DEBUG_UART
25 /* Uart debug for sure */
26 debug_uart_init();
27 puts("Debug uart enabled\n"); /* or printch() */
28#endif
Michal Simeke60148d2014-01-14 14:21:52 +010029}
30
Michal Simeka831f1f2014-04-25 12:15:40 +020031#ifdef CONFIG_SPL_BOARD_INIT
32void spl_board_init(void)
33{
Simon Glasse04843d2015-10-19 06:50:02 -060034 preloader_console_init();
Luis Araneda7d9405a2018-07-19 03:10:18 -040035#if defined(CONFIG_ARCH_EARLY_INIT_R) && defined(CONFIG_SPL_FPGA_SUPPORT)
36 arch_early_init_r();
37#endif
Michal Simeka831f1f2014-04-25 12:15:40 +020038 board_init();
39}
40#endif
41
Michal Simeke60148d2014-01-14 14:21:52 +010042u32 spl_boot_device(void)
43{
44 u32 mode;
45
46 switch ((zynq_slcr_get_boot_mode()) & ZYNQ_BM_MASK) {
47#ifdef CONFIG_SPL_SPI_SUPPORT
48 case ZYNQ_BM_QSPI:
Michal Simeke60148d2014-01-14 14:21:52 +010049 mode = BOOT_DEVICE_SPI;
50 break;
51#endif
Michal Simek25830022015-01-13 16:04:10 +010052 case ZYNQ_BM_NAND:
53 mode = BOOT_DEVICE_NAND;
54 break;
55 case ZYNQ_BM_NOR:
56 mode = BOOT_DEVICE_NOR;
57 break;
Michal Simeke60148d2014-01-14 14:21:52 +010058#ifdef CONFIG_SPL_MMC_SUPPORT
59 case ZYNQ_BM_SD:
Michal Simeke60148d2014-01-14 14:21:52 +010060 mode = BOOT_DEVICE_MMC1;
61 break;
62#endif
Michal Simek25830022015-01-13 16:04:10 +010063 case ZYNQ_BM_JTAG:
64 mode = BOOT_DEVICE_RAM;
65 break;
Michal Simeke60148d2014-01-14 14:21:52 +010066 default:
67 puts("Unsupported boot mode selected\n");
68 hang();
69 }
70
71 return mode;
72}
73
Michal Simeke60148d2014-01-14 14:21:52 +010074#ifdef CONFIG_SPL_OS_BOOT
75int spl_start_uboot(void)
76{
77 /* boot linux */
78 return 0;
79}
80#endif
Masahiro Yamadac2d10792014-05-12 12:18:30 +090081
Michal Simek42c8c412016-05-10 07:55:52 +020082void spl_board_prepare_for_boot(void)
83{
84 ps7_post_config();
85 debug("SPL bye\n");
86}
87
Michal Simekf669e222016-05-03 14:20:17 +020088#ifdef CONFIG_SPL_LOAD_FIT
89int board_fit_config_name_match(const char *name)
90{
91 /* Just empty function now - can't decide what to choose */
Michal Simekdb2337c2020-02-18 15:03:13 +010092 debug("%s: Check %s, default %s\n", __func__, name, DEVICE_TREE);
Michal Simekf669e222016-05-03 14:20:17 +020093
Michal Simekdb2337c2020-02-18 15:03:13 +010094 if (!strcmp(name, DEVICE_TREE))
95 return 0;
96
97 return -1;
Michal Simekf669e222016-05-03 14:20:17 +020098}
99#endif