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Tom Rini10e47792018-05-06 17:58:06 -04001// SPDX-License-Identifier: GPL-2.0+
Fabio Estevam6cfa7122016-02-29 09:33:22 -03002/*
3 * Copyright (C) 2016 NXP Semiconductors
4 * Author: Fabio Estevam <fabio.estevam@nxp.com>
Fabio Estevam6cfa7122016-02-29 09:33:22 -03005 */
6
Simon Glassa7b51302019-11-14 12:57:46 -07007#include <init.h>
Simon Glass274e0b02020-05-10 11:39:56 -06008#include <net.h>
Fabio Estevam6cfa7122016-02-29 09:33:22 -03009#include <asm/arch/clock.h>
10#include <asm/arch/imx-regs.h>
11#include <asm/arch/mx7-pins.h>
12#include <asm/arch/sys_proto.h>
Simon Glass3ba929a2020-10-30 21:38:53 -060013#include <asm/global_data.h>
Fabio Estevam6cfa7122016-02-29 09:33:22 -030014#include <asm/gpio.h>
Bryan O'Donoghue1b60ee62018-04-24 18:46:33 +010015#include <asm/mach-imx/hab.h>
Stefano Babic33731bc2017-06-29 10:16:06 +020016#include <asm/mach-imx/iomux-v3.h>
Fabio Estevam6cfa7122016-02-29 09:33:22 -030017#include <asm/io.h>
18#include <common.h>
Simon Glass07dc93c2019-08-01 09:46:47 -060019#include <env.h>
Fabio Estevam6cfa7122016-02-29 09:33:22 -030020#include <asm/arch/crm_regs.h>
Kevin Hilman46fdd842016-12-16 13:08:10 -080021#include <netdev.h>
Vanessa Maegima4abedc82016-08-19 10:21:36 -030022#include <power/pmic.h>
23#include <power/pfuze3000_pmic.h>
24#include "../freescale/common/pfuze.h"
Bryan O'Donoghue1936c412018-03-26 15:27:34 +010025#include <asm/setup.h>
26#include <asm/bootm.h>
Fabio Estevam6cfa7122016-02-29 09:33:22 -030027
28DECLARE_GLOBAL_DATA_PTR;
29
Fabio Estevam6cfa7122016-02-29 09:33:22 -030030int dram_init(void)
31{
32 gd->ram_size = PHYS_SDRAM_SIZE;
33
Bryan O'Donoghue2adfdff2018-04-24 18:46:35 +010034 /* Subtract the defined OPTEE runtime firmware length */
35#ifdef CONFIG_OPTEE_TZDRAM_SIZE
36 gd->ram_size -= CONFIG_OPTEE_TZDRAM_SIZE;
37#endif
38
Fabio Estevam6cfa7122016-02-29 09:33:22 -030039 return 0;
40}
41
Marco Franchi3d73f522016-06-10 14:45:28 -030042static iomux_v3_cfg_t const wdog_pads[] = {
43 MX7D_PAD_GPIO1_IO00__WDOG1_WDOG_B | MUX_PAD_CTRL(NO_PAD_CTRL),
44};
45
Bryan O'Donoghue6f1eee62019-01-18 17:40:14 +000046#ifdef CONFIG_DM_PMIC
Vanessa Maegima4abedc82016-08-19 10:21:36 -030047int power_init_board(void)
48{
Bryan O'Donoghue6f1eee62019-01-18 17:40:14 +000049 struct udevice *dev;
50 int ret, dev_id, rev_id;
Vanessa Maegima4abedc82016-08-19 10:21:36 -030051
Joris Offougae19e7cc2020-01-29 22:05:58 +010052 ret = pmic_get("pfuze3000@8", &dev);
Bryan O'Donoghue6f1eee62019-01-18 17:40:14 +000053 if (ret == -ENODEV)
54 return 0;
55 if (ret != 0)
Vanessa Maegima4abedc82016-08-19 10:21:36 -030056 return ret;
57
Bryan O'Donoghue6f1eee62019-01-18 17:40:14 +000058 dev_id = pmic_reg_read(dev, PFUZE3000_DEVICEID);
59 rev_id = pmic_reg_read(dev, PFUZE3000_REVID);
60 printf("PMIC: PFUZE3000 DEV_ID=0x%x REV_ID=0x%x\n", dev_id, rev_id);
Vanessa Maegima4abedc82016-08-19 10:21:36 -030061
62 /* disable Low Power Mode during standby mode */
Fabio Estevam7ac7b962019-02-14 11:37:51 -020063 pmic_reg_write(dev, PFUZE3000_LDOGCTL, 1);
Vanessa Maegima4abedc82016-08-19 10:21:36 -030064
65 return 0;
66}
67#endif
68
Fabio Estevam6cfa7122016-02-29 09:33:22 -030069int board_init(void)
70{
71 /* address of boot parameters */
72 gd->bd->bi_boot_params = PHYS_SDRAM + 0x100;
73
74 return 0;
75}
76
77int checkboard(void)
78{
Fabio Estevamf8f21942016-08-25 21:07:20 -030079 char *mode;
80
81 if (IS_ENABLED(CONFIG_ARMV7_BOOT_SEC_DEFAULT))
82 mode = "secure";
83 else
84 mode = "non-secure";
85
Bryan O'Donoghue446dddd2018-04-24 18:46:36 +010086#ifdef CONFIG_OPTEE_TZDRAM_SIZE
87 unsigned long optee_start, optee_end;
88
89 optee_end = PHYS_SDRAM + PHYS_SDRAM_SIZE;
90 optee_start = optee_end - CONFIG_OPTEE_TZDRAM_SIZE;
91
92 printf("Board: WARP7 in %s mode OPTEE DRAM 0x%08lx-0x%08lx\n",
93 mode, optee_start, optee_end);
94#else
Fabio Estevamf8f21942016-08-25 21:07:20 -030095 printf("Board: WARP7 in %s mode\n", mode);
Bryan O'Donoghue446dddd2018-04-24 18:46:36 +010096#endif
Fabio Estevam6cfa7122016-02-29 09:33:22 -030097
98 return 0;
99}
100
Marco Franchi3d73f522016-06-10 14:45:28 -0300101int board_late_init(void)
102{
103 struct wdog_regs *wdog = (struct wdog_regs *)WDOG1_BASE_ADDR;
Tom Riniae21e7f2021-08-30 09:16:29 -0400104#ifdef CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG
Bryan O'Donoghue1936c412018-03-26 15:27:34 +0100105 struct tag_serialnr serialnr;
106 char serial_string[0x20];
107#endif
Marco Franchi3d73f522016-06-10 14:45:28 -0300108
109 imx_iomux_v3_setup_multiple_pads(wdog_pads, ARRAY_SIZE(wdog_pads));
110
111 set_wdog_reset(wdog);
112
113 /*
114 * Do not assert internal WDOG_RESET_B_DEB(controlled by bit 4),
115 * since we use PMIC_PWRON to reset the board.
116 */
117 clrsetbits_le16(&wdog->wcr, 0, 0x10);
118
Stefano Babicf8b509b2019-09-20 08:47:53 +0200119#ifdef CONFIG_IMX_HAB
Bryan O'Donoghue1b60ee62018-04-24 18:46:33 +0100120 /* Determine HAB state */
121 env_set_ulong(HAB_ENABLED_ENVNAME, imx_hab_is_enabled());
122#else
123 env_set_ulong(HAB_ENABLED_ENVNAME, 0);
124#endif
125
Tom Riniae21e7f2021-08-30 09:16:29 -0400126#ifdef CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG
Bryan O'Donoghue1936c412018-03-26 15:27:34 +0100127 /* Set serial# standard environment variable based on OTP settings */
128 get_board_serial(&serialnr);
129 snprintf(serial_string, sizeof(serial_string), "WaRP7-0x%08x%08x",
130 serialnr.low, serialnr.high);
131 env_set("serial#", serial_string);
132#endif
133
Marco Franchi3d73f522016-06-10 14:45:28 -0300134 return 0;
135}