Alexey Brodkin | 9aea028 | 2014-05-21 14:39:32 +0400 | [diff] [blame] | 1 | /* |
| 2 | * Copyright (C) 2011-2014 Pierrick Hascoet, Abilis Systems |
| 3 | * |
| 4 | * SPDX-License-Identifier: GPL-2.0+ |
| 5 | */ |
| 6 | |
| 7 | #ifndef _CONFIG_TB100_H_ |
| 8 | #define _CONFIG_TB100_H_ |
| 9 | |
| 10 | #include <linux/sizes.h> |
| 11 | |
| 12 | /* |
| 13 | * CPU configuration |
| 14 | */ |
| 15 | #define CONFIG_ARC700 |
| 16 | #define CONFIG_ARC_MMU_VER 3 |
| 17 | #define CONFIG_SYS_CACHELINE_SIZE 32 |
Alexey Brodkin | 9aea028 | 2014-05-21 14:39:32 +0400 | [diff] [blame] | 18 | #define CONFIG_SYS_TIMER_RATE CONFIG_SYS_CLK_FREQ |
| 19 | |
| 20 | /* |
| 21 | * Board configuration |
| 22 | */ |
| 23 | #define CONFIG_SYS_GENERIC_BOARD |
| 24 | #define CONFIG_ARCH_EARLY_INIT_R |
| 25 | |
| 26 | /* |
| 27 | * Memory configuration |
| 28 | */ |
| 29 | #define CONFIG_SYS_TEXT_BASE 0x84000000 |
| 30 | #define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_TEXT_BASE |
| 31 | |
| 32 | #define CONFIG_SYS_DDR_SDRAM_BASE 0x80000000 |
| 33 | #define CONFIG_SYS_SDRAM_BASE CONFIG_SYS_DDR_SDRAM_BASE |
| 34 | #define CONFIG_SYS_SDRAM_SIZE SZ_128M |
| 35 | |
| 36 | #define CONFIG_SYS_INIT_SP_ADDR \ |
| 37 | (CONFIG_SYS_SDRAM_BASE + 0x1000 - GENERATED_GBL_DATA_SIZE) |
| 38 | |
| 39 | #define CONFIG_SYS_MALLOC_LEN SZ_128K |
| 40 | #define CONFIG_SYS_BOOTM_LEN SZ_32M |
| 41 | #define CONFIG_SYS_LOAD_ADDR 0x82000000 |
| 42 | |
| 43 | #define CONFIG_SYS_NO_FLASH |
| 44 | |
| 45 | /* |
| 46 | * UART configuration |
| 47 | */ |
| 48 | #define CONFIG_CONS_INDEX 1 |
| 49 | #define CONFIG_SYS_NS16550 |
| 50 | #define CONFIG_SYS_NS16550_SERIAL |
| 51 | #define CONFIG_SYS_NS16550_REG_SIZE -4 |
| 52 | #define CONFIG_SYS_NS16550_CLK 166666666 |
| 53 | #define CONFIG_SYS_NS16550_COM1 0xFF100000 |
| 54 | #define CONFIG_SYS_NS16550_MEM32 |
| 55 | |
| 56 | #define CONFIG_BAUDRATE 115200 |
| 57 | |
| 58 | /* |
| 59 | * Ethernet PHY configuration |
| 60 | */ |
| 61 | #define CONFIG_PHYLIB |
| 62 | #define CONFIG_PHY_GIGE |
| 63 | |
| 64 | /* |
| 65 | * Even though the board houses Realtek RTL8211E PHY |
| 66 | * corresponding PHY driver (drivers/net/phy/realtek.c) behaves unexpectedly. |
| 67 | * In particular "parse_status" reports link is down. |
| 68 | * |
| 69 | * Until Realtek PHY driver is fixed fall back to generic PHY driver |
| 70 | * which implements all required functionality and behaves much more stable. |
| 71 | * |
| 72 | * #define CONFIG_PHY_REALTEK |
| 73 | * |
| 74 | */ |
| 75 | |
| 76 | /* |
| 77 | * Ethernet configuration |
| 78 | */ |
| 79 | #define CONFIG_DESIGNWARE_ETH |
| 80 | #define ETH0_BASE_ADDRESS 0xFE100000 |
| 81 | #define ETH1_BASE_ADDRESS 0xFE110000 |
| 82 | |
| 83 | /* |
| 84 | * Command line configuration |
| 85 | */ |
| 86 | #include <config_cmd_default.h> |
| 87 | |
| 88 | #define CONFIG_CMD_DHCP |
| 89 | #define CONFIG_CMD_ELF |
| 90 | #define CONFIG_CMD_PING |
| 91 | |
| 92 | #define CONFIG_OF_LIBFDT |
| 93 | |
| 94 | #define CONFIG_AUTO_COMPLETE |
| 95 | #define CONFIG_SYS_MAXARGS 16 |
| 96 | |
| 97 | /* |
| 98 | * Environment settings |
| 99 | */ |
| 100 | #define CONFIG_ENV_IS_NOWHERE |
| 101 | #define CONFIG_ENV_SIZE SZ_2K |
| 102 | #define CONFIG_ENV_OFFSET 0 |
| 103 | |
| 104 | /* |
| 105 | * Environment configuration |
| 106 | */ |
| 107 | #define CONFIG_BOOTDELAY 3 |
| 108 | #define CONFIG_BOOTFILE "uImage" |
| 109 | #define CONFIG_BOOTARGS "console=ttyS0,115200n8" |
| 110 | #define CONFIG_LOADADDR CONFIG_SYS_LOAD_ADDR |
| 111 | |
| 112 | /* |
| 113 | * Console configuration |
| 114 | */ |
| 115 | #define CONFIG_SYS_LONGHELP |
| 116 | #define CONFIG_SYS_PROMPT "[tb100]:~# " |
| 117 | #define CONFIG_SYS_CBSIZE 256 |
| 118 | #define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE |
| 119 | #define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + \ |
| 120 | sizeof(CONFIG_SYS_PROMPT) + 16) |
| 121 | |
| 122 | #endif /* _CONFIG_TB100_H_ */ |