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git01.mediatek.com / filogic / uboot / 9569c93fc7e7692ab84a060c3acb89e0d7714b2a / . / arch / arm / dts / stm32f769-disco.dts
blob: d63cd2ba7eb4c7cac490fc4e1c87f9c52b1ef768 [file] [log] [blame]
Patrick Delaunayc5c90692019-11-06 16:16:32 +0100[diff] [blame]1// SPDX-License-Identifier: GPL-2.0+ OR X11
Vikas Manochad3cc5cf2017-04-10 15:03:06 -0700[diff] [blame]2/*
Patrice Chotard24dffa52019-02-19 16:49:05 +0100[diff] [blame]3 * Copyright 2017 - Vikas MANOCHA <vikas.manocha@st.com>
Vikas Manochad3cc5cf2017-04-10 15:03:06 -0700[diff] [blame]4 *
Vikas Manochad3cc5cf2017-04-10 15:03:06 -0700[diff] [blame]5 */
6
7/dts-v1/;
8#include "stm32f746.dtsi"
Patrice Chotard24dffa52019-02-19 16:49:05 +0100[diff] [blame]9#include "stm32f769-pinctrl.dtsi"
10#include <dt-bindings/input/input.h>
Patrice Chotard5d8af922018-08-06 09:38:17 +0200[diff] [blame]11#include <dt-bindings/gpio/gpio.h>
Vikas Manochad3cc5cf2017-04-10 15:03:06 -0700[diff] [blame]12
13/ {
14 model = "STMicroelectronics STM32F769-DISCO board";
Patrice Chotard24dffa52019-02-19 16:49:05 +0100[diff] [blame]15 compatible = "st,stm32f769-disco", "st,stm32f769";
Vikas Manochad3cc5cf2017-04-10 15:03:06 -0700[diff] [blame]16
17 chosen {
Patrice Chotard24dffa52019-02-19 16:49:05 +0100[diff] [blame]18 bootargs = "root=/dev/ram";
Vikas Manochad3cc5cf2017-04-10 15:03:06 -0700[diff] [blame]19 stdout-path = "serial0:115200n8";
20 };
21
Patrice Chotard62f56162020-11-06 08:11:58 +0100[diff] [blame]22 memory@c0000000 {
Patrick Delaunayc5c90692019-11-06 16:16:32 +0100[diff] [blame]23 device_type = "memory";
Vikas Manochad3cc5cf2017-04-10 15:03:06 -0700[diff] [blame]24 reg = <0xC0000000 0x1000000>;
25 };
26
27 aliases {
28 serial0 = &usart1;
Vikas Manochad3cc5cf2017-04-10 15:03:06 -0700[diff] [blame]29 };
Vikas Manochad3cc5cf2017-04-10 15:03:06 -0700[diff] [blame]30
Patrice Chotard24dffa52019-02-19 16:49:05 +0100[diff] [blame]31 leds {
32 compatible = "gpio-leds";
Patrice Chotard62f56162020-11-06 08:11:58 +0100[diff] [blame]33 led-green {
Patrice Chotard24dffa52019-02-19 16:49:05 +0100[diff] [blame]34 gpios = <&gpioj 5 GPIO_ACTIVE_HIGH>;
35 linux,default-trigger = "heartbeat";
Vikas Manochad3cc5cf2017-04-10 15:03:06 -0700[diff] [blame]36 };
Patrice Chotard62f56162020-11-06 08:11:58 +0100[diff] [blame]37 led-red {
Patrice Chotard24dffa52019-02-19 16:49:05 +0100[diff] [blame]38 gpios = <&gpioj 13 GPIO_ACTIVE_HIGH>;
Vikas Manochad3cc5cf2017-04-10 15:03:06 -0700[diff] [blame]39 };
40 };
41
Patrice Chotard83975322022-09-23 13:20:33 +0200[diff] [blame]42 gpio-keys {
Patrice Chotard24dffa52019-02-19 16:49:05 +0100[diff] [blame]43 compatible = "gpio-keys";
Patrice Chotard24dffa52019-02-19 16:49:05 +0100[diff] [blame]44 autorepeat;
Patrice Chotard83975322022-09-23 13:20:33 +0200[diff] [blame]45 button-0 {
Patrice Chotard24dffa52019-02-19 16:49:05 +0100[diff] [blame]46 label = "User";
47 linux,code = <KEY_HOME>;
48 gpios = <&gpioa 0 GPIO_ACTIVE_HIGH>;
49 };
50 };
51
52 usbotg_hs_phy: usb-phy {
53 #phy-cells = <0>;
54 compatible = "usb-nop-xceiv";
55 clocks = <&rcc 0 STM32F7_AHB1_CLOCK(OTGHSULPI)>;
56 clock-names = "main_clk";
57 };
58
59 mmc_vcard: mmc_vcard {
60 compatible = "regulator-fixed";
61 regulator-name = "mmc_vcard";
62 regulator-min-microvolt = <3300000>;
63 regulator-max-microvolt = <3300000>;
64 };
Vikas Manochad3cc5cf2017-04-10 15:03:06 -0700[diff] [blame]65};
66
Patrick Delaunayc5c90692019-11-06 16:16:32 +0100[diff] [blame]67&rcc {
68 compatible = "st,stm32f769-rcc", "st,stm32f746-rcc", "st,stm32-rcc";
69};
70
Patrice Chotard24dffa52019-02-19 16:49:05 +0100[diff] [blame]71&cec {
72 pinctrl-0 = <&cec_pins_a>;
73 pinctrl-names = "default";
74 status = "okay";
75};
76
77&clk_hse {
78 clock-frequency = <25000000>;
79};
80
81&i2c1 {
82 pinctrl-0 = <&i2c1_pins_b>;
Vikas Manochad3cc5cf2017-04-10 15:03:06 -0700[diff] [blame]83 pinctrl-names = "default";
Patrice Chotard24dffa52019-02-19 16:49:05 +0100[diff] [blame]84 i2c-scl-rising-time-ns = <185>;
85 i2c-scl-falling-time-ns = <20>;
Vikas Manochad3cc5cf2017-04-10 15:03:06 -0700[diff] [blame]86 status = "okay";
Vikas Manochad3cc5cf2017-04-10 15:03:06 -0700[diff] [blame]87};
Patrice Chotard0d24b0d2017-12-12 10:14:59 +0100[diff] [blame]88
Dario Binacchi2b00e182023-11-11 11:44:36 +0100[diff] [blame]89&ltdc {
90 status = "okay";
91};
92
Patrice Chotard24dffa52019-02-19 16:49:05 +0100[diff] [blame]93&rtc {
94 status = "okay";
95};
96
Patrice Chotard0d24b0d2017-12-12 10:14:59 +0100[diff] [blame]97&sdio2 {
98 status = "okay";
Patrice Chotard24dffa52019-02-19 16:49:05 +0100[diff] [blame]99 vmmc-supply = <&mmc_vcard>;
Patrice Chotard5d8af922018-08-06 09:38:17 +0200[diff] [blame]100 cd-gpios = <&gpioi 15 GPIO_ACTIVE_LOW>;
Patrice Chotard24dffa52019-02-19 16:49:05 +0100[diff] [blame]101 broken-cd;
Patrice Chotard0d24b0d2017-12-12 10:14:59 +0100[diff] [blame]102 pinctrl-names = "default", "opendrain";
103 pinctrl-0 = <&sdio_pins_b>;
104 pinctrl-1 = <&sdio_pins_od_b>;
105 bus-width = <4>;
Patrice Chotard24dffa52019-02-19 16:49:05 +0100[diff] [blame]106};
107
Patrice Chotard83975322022-09-23 13:20:33 +0200[diff] [blame]108&timers5 {
109 /* Override timer5 to act as clockevent */
110 compatible = "st,stm32-timer";
111 interrupts = <50>;
112 status = "okay";
113 /delete-property/#address-cells;
114 /delete-property/#size-cells;
115 /delete-property/clock-names;
116 /delete-node/pwm;
117 /delete-node/timer@4;
118};
119
Patrice Chotard24dffa52019-02-19 16:49:05 +0100[diff] [blame]120&usart1 {
121 pinctrl-0 = <&usart1_pins_a>;
122 pinctrl-names = "default";
123 status = "okay";
124};
125
126&usbotg_hs {
127 dr_mode = "otg";
128 phys = <&usbotg_hs_phy>;
129 phy-names = "usb2-phy";
130 pinctrl-0 = <&usbotg_hs_pins_a>;
131 pinctrl-names = "default";
132 status = "okay";
Patrice Chotard0d24b0d2017-12-12 10:14:59 +0100[diff] [blame]133};