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git01.mediatek.com / filogic / uboot / 9569c93fc7e7692ab84a060c3acb89e0d7714b2a / . / arch / arm / dts / rk3566-anbernic-rgxx3.dtsi
blob: 8cbf3d9a4f22ee975fe45616c31c71f351597b0b [file] [log] [blame]
Chris Morgan8c4e3042023-04-21 10:59:19 -0500[diff] [blame]1// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
2
3/dts-v1/;
4
5#include <dt-bindings/gpio/gpio.h>
6#include <dt-bindings/input/linux-event-codes.h>
7#include <dt-bindings/leds/common.h>
8#include <dt-bindings/pinctrl/rockchip.h>
9#include <dt-bindings/soc/rockchip,vop2.h>
10#include "rk3566.dtsi"
11
12/ {
13 chosen: chosen {
14 stdout-path = "serial2:1500000n8";
15 };
16
17 adc-joystick {
18 compatible = "adc-joystick";
19 io-channels = <&adc_mux 0>,
20 <&adc_mux 1>,
21 <&adc_mux 2>,
22 <&adc_mux 3>;
23 pinctrl-0 = <&joy_mux_en>;
24 pinctrl-names = "default";
25 poll-interval = <60>;
26 #address-cells = <1>;
27 #size-cells = <0>;
28
29 axis@0 {
30 reg = <0>;
31 abs-flat = <32>;
32 abs-fuzz = <32>;
33 abs-range = <1023 15>;
34 linux,code = <ABS_X>;
35 };
36
37 axis@1 {
38 reg = <1>;
39 abs-flat = <32>;
40 abs-fuzz = <32>;
41 abs-range = <15 1023>;
42 linux,code = <ABS_RX>;
43 };
44
45 axis@2 {
46 reg = <2>;
47 abs-flat = <32>;
48 abs-fuzz = <32>;
49 abs-range = <15 1023>;
50 linux,code = <ABS_Y>;
51 };
52
53 axis@3 {
54 reg = <3>;
55 abs-flat = <32>;
56 abs-fuzz = <32>;
57 abs-range = <1023 15>;
58 linux,code = <ABS_RY>;
59 };
60 };
61
62 adc_keys: adc-keys {
63 compatible = "adc-keys";
64 io-channels = <&saradc 0>;
65 io-channel-names = "buttons";
66 keyup-threshold-microvolt = <1800000>;
67 poll-interval = <60>;
68
69 /*
70 * Button is mapped to F key in BSP kernel, but
71 * according to input guidelines it should be mode.
72 */
73 button-mode {
74 label = "MODE";
75 linux,code = <BTN_MODE>;
76 press-threshold-microvolt = <1750>;
77 };
78 };
79
80 adc_mux: adc-mux {
81 compatible = "io-channel-mux";
82 channels = "left_x", "right_x", "left_y", "right_y";
83 #io-channel-cells = <1>;
84 io-channels = <&saradc 3>;
85 io-channel-names = "parent";
86 mux-controls = <&gpio_mux>;
87 settle-time-us = <100>;
88 };
89
90 gpio_keys_control: gpio-keys-control {
91 compatible = "gpio-keys";
92 pinctrl-0 = <&btn_pins_ctrl>;
93 pinctrl-names = "default";
94
95 button-b {
96 gpios = <&gpio3 RK_PC3 GPIO_ACTIVE_LOW>;
97 label = "SOUTH";
98 linux,code = <BTN_SOUTH>;
99 };
100
101 button-down {
102 gpios = <&gpio3 RK_PA4 GPIO_ACTIVE_LOW>;
103 label = "DPAD-DOWN";
104 linux,code = <BTN_DPAD_DOWN>;
105 };
106
107 button-l1 {
108 gpios = <&gpio3 RK_PB1 GPIO_ACTIVE_LOW>;
109 label = "TL";
110 linux,code = <BTN_TL>;
111 };
112
113 button-l2 {
114 gpios = <&gpio3 RK_PB2 GPIO_ACTIVE_LOW>;
115 label = "TL2";
116 linux,code = <BTN_TL2>;
117 };
118
119 button-select {
120 gpios = <&gpio3 RK_PB6 GPIO_ACTIVE_LOW>;
121 label = "SELECT";
122 linux,code = <BTN_SELECT>;
123 };
124
125 button-start {
126 gpios = <&gpio3 RK_PB5 GPIO_ACTIVE_LOW>;
127 label = "START";
128 linux,code = <BTN_START>;
129 };
130
131 button-thumbl {
132 gpios = <&gpio3 RK_PA1 GPIO_ACTIVE_LOW>;
133 label = "THUMBL";
134 linux,code = <BTN_THUMBL>;
135 };
136
137 button-thumbr {
138 gpios = <&gpio3 RK_PA2 GPIO_ACTIVE_LOW>;
139 label = "THUMBR";
140 linux,code = <BTN_THUMBR>;
141 };
142
143 button-up {
144 gpios = <&gpio3 RK_PA3 GPIO_ACTIVE_LOW>;
145 label = "DPAD-UP";
146 linux,code = <BTN_DPAD_UP>;
147 };
148
149 button-x {
150 gpios = <&gpio3 RK_PC0 GPIO_ACTIVE_LOW>;
151 label = "NORTH";
152 linux,code = <BTN_NORTH>;
153 };
154 };
155
156 gpio_keys_vol: gpio-keys-vol {
157 compatible = "gpio-keys";
158 autorepeat;
159 pinctrl-0 = <&btn_pins_vol>;
160 pinctrl-names = "default";
161
162 button-vol-down {
163 gpios = <&gpio3 RK_PB0 GPIO_ACTIVE_LOW>;
164 label = "VOLUMEDOWN";
165 linux,code = <KEY_VOLUMEDOWN>;
166 };
167
168 button-vol-up {
169 gpios = <&gpio3 RK_PA7 GPIO_ACTIVE_LOW>;
170 label = "VOLUMEUP";
171 linux,code = <KEY_VOLUMEUP>;
172 };
173 };
174
175 gpio_mux: mux-controller {
176 compatible = "gpio-mux";
177 mux-gpios = <&gpio0 RK_PB6 GPIO_ACTIVE_LOW>,
178 <&gpio0 RK_PB7 GPIO_ACTIVE_LOW>;
179 #mux-control-cells = <0>;
180 };
181
182 hdmi-con {
183 compatible = "hdmi-connector";
184 ddc-i2c-bus = <&i2c5>;
185 type = "c";
186
187 port {
188 hdmi_con_in: endpoint {
189 remote-endpoint = <&hdmi_out_con>;
190 };
191 };
192 };
193
Jonas Karlman72e5e282024-01-26 22:14:49 +0000[diff] [blame]194 leds: pwm-leds {
195 compatible = "pwm-leds";
Chris Morgan8c4e3042023-04-21 10:59:19 -0500[diff] [blame]196
197 green_led: led-0 {
198 color = <LED_COLOR_ID_GREEN>;
199 default-state = "on";
200 function = LED_FUNCTION_POWER;
Jonas Karlman72e5e282024-01-26 22:14:49 +0000[diff] [blame]201 max-brightness = <255>;
202 pwms = <&pwm6 0 25000 0>;
Chris Morgan8c4e3042023-04-21 10:59:19 -0500[diff] [blame]203 };
204
205 amber_led: led-1 {
206 color = <LED_COLOR_ID_AMBER>;
207 function = LED_FUNCTION_CHARGING;
Jonas Karlman72e5e282024-01-26 22:14:49 +0000[diff] [blame]208 max-brightness = <255>;
209 pwms = <&pwm7 0 25000 0>;
Chris Morgan8c4e3042023-04-21 10:59:19 -0500[diff] [blame]210 };
211
212 red_led: led-2 {
213 color = <LED_COLOR_ID_RED>;
214 default-state = "off";
215 function = LED_FUNCTION_STATUS;
Jonas Karlman72e5e282024-01-26 22:14:49 +0000[diff] [blame]216 max-brightness = <255>;
217 pwms = <&pwm0 0 25000 0>;
Chris Morgan8c4e3042023-04-21 10:59:19 -0500[diff] [blame]218 };
219 };
220
221 sdio_pwrseq: sdio-pwrseq {
222 compatible = "mmc-pwrseq-simple";
223 clocks = <&rk817 1>;
224 clock-names = "ext_clock";
225 pinctrl-0 = <&wifi_enable_h>;
226 pinctrl-names = "default";
227 post-power-on-delay-ms = <200>;
228 reset-gpios = <&gpio4 RK_PA2 GPIO_ACTIVE_LOW>;
229 };
230
231 vcc3v3_lcd0_n: regulator-vcc3v3-lcd0 {
232 compatible = "regulator-fixed";
233 gpio = <&gpio0 RK_PC2 GPIO_ACTIVE_HIGH>;
234 enable-active-high;
235 pinctrl-0 = <&vcc_lcd_h>;
236 pinctrl-names = "default";
237 regulator-boot-on;
238 regulator-min-microvolt = <3300000>;
239 regulator-max-microvolt = <3300000>;
240 regulator-name = "vcc3v3_lcd0_n";
241 vin-supply = <&vcc_3v3>;
242 regulator-state-mem {
243 regulator-off-in-suspend;
244 };
245 };
246
247 vcc_sys: regulator-vcc-sys {
248 compatible = "regulator-fixed";
249 regulator-always-on;
250 regulator-boot-on;
251 regulator-min-microvolt = <3800000>;
252 regulator-max-microvolt = <3800000>;
253 regulator-name = "vcc_sys";
254 };
255
256 vcc_wifi: regulator-vcc-wifi {
257 compatible = "regulator-fixed";
258 enable-active-high;
259 gpio = <&gpio0 RK_PA0 GPIO_ACTIVE_HIGH>;
260 pinctrl-0 = <&vcc_wifi_h>;
261 pinctrl-names = "default";
262 regulator-always-on;
263 regulator-boot-on;
264 regulator-min-microvolt = <3300000>;
265 regulator-max-microvolt = <3300000>;
266 regulator-name = "vcc_wifi";
267 };
268
269 vibrator: pwm-vibrator {
270 compatible = "pwm-vibrator";
271 pwm-names = "enable";
272 pwms = <&pwm5 0 1000000000 0>;
273 };
274};
275
276&combphy1 {
277 status = "okay";
278};
279
280&cpu0 {
281 cpu-supply = <&vdd_cpu>;
282};
283
284&cpu1 {
285 cpu-supply = <&vdd_cpu>;
286};
287
288&cpu2 {
289 cpu-supply = <&vdd_cpu>;
290};
291
292&cpu3 {
293 cpu-supply = <&vdd_cpu>;
294};
295
296&gpu {
297 mali-supply = <&vdd_gpu>;
298 status = "okay";
299};
300
301&hdmi {
302 ddc-i2c-bus = <&i2c5>;
303 pinctrl-0 = <&hdmitxm0_cec>;
304 pinctrl-names = "default";
305 status = "okay";
306};
307
308&hdmi_in {
309 hdmi_in_vp0: endpoint {
310 remote-endpoint = <&vp0_out_hdmi>;
311 };
312};
313
314&hdmi_out {
315 hdmi_out_con: endpoint {
316 remote-endpoint = <&hdmi_con_in>;
317 };
318};
319
320&hdmi_sound {
321 status = "okay";
322};
323
324&i2c0 {
325 status = "okay";
326
327 rk817: pmic@20 {
328 compatible = "rockchip,rk817";
329 reg = <0x20>;
330 interrupt-parent = <&gpio0>;
331 interrupts = <RK_PA3 IRQ_TYPE_LEVEL_LOW>;
332 clock-output-names = "rk808-clkout1", "rk808-clkout2";
333 clock-names = "mclk";
334 clocks = <&cru I2S1_MCLKOUT_TX>;
335 assigned-clocks = <&cru I2S1_MCLKOUT_TX>;
336 assigned-clock-parents = <&cru CLK_I2S1_8CH_TX>;
337 #clock-cells = <1>;
338 #sound-dai-cells = <0>;
339 pinctrl-names = "default";
340 pinctrl-0 = <&i2s1m0_mclk>, <&pmic_int_l>;
341 wakeup-source;
342
343 vcc1-supply = <&vcc_sys>;
344 vcc2-supply = <&vcc_sys>;
345 vcc3-supply = <&vcc_sys>;
346 vcc4-supply = <&vcc_sys>;
347 vcc5-supply = <&vcc_sys>;
348 vcc6-supply = <&vcc_sys>;
349 vcc7-supply = <&vcc_sys>;
350 vcc8-supply = <&vcc_sys>;
351 vcc9-supply = <&dcdc_boost>;
352
353 regulators {
354 vdd_logic: DCDC_REG1 {
355 regulator-always-on;
356 regulator-boot-on;
357 regulator-min-microvolt = <500000>;
358 regulator-max-microvolt = <1350000>;
Chris Morgan8c4e3042023-04-21 10:59:19 -0500[diff] [blame]359 regulator-ramp-delay = <6001>;
360 regulator-initial-mode = <0x2>;
361 regulator-name = "vdd_logic";
362 regulator-state-mem {
363 regulator-off-in-suspend;
364 regulator-suspend-microvolt = <900000>;
365 };
366 };
367
368 vdd_gpu: DCDC_REG2 {
369 regulator-always-on;
370 regulator-boot-on;
371 regulator-min-microvolt = <500000>;
372 regulator-max-microvolt = <1350000>;
Chris Morgan8c4e3042023-04-21 10:59:19 -0500[diff] [blame]373 regulator-ramp-delay = <6001>;
374 regulator-initial-mode = <0x2>;
375 regulator-name = "vdd_gpu";
376 regulator-state-mem {
377 regulator-off-in-suspend;
378 };
379 };
380
381 vcc_ddr: DCDC_REG3 {
382 regulator-always-on;
383 regulator-boot-on;
384 regulator-initial-mode = <0x2>;
385 regulator-name = "vcc_ddr";
386 regulator-state-mem {
387 regulator-on-in-suspend;
388 };
389 };
390
391 vcc_3v3: DCDC_REG4 {
392 regulator-always-on;
393 regulator-boot-on;
394 regulator-min-microvolt = <3300000>;
395 regulator-max-microvolt = <3300000>;
396 regulator-initial-mode = <0x2>;
397 regulator-name = "vcc_3v3";
398 regulator-state-mem {
399 regulator-on-in-suspend;
400 regulator-suspend-microvolt = <3300000>;
401 };
402 };
403
404 vcca1v8_pmu: LDO_REG1 {
405 regulator-always-on;
406 regulator-boot-on;
407 regulator-min-microvolt = <1800000>;
408 regulator-max-microvolt = <1800000>;
409 regulator-name = "vcca1v8_pmu";
410 regulator-state-mem {
411 regulator-on-in-suspend;
412 regulator-suspend-microvolt = <1800000>;
413 };
414 };
415
416 vdda_0v9: LDO_REG2 {
417 regulator-always-on;
418 regulator-boot-on;
419 regulator-min-microvolt = <900000>;
420 regulator-max-microvolt = <900000>;
421 regulator-name = "vdda_0v9";
422 regulator-state-mem {
423 regulator-off-in-suspend;
424 };
425 };
426
427 vdda0v9_pmu: LDO_REG3 {
428 regulator-always-on;
429 regulator-boot-on;
430 regulator-min-microvolt = <900000>;
431 regulator-max-microvolt = <900000>;
432 regulator-name = "vdda0v9_pmu";
433 regulator-state-mem {
434 regulator-on-in-suspend;
435 regulator-suspend-microvolt = <900000>;
436 };
437 };
438
439 vccio_acodec: LDO_REG4 {
440 regulator-always-on;
441 regulator-boot-on;
442 regulator-min-microvolt = <3300000>;
443 regulator-max-microvolt = <3300000>;
444 regulator-name = "vccio_acodec";
445 regulator-state-mem {
446 regulator-off-in-suspend;
447 };
448 };
449
450 vccio_sd: LDO_REG5 {
451 regulator-always-on;
452 regulator-boot-on;
453 regulator-min-microvolt = <1800000>;
454 regulator-max-microvolt = <3300000>;
455 regulator-name = "vccio_sd";
456 regulator-state-mem {
457 regulator-off-in-suspend;
458 };
459 };
460
461 vcc3v3_pmu: LDO_REG6 {
462 regulator-always-on;
463 regulator-boot-on;
464 regulator-min-microvolt = <3300000>;
465 regulator-max-microvolt = <3300000>;
466 regulator-name = "vcc3v3_pmu";
467 regulator-state-mem {
468 regulator-on-in-suspend;
469 regulator-suspend-microvolt = <3300000>;
470 };
471 };
472
473 vcc_1v8: LDO_REG7 {
474 regulator-always-on;
475 regulator-boot-on;
476 regulator-min-microvolt = <1800000>;
477 regulator-max-microvolt = <1800000>;
478 regulator-name = "vcc_1v8";
479 regulator-state-mem {
480 regulator-off-in-suspend;
481 };
482 };
483
484 vcc1v8_dvp: LDO_REG8 {
485 regulator-always-on;
486 regulator-boot-on;
487 regulator-min-microvolt = <1800000>;
488 regulator-max-microvolt = <3300000>;
489 regulator-name = "vcc1v8_dvp";
490 regulator-state-mem {
491 regulator-off-in-suspend;
492 };
493 };
494
495 vcc2v8_dvp: LDO_REG9 {
496 regulator-always-on;
497 regulator-boot-on;
498 regulator-min-microvolt = <2800000>;
499 regulator-max-microvolt = <2800000>;
500 regulator-name = "vcc2v8_dvp";
501 regulator-state-mem {
502 regulator-off-in-suspend;
503 };
504 };
505
506 dcdc_boost: BOOST {
507 regulator-always-on;
508 regulator-boot-on;
509 regulator-min-microvolt = <4700000>;
510 regulator-max-microvolt = <5400000>;
511 regulator-name = "boost";
512 regulator-state-mem {
513 regulator-off-in-suspend;
514 };
515 };
516
517 otg_switch: OTG_SWITCH {
518 regulator-name = "otg_switch";
519 regulator-state-mem {
520 regulator-off-in-suspend;
521 };
522 };
523 };
524 };
525
526 vdd_cpu: regulator@40 {
527 compatible = "fcs,fan53555";
528 reg = <0x40>;
529 fcs,suspend-voltage-selector = <1>;
530 regulator-always-on;
531 regulator-boot-on;
532 regulator-min-microvolt = <712500>;
533 regulator-max-microvolt = <1390000>;
Chris Morgan8c4e3042023-04-21 10:59:19 -0500[diff] [blame]534 regulator-name = "vdd_cpu";
535 regulator-ramp-delay = <2300>;
536 vin-supply = <&vcc_sys>;
537 regulator-state-mem {
538 regulator-off-in-suspend;
539 };
540 };
541};
542
543&i2c1 {
544 /* Unknown/unused device at 0x3c */
545 status = "disabled";
546};
547
548&i2c5 {
549 pinctrl-0 = <&i2c5m1_xfer>;
550 pinctrl-names = "default";
551 status = "okay";
552};
553
554&i2s0_8ch {
555 status = "okay";
556};
557
558&i2s1_8ch {
559 pinctrl-0 = <&i2s1m0_sclktx
560 &i2s1m0_lrcktx
561 &i2s1m0_sdi0
562 &i2s1m0_sdo0>;
563 pinctrl-names = "default";
564 rockchip,trcm-sync-tx-only;
565 status = "okay";
566};
567
568&pinctrl {
569 gpio-btns {
570 btn_pins_ctrl: btn-pins-ctrl {
571 rockchip,pins =
572 <3 RK_PA1 RK_FUNC_GPIO &pcfg_pull_up>,
573 <3 RK_PA2 RK_FUNC_GPIO &pcfg_pull_up>,
574 <3 RK_PA3 RK_FUNC_GPIO &pcfg_pull_up>,
575 <3 RK_PA4 RK_FUNC_GPIO &pcfg_pull_up>,
576 <3 RK_PA5 RK_FUNC_GPIO &pcfg_pull_up>,
577 <3 RK_PA6 RK_FUNC_GPIO &pcfg_pull_up>,
578 <3 RK_PB1 RK_FUNC_GPIO &pcfg_pull_up>,
579 <3 RK_PB2 RK_FUNC_GPIO &pcfg_pull_up>,
580 <3 RK_PB3 RK_FUNC_GPIO &pcfg_pull_up>,
581 <3 RK_PB4 RK_FUNC_GPIO &pcfg_pull_up>,
582 <3 RK_PB5 RK_FUNC_GPIO &pcfg_pull_up>,
583 <3 RK_PB6 RK_FUNC_GPIO &pcfg_pull_up>,
584 <3 RK_PC0 RK_FUNC_GPIO &pcfg_pull_up>,
585 <3 RK_PC1 RK_FUNC_GPIO &pcfg_pull_up>,
586 <3 RK_PC2 RK_FUNC_GPIO &pcfg_pull_up>,
587 <3 RK_PC3 RK_FUNC_GPIO &pcfg_pull_up>;
588 };
589
590 btn_pins_vol: btn-pins-vol {
591 rockchip,pins =
592 <3 RK_PA7 RK_FUNC_GPIO &pcfg_pull_up>,
593 <3 RK_PB0 RK_FUNC_GPIO &pcfg_pull_up>;
594 };
595 };
596
Chris Morgan8c4e3042023-04-21 10:59:19 -0500[diff] [blame]597 joy-mux {
598 joy_mux_en: joy-mux-en {
599 rockchip,pins =
600 <0 RK_PB5 RK_FUNC_GPIO &pcfg_output_low>;
601 };
602 };
603
604 pmic {
605 pmic_int_l: pmic-int-l {
606 rockchip,pins =
607 <0 RK_PA3 RK_FUNC_GPIO &pcfg_pull_up>;
608 };
609 };
610
611 sdio-pwrseq {
612 wifi_enable_h: wifi-enable-h {
613 rockchip,pins =
614 <4 RK_PA2 RK_FUNC_GPIO &pcfg_pull_none>;
615 };
616 };
617
618 vcc3v3-lcd {
619 vcc_lcd_h: vcc-lcd-h {
620 rockchip,pins =
621 <0 RK_PC2 RK_FUNC_GPIO &pcfg_pull_none>;
622 };
623 };
624
625 vcc-wifi {
626 vcc_wifi_h: vcc-wifi-h {
627 rockchip,pins =
628 <0 RK_PA0 RK_FUNC_GPIO &pcfg_pull_none>;
629 };
630 };
631};
632
633&pmu_io_domains {
634 status = "okay";
635 pmuio1-supply = <&vcc3v3_pmu>;
636 pmuio2-supply = <&vcc3v3_pmu>;
637 vccio1-supply = <&vccio_acodec>;
638 vccio3-supply = <&vccio_sd>;
639 vccio4-supply = <&vcc_1v8>;
640 vccio5-supply = <&vcc_3v3>;
641 vccio6-supply = <&vcc1v8_dvp>;
642 vccio7-supply = <&vcc_3v3>;
643};
644
Jonas Karlman72e5e282024-01-26 22:14:49 +0000[diff] [blame]645&pwm0 {
646 pinctrl-0 = <&pwm0m1_pins>;
647 pinctrl-names = "default";
648 status = "okay";
649};
650
Chris Morgan8c4e3042023-04-21 10:59:19 -0500[diff] [blame]651&pwm5 {
652 status = "okay";
653};
654
Jonas Karlman72e5e282024-01-26 22:14:49 +0000[diff] [blame]655&pwm6 {
656 status = "okay";
657};
658
659&pwm7 {
660 status = "okay";
661};
662
Chris Morgan8c4e3042023-04-21 10:59:19 -0500[diff] [blame]663&saradc {
664 vref-supply = <&vcc_1v8>;
665 status = "okay";
666};
667
668&sdmmc0 {
669 bus-width = <4>;
670 cap-sd-highspeed;
671 cd-gpios = <&gpio0 RK_PA4 GPIO_ACTIVE_LOW>;
672 disable-wp;
673 pinctrl-0 = <&sdmmc0_bus4 &sdmmc0_clk &sdmmc0_cmd &sdmmc0_det>;
674 pinctrl-names = "default";
675 sd-uhs-sdr104;
676 vmmc-supply = <&vcc_3v3>;
677 vqmmc-supply = <&vccio_sd>;
678 status = "okay";
679};
680
681&sdmmc1 {
682 bus-width = <4>;
683 cap-sd-highspeed;
684 cd-gpios = <&gpio2 RK_PB2 GPIO_ACTIVE_LOW>;
685 disable-wp;
686 pinctrl-0 = <&sdmmc1_bus4 &sdmmc1_cmd &sdmmc1_clk &sdmmc1_det>;
687 pinctrl-names = "default";
688 sd-uhs-sdr104;
689 vmmc-supply = <&vcc_3v3>;
690 vqmmc-supply = <&vcc1v8_dvp>;
691 status = "okay";
692};
693
694&sdmmc2 {
695 bus-width = <4>;
696 cap-sd-highspeed;
697 cap-sdio-irq;
698 keep-power-in-suspend;
699 mmc-pwrseq = <&sdio_pwrseq>;
700 non-removable;
701 pinctrl-0 = <&sdmmc2m0_bus4 &sdmmc2m0_cmd &sdmmc2m0_clk>;
702 pinctrl-names = "default";
703 vmmc-supply = <&vcc_wifi>;
704 vqmmc-supply = <&vcca1v8_pmu>;
705 status = "okay";
706};
707
708&tsadc {
709 rockchip,hw-tshut-mode = <1>;
710 rockchip,hw-tshut-polarity = <0>;
711 status = "okay";
712};
713
714&uart1 {
715 pinctrl-0 = <&uart1m1_xfer &uart1m1_ctsn &uart1m1_rtsn>;
716 pinctrl-names = "default";
717 uart-has-rtscts;
718 status = "okay";
719
720 bluetooth {
721 compatible = "realtek,rtl8821cs-bt", "realtek,rtl8723bs-bt";
722 device-wake-gpios = <&gpio4 4 GPIO_ACTIVE_HIGH>;
723 enable-gpios = <&gpio4 3 GPIO_ACTIVE_HIGH>;
724 host-wake-gpios = <&gpio4 5 GPIO_ACTIVE_HIGH>;
725 };
726};
727
728&uart2 {
729 status = "okay";
730};
731
732/*
733 * Lack the schematics to verify, but port works as a peripheral
734 * (and not a host or OTG port).
735 */
736&usb_host0_xhci {
737 dr_mode = "peripheral";
738 phys = <&usb2phy0_otg>;
739 phy-names = "usb2-phy";
740 status = "okay";
741};
742
743&usb_host1_ehci {
744 status = "okay";
745};
746
747&usb_host1_ohci {
748 status = "okay";
749};
750
751&usb_host1_xhci {
752 phy-names = "usb2-phy", "usb3-phy";
753 phys = <&usb2phy1_host>, <&combphy1 PHY_TYPE_USB3>;
754 status = "okay";
755};
756
757&usb2phy0 {
758 status = "okay";
759};
760
761&usb2phy0_otg {
762 status = "okay";
763};
764
765&usb2phy1 {
766 status = "okay";
767};
768
769&usb2phy1_host {
770 status = "okay";
771};
772
773&vop {
774 assigned-clocks = <&cru DCLK_VOP0>, <&cru DCLK_VOP1>;
775 assigned-clock-parents = <&pmucru PLL_HPLL>, <&cru PLL_VPLL>;
776 status = "okay";
777};
778
779&vop_mmu {
780 status = "okay";
781};
782
783&vp0 {
784 vp0_out_hdmi: endpoint@ROCKCHIP_VOP2_EP_HDMI0 {
785 reg = <ROCKCHIP_VOP2_EP_HDMI0>;
786 remote-endpoint = <&hdmi_in_vp0>;
787 };
788};