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git01.mediatek.com / filogic / uboot / 9569c93fc7e7692ab84a060c3acb89e0d7714b2a / . / arch / arm / dts / keystone-k2l.dtsi
blob: c8893e284f2213fb4f61d5ed2876f8eaff5a4fa9 [file] [log] [blame]
Andrew Davis856ec342023-04-11 13:25:02 -0500[diff] [blame]1// SPDX-License-Identifier: GPL-2.0
Lokesh Vutla8c54a152015-09-19 15:00:21 +0530[diff] [blame]2/*
Lokesh Vutla8c54a152015-09-19 15:00:21 +0530[diff] [blame]3 * Keystone 2 Lamarr SoC specific device tree
4 *
Nishanth Menoneaa39c62023-11-01 15:56:03 -0500[diff] [blame]5 * Copyright (C) 2014-2017 Texas Instruments Incorporated - https://www.ti.com/
Lokesh Vutla8c54a152015-09-19 15:00:21 +0530[diff] [blame]6 */
7
8/ {
9 cpus {
10 #address-cells = <1>;
11 #size-cells = <0>;
12
13 interrupt-parent = <&gic>;
14
15 cpu@0 {
16 compatible = "arm,cortex-a15";
17 device_type = "cpu";
18 reg = <0>;
19 };
20
21 cpu@1 {
22 compatible = "arm,cortex-a15";
23 device_type = "cpu";
24 reg = <1>;
25 };
26 };
27
28 soc {
Lokesh Vutlae3187b92017-01-31 09:32:57 +0530[diff] [blame]29 /include/ "keystone-k2l-clocks.dtsi"
Lokesh Vutla8c54a152015-09-19 15:00:21 +0530[diff] [blame]30
Andrew Davis33e399a2023-04-11 13:25:09 -0500[diff] [blame]31 uart2: serial@2348400 {
Lokesh Vutla8c54a152015-09-19 15:00:21 +0530[diff] [blame]32 compatible = "ns16550a";
33 current-speed = <115200>;
34 reg-shift = <2>;
35 reg-io-width = <4>;
36 reg = <0x02348400 0x100>;
Andrew Davis33e399a2023-04-11 13:25:09 -0500[diff] [blame]37 clocks = <&clkuart2>;
Lokesh Vutla8c54a152015-09-19 15:00:21 +0530[diff] [blame]38 interrupts = <GIC_SPI 432 IRQ_TYPE_EDGE_RISING>;
39 };
40
Andrew Davis33e399a2023-04-11 13:25:09 -0500[diff] [blame]41 uart3: serial@2348800 {
Lokesh Vutla8c54a152015-09-19 15:00:21 +0530[diff] [blame]42 compatible = "ns16550a";
43 current-speed = <115200>;
44 reg-shift = <2>;
45 reg-io-width = <4>;
46 reg = <0x02348800 0x100>;
Andrew Davis33e399a2023-04-11 13:25:09 -0500[diff] [blame]47 clocks = <&clkuart3>;
Lokesh Vutla8c54a152015-09-19 15:00:21 +0530[diff] [blame]48 interrupts = <GIC_SPI 435 IRQ_TYPE_EDGE_RISING>;
49 };
50
51 dspgpio0: keystone_dsp_gpio@02620240 {
52 compatible = "ti,keystone-dsp-gpio";
53 gpio-controller;
54 #gpio-cells = <2>;
55 gpio,syscon-dev = <&devctrl 0x240>;
56 };
57
58 dspgpio1: keystone_dsp_gpio@2620244 {
59 compatible = "ti,keystone-dsp-gpio";
60 gpio-controller;
61 #gpio-cells = <2>;
62 gpio,syscon-dev = <&devctrl 0x244>;
63 };
64
65 dspgpio2: keystone_dsp_gpio@2620248 {
66 compatible = "ti,keystone-dsp-gpio";
67 gpio-controller;
68 #gpio-cells = <2>;
69 gpio,syscon-dev = <&devctrl 0x248>;
70 };
71
72 dspgpio3: keystone_dsp_gpio@262024c {
73 compatible = "ti,keystone-dsp-gpio";
74 gpio-controller;
75 #gpio-cells = <2>;
76 gpio,syscon-dev = <&devctrl 0x24c>;
77 };
78
79 mdio: mdio@26200f00 {
Andrew Davis33e399a2023-04-11 13:25:09 -0500[diff] [blame]80 compatible = "ti,keystone_mdio", "ti,davinci_mdio";
Lokesh Vutla8c54a152015-09-19 15:00:21 +0530[diff] [blame]81 #address-cells = <1>;
82 #size-cells = <0>;
83 reg = <0x26200f00 0x100>;
84 status = "disabled";
85 clocks = <&clkcpgmac>;
86 clock-names = "fck";
Andrew Davis33e399a2023-04-11 13:25:09 -0500[diff] [blame]87 bus_freq = <2500000>;
Lokesh Vutla8c54a152015-09-19 15:00:21 +0530[diff] [blame]88 };
Lokesh Vutlae3187b92017-01-31 09:32:57 +0530[diff] [blame]89 /include/ "keystone-k2l-netcp.dtsi"
Lokesh Vutla8c54a152015-09-19 15:00:21 +0530[diff] [blame]90 };
91};
92
93&spi0 {
94 ti,davinci-spi-num-cs = <5>;
95};
96
97&spi1 {
98 ti,davinci-spi-num-cs = <3>;
99};
100
101&spi2 {
102 ti,davinci-spi-num-cs = <5>;
103 /* Pin muxed. Enabled and configured by Bootloader */
104 status = "disabled";
105};