| Siew Chin Lim | 954d599 | 2021-03-24 13:11:34 +0800 | [diff] [blame^] | 1 | /* SPDX-License-Identifier: GPL-2.0 |
| 2 | * |
| 3 | * Copyright (C) 2016-2018 Intel Corporation <www.intel.com> |
| 4 | * |
| 5 | */ |
| 6 | |
| 7 | #ifndef _HANDOFF_SOC64_H_ |
| 8 | #define _HANDOFF_SOC64_H_ |
| 9 | |
| 10 | /* |
| 11 | * Offset for HW handoff from Quartus tools |
| 12 | */ |
| 13 | #define SOC64_HANDOFF_BASE 0xFFE3F000 |
| 14 | #define SOC64_HANDOFF_MUX (SOC64_HANDOFF_BASE + 0x10) |
| 15 | #define SOC64_HANDOFF_IOCTL (SOC64_HANDOFF_BASE + 0x1A0) |
| 16 | #define SOC64_HANDOFF_FPGA (SOC64_HANDOFF_BASE + 0x330) |
| 17 | #define SOC64_HANDOFF_DELAY (SOC64_HANDOFF_BASE + 0x3F0) |
| 18 | #define SOC64_HANDOFF_CLOCK (SOC64_HANDOFF_BASE + 0x580) |
| 19 | #define SOC64_HANDOFF_MISC (SOC64_HANDOFF_BASE + 0x610) |
| 20 | #define SOC64_HANDOFF_MAGIC_MUX 0x504D5558 |
| 21 | #define SOC64_HANDOFF_MAGIC_IOCTL 0x494F4354 |
| 22 | #define SOC64_HANDOFF_MAGIC_FPGA 0x46504741 |
| 23 | #define SOC64_HANDOFF_MAGIC_DELAY 0x444C4159 |
| 24 | #define SOC64_HANDOFF_MAGIC_CLOCK 0x434C4B53 |
| 25 | #define SOC64_HANDOFF_MAGIC_MISC 0x4D495343 |
| 26 | #define SOC64_HANDOFF_OFFSET_LENGTH 0x4 |
| 27 | #define SOC64_HANDOFF_OFFSET_DATA 0x10 |
| 28 | |
| 29 | #ifdef CONFIG_TARGET_SOCFPGA_STRATIX10 |
| 30 | #define SOC64_HANDOFF_CLOCK_OSC (SOC64_HANDOFF_BASE + 0x608) |
| 31 | #define SOC64_HANDOFF_CLOCK_FPGA (SOC64_HANDOFF_BASE + 0x60C) |
| 32 | #else |
| 33 | #define SOC64_HANDOFF_CLOCK_OSC (SOC64_HANDOFF_BASE + 0x5fc) |
| 34 | #define SOC64_HANDOFF_CLOCK_FPGA (SOC64_HANDOFF_BASE + 0x600) |
| 35 | #endif |
| 36 | |
| 37 | #define SOC64_HANDOFF_SIZE 4096 |
| 38 | |
| 39 | #endif /* _HANDOFF_SOC64_H_ */ |