blob: 18965a94c5f06cbd5ac98c61fe0bb291d3268f9f [file] [log] [blame]
Masahiro Yamadabb2ff9d2014-10-03 19:21:06 +09001/*
2 * Copyright (C) 2011-2014 Panasonic Corporation
3 * Author: Masahiro Yamada <yamada.m@jp.panasonic.com>
4 *
5 * SPDX-License-Identifier: GPL-2.0+
6 */
7
8#include <common.h>
9#include <asm/io.h>
10#include <asm/arch/sc-regs.h>
11
12void clkrst_init(void)
13{
14 u32 tmp;
15
16 /* deassert reset */
17 tmp = readl(SC_RSTCTRL);
18 tmp |= SC_RSTCTRL_NRST_ETHER | SC_RSTCTRL_NRST_UMC1
19 | SC_RSTCTRL_NRST_UMC0 | SC_RSTCTRL_NRST_NAND;
20 writel(tmp, SC_RSTCTRL);
21 readl(SC_RSTCTRL); /* dummy read */
22
23 /* privide clocks */
24 tmp = readl(SC_CLKCTRL);
25 tmp |= SC_CLKCTRL_CLK_ETHER | SC_CLKCTRL_CLK_MIO | SC_CLKCTRL_CLK_UMC
26 | SC_CLKCTRL_CLK_NAND | SC_CLKCTRL_CLK_SBC | SC_CLKCTRL_CLK_PERI;
27 writel(tmp, SC_CLKCTRL);
28 readl(SC_CLKCTRL); /* dummy read */
29}