Tom Rini | 93743d2 | 2024-04-01 09:08:13 -0400 | [diff] [blame^] | 1 | # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) |
| 2 | %YAML 1.2 |
| 3 | --- |
| 4 | $id: http://devicetree.org/schemas/clock/mediatek,mt7988-ethwarp.yaml# |
| 5 | $schema: http://devicetree.org/meta-schemas/core.yaml# |
| 6 | |
| 7 | title: MediaTek MT7988 ethwarp Controller |
| 8 | |
| 9 | maintainers: |
| 10 | - Daniel Golle <daniel@makrotopia.org> |
| 11 | |
| 12 | description: |
| 13 | The Mediatek MT7988 ethwarp controller provides clocks and resets for the |
| 14 | Ethernet related subsystems found the MT7988 SoC. |
| 15 | The clock values can be found in <dt-bindings/clock/mt*-clk.h>. |
| 16 | |
| 17 | properties: |
| 18 | compatible: |
| 19 | items: |
| 20 | - const: mediatek,mt7988-ethwarp |
| 21 | |
| 22 | reg: |
| 23 | maxItems: 1 |
| 24 | |
| 25 | '#clock-cells': |
| 26 | const: 1 |
| 27 | |
| 28 | '#reset-cells': |
| 29 | const: 1 |
| 30 | |
| 31 | required: |
| 32 | - compatible |
| 33 | - reg |
| 34 | - '#clock-cells' |
| 35 | - '#reset-cells' |
| 36 | |
| 37 | additionalProperties: false |
| 38 | |
| 39 | examples: |
| 40 | - | |
| 41 | #include <dt-bindings/reset/ti-syscon.h> |
| 42 | soc { |
| 43 | #address-cells = <2>; |
| 44 | #size-cells = <2>; |
| 45 | |
| 46 | clock-controller@15031000 { |
| 47 | compatible = "mediatek,mt7988-ethwarp"; |
| 48 | reg = <0 0x15031000 0 0x1000>; |
| 49 | #clock-cells = <1>; |
| 50 | #reset-cells = <1>; |
| 51 | }; |
| 52 | }; |