| Tom Rini | 53633a8 | 2024-02-29 12:33:36 -0500 | [diff] [blame^] | 1 | # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) |
| 2 | %YAML 1.2 |
| 3 | --- |
| 4 | $id: http://devicetree.org/schemas/i2c/st,stm32-i2c.yaml# |
| 5 | $schema: http://devicetree.org/meta-schemas/core.yaml# |
| 6 | |
| 7 | title: I2C controller embedded in STMicroelectronics STM32 I2C platform |
| 8 | |
| 9 | maintainers: |
| 10 | - Pierre-Yves MORDRET <pierre-yves.mordret@foss.st.com> |
| 11 | |
| 12 | allOf: |
| 13 | - $ref: /schemas/i2c/i2c-controller.yaml# |
| 14 | - if: |
| 15 | properties: |
| 16 | compatible: |
| 17 | contains: |
| 18 | enum: |
| 19 | - st,stm32f7-i2c |
| 20 | - st,stm32mp13-i2c |
| 21 | - st,stm32mp15-i2c |
| 22 | then: |
| 23 | properties: |
| 24 | i2c-scl-rising-time-ns: |
| 25 | default: 25 |
| 26 | |
| 27 | i2c-scl-falling-time-ns: |
| 28 | default: 10 |
| 29 | else: |
| 30 | properties: |
| 31 | st,syscfg-fmp: false |
| 32 | |
| 33 | - if: |
| 34 | properties: |
| 35 | compatible: |
| 36 | contains: |
| 37 | enum: |
| 38 | - st,stm32f4-i2c |
| 39 | then: |
| 40 | properties: |
| 41 | clock-frequency: |
| 42 | enum: [100000, 400000] |
| 43 | |
| 44 | properties: |
| 45 | compatible: |
| 46 | enum: |
| 47 | - st,stm32f4-i2c |
| 48 | - st,stm32f7-i2c |
| 49 | - st,stm32mp13-i2c |
| 50 | - st,stm32mp15-i2c |
| 51 | |
| 52 | reg: |
| 53 | maxItems: 1 |
| 54 | |
| 55 | interrupts: |
| 56 | items: |
| 57 | - description: interrupt ID for I2C event |
| 58 | - description: interrupt ID for I2C error |
| 59 | |
| 60 | interrupt-names: |
| 61 | items: |
| 62 | - const: event |
| 63 | - const: error |
| 64 | |
| 65 | resets: |
| 66 | maxItems: 1 |
| 67 | |
| 68 | clocks: |
| 69 | maxItems: 1 |
| 70 | |
| 71 | dmas: |
| 72 | items: |
| 73 | - description: RX DMA Channel phandle |
| 74 | - description: TX DMA Channel phandle |
| 75 | |
| 76 | dma-names: |
| 77 | items: |
| 78 | - const: rx |
| 79 | - const: tx |
| 80 | |
| 81 | clock-frequency: |
| 82 | description: Desired I2C bus clock frequency in Hz. If not specified, |
| 83 | the default 100 kHz frequency will be used. |
| 84 | For STM32F7, STM32H7 and STM32MP1 SoCs, if timing parameters |
| 85 | match, the bus clock frequency can be from 1Hz to 1MHz. |
| 86 | default: 100000 |
| 87 | minimum: 1 |
| 88 | maximum: 1000000 |
| 89 | |
| 90 | st,syscfg-fmp: |
| 91 | description: Use to set Fast Mode Plus bit within SYSCFG when Fast Mode |
| 92 | Plus speed is selected by slave. |
| 93 | $ref: /schemas/types.yaml#/definitions/phandle-array |
| 94 | items: |
| 95 | - items: |
| 96 | - description: phandle to syscfg |
| 97 | - description: register offset within syscfg |
| 98 | - description: register bitmask for FMP bit |
| 99 | |
| 100 | wakeup-source: true |
| 101 | |
| 102 | required: |
| 103 | - compatible |
| 104 | - reg |
| 105 | - interrupts |
| 106 | - resets |
| 107 | - clocks |
| 108 | |
| 109 | unevaluatedProperties: false |
| 110 | |
| 111 | examples: |
| 112 | - | |
| 113 | #include <dt-bindings/mfd/stm32f7-rcc.h> |
| 114 | #include <dt-bindings/clock/stm32fx-clock.h> |
| 115 | //Example 1 (with st,stm32f4-i2c compatible) |
| 116 | i2c@40005400 { |
| 117 | compatible = "st,stm32f4-i2c"; |
| 118 | #address-cells = <1>; |
| 119 | #size-cells = <0>; |
| 120 | reg = <0x40005400 0x400>; |
| 121 | interrupts = <31>, |
| 122 | <32>; |
| 123 | resets = <&rcc 277>; |
| 124 | clocks = <&rcc 0 149>; |
| 125 | }; |
| 126 | |
| 127 | - | |
| 128 | #include <dt-bindings/mfd/stm32f7-rcc.h> |
| 129 | #include <dt-bindings/clock/stm32fx-clock.h> |
| 130 | //Example 2 (with st,stm32f7-i2c compatible) |
| 131 | i2c@40005800 { |
| 132 | compatible = "st,stm32f7-i2c"; |
| 133 | #address-cells = <1>; |
| 134 | #size-cells = <0>; |
| 135 | reg = <0x40005800 0x400>; |
| 136 | interrupts = <31>, |
| 137 | <32>; |
| 138 | resets = <&rcc STM32F7_APB1_RESET(I2C1)>; |
| 139 | clocks = <&rcc 1 CLK_I2C1>; |
| 140 | }; |
| 141 | |
| 142 | - | |
| 143 | #include <dt-bindings/mfd/stm32f7-rcc.h> |
| 144 | #include <dt-bindings/clock/stm32fx-clock.h> |
| 145 | //Example 3 (with st,stm32mp15-i2c compatible on stm32mp) |
| 146 | #include <dt-bindings/interrupt-controller/arm-gic.h> |
| 147 | #include <dt-bindings/clock/stm32mp1-clks.h> |
| 148 | #include <dt-bindings/reset/stm32mp1-resets.h> |
| 149 | i2c@40013000 { |
| 150 | compatible = "st,stm32mp15-i2c"; |
| 151 | #address-cells = <1>; |
| 152 | #size-cells = <0>; |
| 153 | reg = <0x40013000 0x400>; |
| 154 | interrupts = <GIC_SPI 33 IRQ_TYPE_LEVEL_HIGH>, |
| 155 | <GIC_SPI 34 IRQ_TYPE_LEVEL_HIGH>; |
| 156 | clocks = <&rcc I2C2_K>; |
| 157 | resets = <&rcc I2C2_R>; |
| 158 | i2c-scl-rising-time-ns = <185>; |
| 159 | i2c-scl-falling-time-ns = <20>; |
| 160 | st,syscfg-fmp = <&syscfg 0x4 0x2>; |
| 161 | }; |