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git01.mediatek.com / filogic / uboot / 91ccefc9010048427a90d9fd10e9b417b6e6824b / . / configs / am65x_hs_evm_r5_defconfig
blob: b2d638672e330028eb5e16d58d59471acc5168e3 [file] [log] [blame]
Andrew F. Davise47bba02019-04-12 12:54:47 -0400[diff] [blame]1CONFIG_ARM=y
2CONFIG_ARCH_K3=y
3CONFIG_TI_SECURE_DEVICE=y
4CONFIG_SPL_GPIO_SUPPORT=y
5CONFIG_SPL_LIBCOMMON_SUPPORT=y
6CONFIG_SPL_LIBGENERIC_SUPPORT=y
Andreas Dannenberg355f0632019-06-04 17:55:52 -0500[diff] [blame]7CONFIG_SYS_MALLOC_F_LEN=0x55000
Andrew F. Davise47bba02019-04-12 12:54:47 -0400[diff] [blame]8CONFIG_SOC_K3_AM6=y
Andrew F. Davis6ed6be32020-03-10 11:08:41 -0400[diff] [blame]9CONFIG_K3_EARLY_CONS=y
Andrew F. Davise47bba02019-04-12 12:54:47 -0400[diff] [blame]10CONFIG_TARGET_AM654_R5_EVM=y
Tom Rinif6e6e1a2020-01-22 13:38:00 -0500[diff] [blame]11CONFIG_ENV_SIZE=0x20000
Tom Rini47dece32020-04-28 16:15:47 -0400[diff] [blame]12CONFIG_SYS_SPI_U_BOOT_OFFS=0x80000
Tom Rinif6e6e1a2020-01-22 13:38:00 -0500[diff] [blame]13CONFIG_DM_GPIO=y
Andrew F. Davise47bba02019-04-12 12:54:47 -0400[diff] [blame]14CONFIG_SPL_MMC_SUPPORT=y
15CONFIG_SPL_SERIAL_SUPPORT=y
16CONFIG_SPL_DRIVERS_MISC_SUPPORT=y
17CONFIG_SPL_STACK_R_ADDR=0x82000000
Tom Rinifdc7e362019-11-11 20:04:24 -0500[diff] [blame]18CONFIG_NR_DRAM_BANKS=2
Andrew F. Davise47bba02019-04-12 12:54:47 -0400[diff] [blame]19CONFIG_SPL_FS_FAT=y
20CONFIG_SPL_LIBDISK_SUPPORT=y
Vignesh Raghavendra040362f2020-02-04 11:09:58 +0530[diff] [blame]21CONFIG_SPL_SPI_FLASH_SUPPORT=y
22CONFIG_SPL_SPI_SUPPORT=y
Tom Rini527ded82019-09-23 11:47:37 -0400[diff] [blame]23CONFIG_SPL_TEXT_BASE=0x41c00000
Andrew F. Davise47bba02019-04-12 12:54:47 -0400[diff] [blame]24# CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set
25CONFIG_SPL_LOAD_FIT=y
26CONFIG_SPL_FIT_IMAGE_POST_PROCESS=y
27CONFIG_USE_BOOTCOMMAND=y
28# CONFIG_DISPLAY_CPUINFO is not set
Andrew F. Davise47bba02019-04-12 12:54:47 -0400[diff] [blame]29CONFIG_SPL_STACK_R=y
30CONFIG_SPL_SEPARATE_BSS=y
Andreas Dannenberg355f0632019-06-04 17:55:52 -0500[diff] [blame]31CONFIG_SPL_EARLY_BSS=y
Andreas Dannenberg598a7e12019-06-04 17:55:54 -0500[diff] [blame]32CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_SECTOR=y
33CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR=0x400
Vignesh Raghavendra040362f2020-02-04 11:09:58 +0530[diff] [blame]34CONFIG_SPL_DMA=y
Andrew F. Davise47bba02019-04-12 12:54:47 -0400[diff] [blame]35CONFIG_SPL_I2C_SUPPORT=y
36CONFIG_SPL_DM_MAILBOX=y
37CONFIG_SPL_DM_RESET=y
38CONFIG_SPL_POWER_SUPPORT=y
39CONFIG_SPL_POWER_DOMAIN=y
40CONFIG_SPL_RAM_SUPPORT=y
41CONFIG_SPL_RAM_DEVICE=y
42CONFIG_SPL_REMOTEPROC=y
Vignesh Raghavendra040362f2020-02-04 11:09:58 +0530[diff] [blame]43# CONFIG_SPL_SPI_FLASH_TINY is not set
44CONFIG_SPL_SPI_FLASH_SFDP_SUPPORT=y
45CONFIG_SPL_SPI_LOAD=y
Andrew F. Davise47bba02019-04-12 12:54:47 -0400[diff] [blame]46CONFIG_SPL_YMODEM_SUPPORT=y
47CONFIG_HUSH_PARSER=y
48CONFIG_CMD_BOOTZ=y
49CONFIG_CMD_ASKENV=y
Andrew F. Davise47bba02019-04-12 12:54:47 -0400[diff] [blame]50CONFIG_CMD_GPT=y
Andreas Dannenberg46051df2019-06-04 18:08:17 -0500[diff] [blame]51CONFIG_CMD_I2C=y
Andrew F. Davise47bba02019-04-12 12:54:47 -0400[diff] [blame]52CONFIG_CMD_MMC=y
53CONFIG_CMD_REMOTEPROC=y
54# CONFIG_CMD_SETEXPR is not set
55CONFIG_CMD_TIME=y
56CONFIG_CMD_FAT=y
57CONFIG_OF_CONTROL=y
58CONFIG_SPL_OF_CONTROL=y
59CONFIG_DEFAULT_DEVICE_TREE="k3-am654-r5-base-board"
60CONFIG_SPL_MULTI_DTB_FIT=y
61CONFIG_SPL_MULTI_DTB_FIT_NO_COMPRESSION=y
62CONFIG_ENV_IS_IN_FAT=y
Andrew F. Davise47bba02019-04-12 12:54:47 -0400[diff] [blame]63CONFIG_ENV_FAT_DEVICE_AND_PART="1:1"
Tom Rinica63e712019-11-12 22:46:36 -0500[diff] [blame]64CONFIG_SYS_RELOC_GD_ENV_ADDR=y
Andrew F. Davise47bba02019-04-12 12:54:47 -0400[diff] [blame]65CONFIG_DM=y
66CONFIG_SPL_DM=y
67CONFIG_SPL_DM_SEQ_ALIAS=y
Vignesh Raghavendra040362f2020-02-04 11:09:58 +0530[diff] [blame]68CONFIG_REGMAP=y
69CONFIG_SPL_REGMAP=y
Andrew F. Davise47bba02019-04-12 12:54:47 -0400[diff] [blame]70CONFIG_SPL_OF_TRANSLATE=y
71CONFIG_CLK=y
72CONFIG_SPL_CLK=y
73CONFIG_CLK_TI_SCI=y
Vignesh Raghavendra040362f2020-02-04 11:09:58 +0530[diff] [blame]74CONFIG_DMA_CHANNELS=y
75CONFIG_TI_K3_NAVSS_UDMA=y
Andrew F. Davise47bba02019-04-12 12:54:47 -0400[diff] [blame]76CONFIG_TI_SCI_PROTOCOL=y
Andrew F. Davise47bba02019-04-12 12:54:47 -0400[diff] [blame]77CONFIG_DA8XX_GPIO=y
Andreas Dannenberg46051df2019-06-04 18:08:17 -0500[diff] [blame]78CONFIG_DM_I2C=y
79CONFIG_I2C_SET_DEFAULT_BUS_NUM=y
80CONFIG_SYS_I2C_OMAP24XX=y
Andrew F. Davise47bba02019-04-12 12:54:47 -0400[diff] [blame]81CONFIG_DM_MAILBOX=y
82CONFIG_K3_SEC_PROXY=y
Andrew F. Davis6ed6be32020-03-10 11:08:41 -0400[diff] [blame]83CONFIG_K3_AVS0=y
Andrew F. Davise47bba02019-04-12 12:54:47 -0400[diff] [blame]84CONFIG_DM_MMC=y
85CONFIG_MMC_SDHCI=y
Andrew F. Davis6ed6be32020-03-10 11:08:41 -0400[diff] [blame]86CONFIG_SPL_MMC_SDHCI_ADMA=y
87CONFIG_MMC_SDHCI_AM654=y
Vignesh Raghavendra040362f2020-02-04 11:09:58 +0530[diff] [blame]88CONFIG_DM_SPI_FLASH=y
89CONFIG_SPI_FLASH_SFDP_SUPPORT=y
90CONFIG_SPI_FLASH_STMICRO=y
91# CONFIG_SPI_FLASH_USE_4K_SECTORS is not set
Andrew F. Davise47bba02019-04-12 12:54:47 -0400[diff] [blame]92CONFIG_PINCTRL=y
93# CONFIG_PINCTRL_GENERIC is not set
94CONFIG_SPL_PINCTRL=y
95# CONFIG_SPL_PINCTRL_GENERIC is not set
96CONFIG_PINCTRL_SINGLE=y
97CONFIG_POWER_DOMAIN=y
98CONFIG_TI_SCI_POWER_DOMAIN=y
99CONFIG_DM_REGULATOR=y
100CONFIG_SPL_DM_REGULATOR=y
101CONFIG_DM_REGULATOR_GPIO=y
102CONFIG_SPL_DM_REGULATOR_GPIO=y
Andrew F. Davis6ed6be32020-03-10 11:08:41 -0400[diff] [blame]103CONFIG_DM_REGULATOR_TPS62360=y
Andrew F. Davise47bba02019-04-12 12:54:47 -0400[diff] [blame]104CONFIG_RAM=y
105CONFIG_SPL_RAM=y
106CONFIG_K3_SYSTEM_CONTROLLER=y
Lokesh Vutla247418b2019-06-07 19:25:59 +0530[diff] [blame]107CONFIG_REMOTEPROC_TI_K3_ARM64=y
Andrew F. Davise47bba02019-04-12 12:54:47 -0400[diff] [blame]108CONFIG_DM_RESET=y
109CONFIG_RESET_TI_SCI=y
110CONFIG_DM_SERIAL=y
Vignesh Raghavendra040362f2020-02-04 11:09:58 +0530[diff] [blame]111CONFIG_SOC_TI=y
112CONFIG_SPI=y
113CONFIG_DM_SPI=y
114CONFIG_CADENCE_QSPI=y
Andrew F. Davise47bba02019-04-12 12:54:47 -0400[diff] [blame]115CONFIG_SYSRESET=y
Kever Yang525ea472019-04-02 20:41:25 +0800[diff] [blame]116CONFIG_SPL_SYSRESET=y
Andrew F. Davise47bba02019-04-12 12:54:47 -0400[diff] [blame]117CONFIG_SYSRESET_TI_SCI=y
118CONFIG_TIMER=y
119CONFIG_SPL_TIMER=y
120CONFIG_OMAP_TIMER=y
Andreas Dannenberg355f0632019-06-04 17:55:52 -0500[diff] [blame]121CONFIG_FS_FAT_MAX_CLUSTSIZE=16384