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Minkyu Kangfca30842009-10-01 17:20:28 +09001/*
2 * (C) Copyright 2009 SAMSUNG Electronics
3 * Minkyu Kang <mk7.kang@samsung.com>
4 * Heungjun Kim <riverful.kim@samsung.com>
5 *
6 * based on drivers/serial/s3c64xx.c
7 *
Wolfgang Denkd79de1d2013-07-08 09:37:19 +02008 * SPDX-License-Identifier: GPL-2.0+
Minkyu Kangfca30842009-10-01 17:20:28 +09009 */
10
11#include <common.h>
Simon Glass767e7372014-09-14 16:36:17 -060012#include <dm.h>
13#include <errno.h>
Rajeshwari Shindebd19fa92013-06-24 16:47:22 +053014#include <fdtdec.h>
Mike Frysingerf96c0422011-04-29 18:03:29 +000015#include <linux/compiler.h>
Minkyu Kangfca30842009-10-01 17:20:28 +090016#include <asm/io.h>
Minkyu Kangfca30842009-10-01 17:20:28 +090017#include <asm/arch/clk.h>
Simon Glass405fd142015-07-02 18:15:53 -060018#include <asm/arch/uart.h>
Minkyu Kangfca30842009-10-01 17:20:28 +090019#include <serial.h>
20
John Rigby0d21ed02010-12-20 18:27:51 -070021DECLARE_GLOBAL_DATA_PTR;
22
Simon Glass767e7372014-09-14 16:36:17 -060023#define RX_FIFO_COUNT_SHIFT 0
24#define RX_FIFO_COUNT_MASK (0xff << RX_FIFO_COUNT_SHIFT)
25#define RX_FIFO_FULL (1 << 8)
26#define TX_FIFO_COUNT_SHIFT 16
27#define TX_FIFO_COUNT_MASK (0xff << TX_FIFO_COUNT_SHIFT)
28#define TX_FIFO_FULL (1 << 24)
Akshay Saraswat63f10902013-03-21 20:33:04 +000029
Rajeshwari Shindebd19fa92013-06-24 16:47:22 +053030/* Information about a serial port */
Simon Glass767e7372014-09-14 16:36:17 -060031struct s5p_serial_platdata {
32 struct s5p_uart *reg; /* address of registers in physical memory */
Rajeshwari Shindebd19fa92013-06-24 16:47:22 +053033 u8 port_id; /* uart port number */
Simon Glass767e7372014-09-14 16:36:17 -060034};
Minkyu Kangfca30842009-10-01 17:20:28 +090035
36/*
Minkyu Kangbaa36882010-03-24 16:59:30 +090037 * The coefficient, used to calculate the baudrate on S5P UARTs is
Minkyu Kangfca30842009-10-01 17:20:28 +090038 * calculated as
39 * C = UBRDIV * 16 + number_of_set_bits_in_UDIVSLOT
40 * however, section 31.6.11 of the datasheet doesn't recomment using 1 for 1,
41 * 3 for 2, ... (2^n - 1) for n, instead, they suggest using these constants:
42 */
43static const int udivslot[] = {
44 0,
45 0x0080,
46 0x0808,
47 0x0888,
48 0x2222,
49 0x4924,
50 0x4a52,
51 0x54aa,
52 0x5555,
53 0xd555,
54 0xd5d5,
55 0xddd5,
56 0xdddd,
57 0xdfdd,
58 0xdfdf,
59 0xffdf,
60};
61
Simon Glass405fd142015-07-02 18:15:53 -060062static void __maybe_unused s5p_serial_init(struct s5p_uart *uart)
Minkyu Kangfca30842009-10-01 17:20:28 +090063{
Simon Glass405fd142015-07-02 18:15:53 -060064 /* enable FIFOs, auto clear Rx FIFO */
65 writel(0x3, &uart->ufcon);
66 writel(0, &uart->umcon);
67 /* 8N1 */
68 writel(0x3, &uart->ulcon);
69 /* No interrupts, no DMA, pure polling */
70 writel(0x245, &uart->ucon);
71}
72
73static void __maybe_unused s5p_serial_baud(struct s5p_uart *uart, uint uclk,
74 int baudrate)
75{
Minkyu Kangfca30842009-10-01 17:20:28 +090076 u32 val;
77
Minkyu Kang36f25cf2010-08-24 15:51:55 +090078 val = uclk / baudrate;
Minkyu Kangfca30842009-10-01 17:20:28 +090079
80 writel(val / 16 - 1, &uart->ubrdiv);
Minkyu Kangbfa14242010-09-28 14:35:02 +090081
Minkyu Kangafae8aa2011-01-24 14:43:25 +090082 if (s5p_uart_divslot())
Minkyu Kangbfa14242010-09-28 14:35:02 +090083 writew(udivslot[val % 16], &uart->rest.slot);
84 else
85 writeb(val % 16, &uart->rest.value);
Simon Glass405fd142015-07-02 18:15:53 -060086}
87
88int s5p_serial_setbrg(struct udevice *dev, int baudrate)
89{
90 struct s5p_serial_platdata *plat = dev->platdata;
91 struct s5p_uart *const uart = plat->reg;
92 u32 uclk = get_uart_clk(plat->port_id);
93
94 s5p_serial_baud(uart, uclk, baudrate);
Simon Glass767e7372014-09-14 16:36:17 -060095
96 return 0;
Minkyu Kangfca30842009-10-01 17:20:28 +090097}
98
Simon Glass767e7372014-09-14 16:36:17 -060099static int s5p_serial_probe(struct udevice *dev)
Minkyu Kangfca30842009-10-01 17:20:28 +0900100{
Simon Glass767e7372014-09-14 16:36:17 -0600101 struct s5p_serial_platdata *plat = dev->platdata;
102 struct s5p_uart *const uart = plat->reg;
Minkyu Kangfca30842009-10-01 17:20:28 +0900103
Simon Glass405fd142015-07-02 18:15:53 -0600104 s5p_serial_init(uart);
Minkyu Kangfca30842009-10-01 17:20:28 +0900105
Minkyu Kangfca30842009-10-01 17:20:28 +0900106 return 0;
107}
108
Simon Glass767e7372014-09-14 16:36:17 -0600109static int serial_err_check(const struct s5p_uart *const uart, int op)
Minkyu Kangfca30842009-10-01 17:20:28 +0900110{
Minkyu Kang9455aab2009-11-10 20:23:50 +0900111 unsigned int mask;
Minkyu Kangfca30842009-10-01 17:20:28 +0900112
Minkyu Kang9455aab2009-11-10 20:23:50 +0900113 /*
114 * UERSTAT
115 * Break Detect [3]
116 * Frame Err [2] : receive operation
117 * Parity Err [1] : receive operation
118 * Overrun Err [0] : receive operation
119 */
120 if (op)
121 mask = 0x8;
122 else
123 mask = 0xf;
Minkyu Kangfca30842009-10-01 17:20:28 +0900124
Minkyu Kang9455aab2009-11-10 20:23:50 +0900125 return readl(&uart->uerstat) & mask;
Minkyu Kangfca30842009-10-01 17:20:28 +0900126}
127
Simon Glass767e7372014-09-14 16:36:17 -0600128static int s5p_serial_getc(struct udevice *dev)
Minkyu Kangfca30842009-10-01 17:20:28 +0900129{
Simon Glass767e7372014-09-14 16:36:17 -0600130 struct s5p_serial_platdata *plat = dev->platdata;
131 struct s5p_uart *const uart = plat->reg;
Minkyu Kangfca30842009-10-01 17:20:28 +0900132
Simon Glass767e7372014-09-14 16:36:17 -0600133 if (!(readl(&uart->ufstat) & RX_FIFO_COUNT_MASK))
134 return -EAGAIN;
Rajeshwari Shindebd19fa92013-06-24 16:47:22 +0530135
Simon Glass767e7372014-09-14 16:36:17 -0600136 serial_err_check(uart, 0);
Minkyu Kang76229812010-07-06 20:08:29 +0900137 return (int)(readb(&uart->urxh) & 0xff);
Minkyu Kangfca30842009-10-01 17:20:28 +0900138}
139
Simon Glass767e7372014-09-14 16:36:17 -0600140static int s5p_serial_putc(struct udevice *dev, const char ch)
Minkyu Kangfca30842009-10-01 17:20:28 +0900141{
Simon Glass767e7372014-09-14 16:36:17 -0600142 struct s5p_serial_platdata *plat = dev->platdata;
143 struct s5p_uart *const uart = plat->reg;
Minkyu Kangfca30842009-10-01 17:20:28 +0900144
Simon Glass767e7372014-09-14 16:36:17 -0600145 if (readl(&uart->ufstat) & TX_FIFO_FULL)
146 return -EAGAIN;
Rajeshwari Shindebd19fa92013-06-24 16:47:22 +0530147
Simon Glass767e7372014-09-14 16:36:17 -0600148 writeb(ch, &uart->utxh);
149 serial_err_check(uart, 1);
Minkyu Kangfca30842009-10-01 17:20:28 +0900150
Simon Glass767e7372014-09-14 16:36:17 -0600151 return 0;
Minkyu Kangfca30842009-10-01 17:20:28 +0900152}
153
Simon Glass767e7372014-09-14 16:36:17 -0600154static int s5p_serial_pending(struct udevice *dev, bool input)
Minkyu Kangfca30842009-10-01 17:20:28 +0900155{
Simon Glass767e7372014-09-14 16:36:17 -0600156 struct s5p_serial_platdata *plat = dev->platdata;
157 struct s5p_uart *const uart = plat->reg;
158 uint32_t ufstat = readl(&uart->ufstat);
Minkyu Kangfca30842009-10-01 17:20:28 +0900159
Simon Glass767e7372014-09-14 16:36:17 -0600160 if (input)
161 return (ufstat & RX_FIFO_COUNT_MASK) >> RX_FIFO_COUNT_SHIFT;
162 else
163 return (ufstat & TX_FIFO_COUNT_MASK) >> TX_FIFO_COUNT_SHIFT;
Marek Vasut5bcdf242012-09-09 18:48:28 +0200164}
Minkyu Kangfca30842009-10-01 17:20:28 +0900165
Simon Glass767e7372014-09-14 16:36:17 -0600166static int s5p_serial_ofdata_to_platdata(struct udevice *dev)
Rajeshwari Shindebd19fa92013-06-24 16:47:22 +0530167{
Simon Glass767e7372014-09-14 16:36:17 -0600168 struct s5p_serial_platdata *plat = dev->platdata;
169 fdt_addr_t addr;
Rajeshwari Shindebd19fa92013-06-24 16:47:22 +0530170
Simon Glass767e7372014-09-14 16:36:17 -0600171 addr = fdtdec_get_addr(gd->fdt_blob, dev->of_offset, "reg");
172 if (addr == FDT_ADDR_T_NONE)
173 return -EINVAL;
Rajeshwari Shindebd19fa92013-06-24 16:47:22 +0530174
Simon Glass767e7372014-09-14 16:36:17 -0600175 plat->reg = (struct s5p_uart *)addr;
176 plat->port_id = fdtdec_get_int(gd->fdt_blob, dev->of_offset, "id", -1);
Rajeshwari Shindebd19fa92013-06-24 16:47:22 +0530177
178 return 0;
179}
Rajeshwari Shindebd19fa92013-06-24 16:47:22 +0530180
Simon Glass767e7372014-09-14 16:36:17 -0600181static const struct dm_serial_ops s5p_serial_ops = {
182 .putc = s5p_serial_putc,
183 .pending = s5p_serial_pending,
184 .getc = s5p_serial_getc,
185 .setbrg = s5p_serial_setbrg,
186};
Rajeshwari Shindebd19fa92013-06-24 16:47:22 +0530187
Simon Glass767e7372014-09-14 16:36:17 -0600188static const struct udevice_id s5p_serial_ids[] = {
189 { .compatible = "samsung,exynos4210-uart" },
190 { }
191};
Marek Vasut533e31e2012-09-12 19:39:57 +0200192
Simon Glass767e7372014-09-14 16:36:17 -0600193U_BOOT_DRIVER(serial_s5p) = {
194 .name = "serial_s5p",
195 .id = UCLASS_SERIAL,
196 .of_match = s5p_serial_ids,
197 .ofdata_to_platdata = s5p_serial_ofdata_to_platdata,
198 .platdata_auto_alloc_size = sizeof(struct s5p_serial_platdata),
199 .probe = s5p_serial_probe,
200 .ops = &s5p_serial_ops,
201 .flags = DM_FLAG_PRE_RELOC,
202};
Simon Glass74afb292015-07-02 18:15:54 -0600203
204#ifdef CONFIG_DEBUG_UART_S5P
205
206#include <debug_uart.h>
207
208void debug_uart_init(void)
209{
210 struct s5p_uart *uart = (struct s5p_uart *)CONFIG_DEBUG_UART_BASE;
211
212 s5p_serial_init(uart);
213 s5p_serial_baud(uart, CONFIG_DEBUG_UART_CLOCK, CONFIG_BAUDRATE);
214}
215
216static inline void _debug_uart_putc(int ch)
217{
218 struct s5p_uart *uart = (struct s5p_uart *)CONFIG_DEBUG_UART_BASE;
219
220 while (readl(&uart->ufstat) & TX_FIFO_FULL);
221
222 writeb(ch, &uart->utxh);
223}
224
225DEBUG_UART_FUNCS
226
227#endif