| Masahiro Yamada | 144a3e0 | 2015-04-21 20:38:20 +0900 | [diff] [blame] | 1 | if ARCH_SOCFPGA |
| 2 | |
| Marek Vasut | 822e795 | 2015-08-02 21:57:57 +0200 | [diff] [blame] | 3 | config TARGET_SOCFPGA_ARRIA5 |
| 4 | bool |
| 5 | |
| 6 | config TARGET_SOCFPGA_CYCLONE5 |
| 7 | bool |
| 8 | |
| Masahiro Yamada | 144a3e0 | 2015-04-21 20:38:20 +0900 | [diff] [blame] | 9 | choice |
| 10 | prompt "Altera SOCFPGA board select" |
| Joe Hershberger | f069960 | 2015-05-12 14:46:23 -0500 | [diff] [blame] | 11 | optional |
| Masahiro Yamada | 144a3e0 | 2015-04-21 20:38:20 +0900 | [diff] [blame] | 12 | |
| Marek Vasut | 822e795 | 2015-08-02 21:57:57 +0200 | [diff] [blame] | 13 | config TARGET_SOCFPGA_ARRIA5_SOCDK |
| 14 | bool "Altera SOCFPGA SoCDK (Arria V)" |
| 15 | select TARGET_SOCFPGA_ARRIA5 |
| Masahiro Yamada | 144a3e0 | 2015-04-21 20:38:20 +0900 | [diff] [blame] | 16 | |
| Marek Vasut | 822e795 | 2015-08-02 21:57:57 +0200 | [diff] [blame] | 17 | config TARGET_SOCFPGA_CYCLONE5_SOCDK |
| 18 | bool "Altera SOCFPGA SoCDK (Cyclone V)" |
| 19 | select TARGET_SOCFPGA_CYCLONE5 |
| Masahiro Yamada | 144a3e0 | 2015-04-21 20:38:20 +0900 | [diff] [blame] | 20 | |
| Marek Vasut | b415bad | 2015-06-21 17:28:53 +0200 | [diff] [blame^] | 21 | config TARGET_SOCFPGA_TERASIC_SOCKIT |
| 22 | bool "Terasic SoCkit (Cyclone V)" |
| 23 | select TARGET_SOCFPGA_CYCLONE5 |
| 24 | |
| Masahiro Yamada | 144a3e0 | 2015-04-21 20:38:20 +0900 | [diff] [blame] | 25 | endchoice |
| 26 | |
| 27 | config SYS_BOARD |
| Marek Vasut | 3f4c561 | 2015-08-10 21:24:53 +0200 | [diff] [blame] | 28 | default "arria5-socdk" if TARGET_SOCFPGA_ARRIA5_SOCDK |
| 29 | default "cyclone5-socdk" if TARGET_SOCFPGA_CYCLONE5_SOCDK |
| Marek Vasut | b415bad | 2015-06-21 17:28:53 +0200 | [diff] [blame^] | 30 | default "sockit" if TARGET_SOCFPGA_TERASIC_SOCKIT |
| Masahiro Yamada | 144a3e0 | 2015-04-21 20:38:20 +0900 | [diff] [blame] | 31 | |
| 32 | config SYS_VENDOR |
| Marek Vasut | 822e795 | 2015-08-02 21:57:57 +0200 | [diff] [blame] | 33 | default "altera" if TARGET_SOCFPGA_ARRIA5_SOCDK |
| 34 | default "altera" if TARGET_SOCFPGA_CYCLONE5_SOCDK |
| Marek Vasut | b415bad | 2015-06-21 17:28:53 +0200 | [diff] [blame^] | 35 | default "terasic" if TARGET_SOCFPGA_TERASIC_SOCKIT |
| Masahiro Yamada | 144a3e0 | 2015-04-21 20:38:20 +0900 | [diff] [blame] | 36 | |
| 37 | config SYS_SOC |
| 38 | default "socfpga" |
| 39 | |
| 40 | config SYS_CONFIG_NAME |
| Marek Vasut | 822e795 | 2015-08-02 21:57:57 +0200 | [diff] [blame] | 41 | default "socfpga_arria5" if TARGET_SOCFPGA_ARRIA5_SOCDK |
| 42 | default "socfpga_cyclone5" if TARGET_SOCFPGA_CYCLONE5_SOCDK |
| Marek Vasut | b415bad | 2015-06-21 17:28:53 +0200 | [diff] [blame^] | 43 | default "socfpga_sockit" if TARGET_SOCFPGA_TERASIC_SOCKIT |
| Masahiro Yamada | 144a3e0 | 2015-04-21 20:38:20 +0900 | [diff] [blame] | 44 | |
| 45 | endif |