blob: 369a6870d8796bbc24721c50655731bd5347c5a2 [file] [log] [blame]
Wenyou Yang8c772bd2016-07-20 17:55:12 +08001/*
2 * Copyright (C) 2016 Atmel Corporation
3 * Wenyou.Yang <wenyou.yang@atmel.com>
4 *
5 * SPDX-License-Identifier: GPL-2.0+
6 */
7
8#include <common.h>
9#include <clk-uclass.h>
10#include <dm/device.h>
11#include <linux/io.h>
12#include <mach/at91_pmc.h>
13#include "pmc.h"
14
15DECLARE_GLOBAL_DATA_PTR;
16
17#define UTMI_FIXED_MUL 40
18
19static int utmi_clk_enable(struct clk *clk)
20{
21 struct pmc_platdata *plat = dev_get_platdata(clk->dev);
22 struct at91_pmc *pmc = plat->reg_base;
23 u32 tmp;
24
25 if (readl(&pmc->sr) & AT91_PMC_LOCKU)
26 return 0;
27
28 tmp = readl(&pmc->uckr);
29 tmp |= AT91_PMC_UPLLEN |
30 AT91_PMC_UPLLCOUNT |
31 AT91_PMC_BIASEN;
32 writel(tmp, &pmc->uckr);
33
34 while (!(readl(&pmc->sr) & AT91_PMC_LOCKU))
35 ;
36
37 return 0;
38}
39
40static ulong utmi_clk_get_rate(struct clk *clk)
41{
42 return gd->arch.main_clk_rate_hz * UTMI_FIXED_MUL;
43}
44
45static struct clk_ops utmi_clk_ops = {
46 .enable = utmi_clk_enable,
47 .get_rate = utmi_clk_get_rate,
48};
49
50static int utmi_clk_probe(struct udevice *dev)
51{
52 return at91_pmc_core_probe(dev);
53}
54
55static const struct udevice_id utmi_clk_match[] = {
56 { .compatible = "atmel,at91sam9x5-clk-utmi" },
57 {}
58};
59
60U_BOOT_DRIVER(at91sam9x5_utmi_clk) = {
61 .name = "at91sam9x5-utmi-clk",
62 .id = UCLASS_CLK,
63 .of_match = utmi_clk_match,
64 .probe = utmi_clk_probe,
65 .platdata_auto_alloc_size = sizeof(struct pmc_platdata),
66 .ops = &utmi_clk_ops,
67};