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Tom Rini10e47792018-05-06 17:58:06 -04001/* SPDX-License-Identifier: GPL-2.0+ */
SRICHARAN Rbeb407e2012-03-12 02:25:48 +00002/*
Nishanth Menon627612c2013-03-26 05:20:54 +00003 * (C) Copyright 2012-2013
SRICHARAN Rbeb407e2012-03-12 02:25:48 +00004 * Texas Instruments, <www.ti.com>
SRICHARAN Rbeb407e2012-03-12 02:25:48 +00005 */
Nishanth Menon61e2e042013-03-26 05:20:58 +00006#ifndef PALMAS_H
7#define PALMAS_H
SRICHARAN Rbeb407e2012-03-12 02:25:48 +00008
SRICHARAN Rbeb407e2012-03-12 02:25:48 +00009#include <i2c.h>
10
Lubomir Popovff397ab2013-06-06 04:16:40 +000011/* I2C chip addresses, TW6035/37 */
12#define TWL603X_CHIP_P1 0x48 /* Page 1 */
13#define TWL603X_CHIP_P2 0x49 /* Page 2 */
14#define TWL603X_CHIP_P3 0x4a /* Page 3 */
SRICHARAN Rbeb407e2012-03-12 02:25:48 +000015
Lubomir Popovff397ab2013-06-06 04:16:40 +000016/* TPS659038/39 */
17#define TPS65903X_CHIP_P1 0x58 /* Page 1 */
18
19/* Page 1 registers (0x1XY translates to page 1, reg addr 0xXY): */
20
21/* LDO1 control/voltage */
22#define LDO1_CTRL 0x50
23#define LDO1_VOLTAGE 0x51
24
Lokesh Vutlad999d052016-11-23 13:25:28 +053025/* LDO1 control/voltage for LP873x */
26#define LP873X_LDO1_ADDR 0x60
27#define LP873X_LDO1_CTRL 0x9
28#define LP873X_LDO1_VOLTAGE 0xa
29#define LP873X_LDO_VOLT_3V0 0x19
30#define LP873X_LDO_VOLT_1V8 0xa
31#define LP873X_LDO_CTRL_EN (0x1 << 0)
32#define LP873X_LDO_CTRL_EN_PINCTRL (0x1 << 1)
33#define LP873X_LDO_CTRL_RDIS_EN (0x1 << 2)
34
Dmitry Lifshitz4f37de82014-04-27 13:17:26 +030035/* LDO2 control/voltage */
36#define LDO2_CTRL 0x52
37#define LDO2_VOLTAGE 0x53
38
Lokesh Vutla4712cc42017-08-21 12:50:57 +053039/* LDO2 control/voltage */
40#define LDO4_CTRL 0x5e
41#define LDO4_VOLTAGE 0x5f
42
Lubomir Popovff397ab2013-06-06 04:16:40 +000043/* LDO9 control/voltage */
SRICHARAN Rbeb407e2012-03-12 02:25:48 +000044#define LDO9_CTRL 0x60
45#define LDO9_VOLTAGE 0x61
46
Lubomir Popovff397ab2013-06-06 04:16:40 +000047/* LDOUSB control/voltage */
48#define LDOUSB_CTRL 0x64
49#define LDOUSB_VOLTAGE 0x65
Dan Murphye0926da2013-08-26 08:54:49 -050050#define LDO_CTRL 0x6a
Lubomir Popovff397ab2013-06-06 04:16:40 +000051
52/* Control of 32 kHz audio clock */
53#define CLK32KGAUDIO_CTRL 0xd5
54
55/* SYSEN2_CTRL for VCC_3v3_AUX supply on the sEVM */
56#define SYSEN2_CTRL 0xd9
57
58/*
59 * Bit field definitions for LDOx_CTRL, SYSENx_CTRL
60 * and some other xxx_CTRL resources:
61 */
62#define LDO9_BYP_EN (1 << 6) /* LDO9 only! */
63#define RSC_STAT_ON (1 << 4) /* RO status bit! */
64#define RSC_MODE_SLEEP (1 << 2)
65#define RSC_MODE_ACTIVE (1 << 0)
66
67/* Some LDO voltage values */
68#define LDO_VOLT_OFF 0
69#define LDO_VOLT_1V8 0x13
70#define LDO_VOLT_3V0 0x2b
71#define LDO_VOLT_3V3 0x31
72/* Request bypass, LDO9 only */
73#define LDO9_BYPASS 0x3f
74
75/* SMPS7_CTRL */
76#define SMPS7_CTRL 0x30
77
78/* SMPS9_CTRL */
79#define SMPS9_CTRL 0x38
80#define SMPS9_VOLTAGE 0x3b
81
Dan Murphye0926da2013-08-26 08:54:49 -050082/* SMPS10_CTRL */
83#define SMPS10_CTRL 0x3c
84#define SMPS10_MODE_ACTIVE_D 0x0d
85
Lubomir Popovff397ab2013-06-06 04:16:40 +000086/* Bit field definitions for SMPSx_CTRL */
87#define SMPS_MODE_ACT_AUTO 1
88#define SMPS_MODE_ACT_ECO 2
89#define SMPS_MODE_ACT_FPWM 3
90#define SMPS_MODE_SLP_AUTO (1 << 2)
91#define SMPS_MODE_SLP_ECO (2 << 2)
92#define SMPS_MODE_SLP_FPWM (3 << 2)
93
94/*
95 * Some popular SMPS voltages, all with RANGE=1; note
96 * that RANGE cannot be changed on the fly
97 */
98#define SMPS_VOLT_OFF 0
99#define SMPS_VOLT_1V2 0x90
100#define SMPS_VOLT_1V8 0xae
101#define SMPS_VOLT_2V1 0xbd
102#define SMPS_VOLT_3V0 0xea
103#define SMPS_VOLT_3V3 0xf9
104
105/* Backup Battery & VRTC Control */
106#define BB_VRTC_CTRL 0xa8
107/* Bit definitions for BB_VRTC_CTRL */
108#define VRTC_EN_SLP (1 << 6)
109#define VRTC_EN_OFF (1 << 5)
110#define VRTC_PWEN (1 << 4)
111#define BB_LOW_ICHRG (1 << 3)
112#define BB_HIGH_ICHRG (0 << 3)
113#define BB_VSEL_3V0 (0 << 1)
114#define BB_VSEL_2V5 (1 << 1)
115#define BB_VSEL_3V15 (2 << 1)
116#define BB_VSEL_VBAT (3 << 1)
117#define BB_CHRG_EN (1 << 0)
SRICHARAN Rbeb407e2012-03-12 02:25:48 +0000118
Igor Opaniukf7c91762021-02-09 13:52:45 +0200119#if !CONFIG_IS_ENABLED(DM_I2C)
Nishanth Menona1ea4542013-03-26 05:20:57 +0000120/*
121 * Functions to read and write from TPS659038/TWL6035/TWL6037
122 * or other Palmas family of TI PMICs
123 */
124static inline int palmas_i2c_write_u8(u8 chip_no, u8 reg, u8 val)
125{
126 return i2c_write(chip_no, reg, 1, &val, 1);
127}
128
129static inline int palmas_i2c_read_u8(u8 chip_no, u8 reg, u8 *val)
130{
131 return i2c_read(chip_no, reg, 1, val, 1);
132}
Jean-Jacques Hiblot77a13972018-12-07 14:50:46 +0100133#else
134int palmas_i2c_write_u8(u8 chip_no, u8 reg, u8 val);
135int palmas_i2c_read_u8(u8 chip_no, u8 reg, u8 *val);
136#endif
Nishanth Menona1ea4542013-03-26 05:20:57 +0000137
Nishanth Menonaa4f8362013-03-26 05:20:55 +0000138void palmas_init_settings(void);
Lokesh Vutla22fa8192017-08-21 12:50:50 +0530139int palmas_mmc1_poweron_ldo(uint ldo_volt, uint ldo_ctrl, uint voltage);
Lokesh Vutlad999d052016-11-23 13:25:28 +0530140int lp873x_mmc1_poweron_ldo(uint voltage);
Lubomir Popovff397ab2013-06-06 04:16:40 +0000141int twl603x_mmc1_set_ldo9(u8 vsel);
142int twl603x_audio_power(u8 on);
143int twl603x_enable_bb_charge(u8 bb_fields);
Dan Murphye0926da2013-08-26 08:54:49 -0500144int palmas_enable_ss_ldo(void);
Nishanth Menon61e2e042013-03-26 05:20:58 +0000145
146#endif /* PALMAS_H */