Jesse Taube | 9451ffe | 2022-07-26 01:43:39 -0400 | [diff] [blame] | 1 | // SPDX-License-Identifier: GPL-2.0+ |
| 2 | /* |
| 3 | * Copyright (C) 2019 |
| 4 | * Author(s): Giulio Benetti <giulio.benetti@benettiengineering.com> |
| 5 | */ |
| 6 | |
| 7 | #include <common.h> |
| 8 | #include <dm.h> |
| 9 | #include <init.h> |
| 10 | #include <log.h> |
| 11 | #include <ram.h> |
| 12 | #include <spl.h> |
| 13 | #include <asm/global_data.h> |
| 14 | #include <asm/io.h> |
| 15 | #include <asm/armv7m.h> |
| 16 | #include <serial.h> |
| 17 | |
| 18 | DECLARE_GLOBAL_DATA_PTR; |
| 19 | |
| 20 | int dram_init(void) |
| 21 | { |
| 22 | #ifndef CONFIG_SUPPORT_SPL |
| 23 | int rv; |
| 24 | struct udevice *dev; |
| 25 | |
| 26 | rv = uclass_get_device(UCLASS_RAM, 0, &dev); |
| 27 | if (rv) { |
| 28 | debug("DRAM init failed: %d\n", rv); |
| 29 | return rv; |
| 30 | } |
| 31 | |
| 32 | #endif |
| 33 | return fdtdec_setup_mem_size_base(); |
| 34 | } |
| 35 | |
| 36 | int dram_init_banksize(void) |
| 37 | { |
| 38 | return fdtdec_setup_memory_banksize(); |
| 39 | } |
| 40 | |
| 41 | #ifdef CONFIG_SPL_BUILD |
| 42 | #ifdef CONFIG_SPL_OS_BOOT |
| 43 | int spl_start_uboot(void) |
| 44 | { |
| 45 | debug("SPL: booting kernel\n"); |
| 46 | /* break into full u-boot on 'c' */ |
| 47 | return serial_tstc() && serial_getc() == 'c'; |
| 48 | } |
| 49 | #endif |
| 50 | |
| 51 | int spl_dram_init(void) |
| 52 | { |
| 53 | struct udevice *dev; |
| 54 | int rv; |
| 55 | |
| 56 | rv = uclass_get_device(UCLASS_RAM, 0, &dev); |
| 57 | if (rv) |
| 58 | debug("DRAM init failed: %d\n", rv); |
| 59 | return rv; |
| 60 | } |
| 61 | |
| 62 | void spl_board_init(void) |
| 63 | { |
| 64 | preloader_console_init(); |
| 65 | spl_dram_init(); |
| 66 | arch_cpu_init(); /* to configure mpu for sdram rw permissions */ |
| 67 | } |
| 68 | |
| 69 | u32 spl_boot_device(void) |
| 70 | { |
| 71 | return BOOT_DEVICE_MMC1; |
| 72 | } |
| 73 | #endif |
| 74 | |
| 75 | int board_init(void) |
| 76 | { |
| 77 | gd->bd->bi_boot_params = gd->bd->bi_dram[0].start + 0x100; |
| 78 | |
| 79 | return 0; |
| 80 | } |