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git01.mediatek.com / filogic / uboot / 88c13b28eaa6ad6796110cb531ede46fbd659515 / . / arch / arm / dts / rv1126-edgeble-neu2.dtsi
blob: cc64ba4be344c3488e16cefcb07ff5ad3fac683f [file] [log] [blame]
Jagan Tekid1fedfd2022-12-14 23:21:08 +0530[diff] [blame]1// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
2/*
3 * Copyright (c) 2020 Rockchip Electronics Co., Ltd.
4 * Copyright (c) 2022 Edgeble AI Technologies Pvt. Ltd.
5 */
6
7/ {
8 compatible = "edgeble,neural-compute-module-2", "rockchip,rv1126";
9
10 aliases {
11 mmc0 = &emmc;
12 };
13
14 vcc5v0_sys: vcc5v0-sys-regulator {
15 compatible = "regulator-fixed";
16 regulator-name = "vcc5v0_sys";
17 regulator-always-on;
18 regulator-boot-on;
19 regulator-min-microvolt = <5000000>;
20 regulator-max-microvolt = <5000000>;
21 };
22
23 vccio_flash: vccio-flash-regulator {
24 compatible = "regulator-fixed";
25 enable-active-high;
26 gpio = <&gpio0 RK_PB3 GPIO_ACTIVE_HIGH>;
27 pinctrl-names = "default";
28 pinctrl-0 = <&flash_vol_sel>;
29 regulator-name = "vccio_flash";
30 regulator-always-on;
31 regulator-boot-on;
32 regulator-min-microvolt = <1800000>;
33 regulator-max-microvolt = <1800000>;
34 vin-supply = <&vcc_3v3>;
35 };
36
37 sdio_pwrseq: pwrseq-sdio {
38 compatible = "mmc-pwrseq-simple";
39 clocks = <&rk809 1>;
40 clock-names = "ext_clock";
41 pinctrl-names = "default";
42 pinctrl-0 = <&wifi_enable_h>;
43 reset-gpios = <&gpio1 RK_PD0 GPIO_ACTIVE_LOW>;
44 };
45};
46
47&cpu0 {
48 cpu-supply = <&vdd_arm>;
49};
50
51&emmc {
52 bus-width = <8>;
53 non-removable;
54 pinctrl-names = "default";
55 pinctrl-0 = <&emmc_bus8 &emmc_cmd &emmc_clk &emmc_rstnout>;
56 rockchip,default-sample-phase = <90>;
57 vmmc-supply = <&vcc_3v3>;
58 vqmmc-supply = <&vccio_flash>;
59 status = "okay";
60};
61
62&i2c0 {
63 clock-frequency = <400000>;
64 status = "okay";
65
66 rk809: pmic@20 {
67 compatible = "rockchip,rk809";
68 reg = <0x20>;
69 interrupt-parent = <&gpio0>;
70 interrupts = <RK_PB1 IRQ_TYPE_LEVEL_LOW>;
71 #clock-cells = <1>;
72 clock-output-names = "rk808-clkout1", "rk808-clkout2";
73 pinctrl-names = "default";
74 pinctrl-0 = <&pmic_int_l>;
75 rockchip,system-power-controller;
76 wakeup-source;
77
78 vcc1-supply = <&vcc5v0_sys>;
79 vcc2-supply = <&vcc5v0_sys>;
80 vcc3-supply = <&vcc5v0_sys>;
81 vcc4-supply = <&vcc5v0_sys>;
82 vcc5-supply = <&vcc_buck5>;
83 vcc6-supply = <&vcc_buck5>;
84 vcc7-supply = <&vcc5v0_sys>;
85 vcc8-supply = <&vcc3v3_sys>;
86 vcc9-supply = <&vcc5v0_sys>;
87
88 regulators {
89 vdd_npu_vepu: DCDC_REG1 {
90 regulator-name = "vdd_npu_vepu";
91 regulator-always-on;
92 regulator-boot-on;
93 regulator-initial-mode = <0x2>;
94 regulator-min-microvolt = <650000>;
95 regulator-max-microvolt = <950000>;
96 regulator-ramp-delay = <6001>;
97 regulator-state-mem {
98 regulator-off-in-suspend;
99 };
100 };
101
102 vdd_arm: DCDC_REG2 {
103 regulator-name = "vdd_arm";
104 regulator-always-on;
105 regulator-boot-on;
106 regulator-initial-mode = <0x2>;
107 regulator-min-microvolt = <725000>;
108 regulator-max-microvolt = <1350000>;
109 regulator-ramp-delay = <6001>;
110 regulator-state-mem {
111 regulator-off-in-suspend;
112 };
113 };
114
115 vcc_ddr: DCDC_REG3 {
116 regulator-name = "vcc_ddr";
117 regulator-always-on;
118 regulator-boot-on;
119 regulator-initial-mode = <0x2>;
120 regulator-state-mem {
121 regulator-on-in-suspend;
122 };
123 };
124
125 vcc3v3_sys: DCDC_REG4 {
126 regulator-name = "vcc3v3_sys";
127 regulator-always-on;
128 regulator-boot-on;
129 regulator-initial-mode = <0x2>;
130 regulator-min-microvolt = <3300000>;
131 regulator-max-microvolt = <3300000>;
132 regulator-state-mem {
133 regulator-on-in-suspend;
134 regulator-suspend-microvolt = <3300000>;
135 };
136 };
137
138 vcc_buck5: DCDC_REG5 {
139 regulator-name = "vcc_buck5";
140 regulator-always-on;
141 regulator-boot-on;
142 regulator-min-microvolt = <2200000>;
143 regulator-max-microvolt = <2200000>;
144 regulator-state-mem {
145 regulator-on-in-suspend;
146 regulator-suspend-microvolt = <2200000>;
147 };
148 };
149
150 vcc_0v8: LDO_REG1 {
151 regulator-name = "vcc_0v8";
152 regulator-always-on;
153 regulator-boot-on;
154 regulator-min-microvolt = <800000>;
155 regulator-max-microvolt = <800000>;
156 regulator-state-mem {
157 regulator-off-in-suspend;
158 };
159 };
160
161 vcc1v8_pmu: LDO_REG2 {
162 regulator-name = "vcc1v8_pmu";
163 regulator-always-on;
164 regulator-boot-on;
165 regulator-min-microvolt = <1800000>;
166 regulator-max-microvolt = <1800000>;
167 regulator-state-mem {
168 regulator-on-in-suspend;
169 regulator-suspend-microvolt = <1800000>;
170 };
171 };
172
173 vdd0v8_pmu: LDO_REG3 {
174 regulator-name = "vcc0v8_pmu";
175 regulator-always-on;
176 regulator-boot-on;
177 regulator-min-microvolt = <800000>;
178 regulator-max-microvolt = <800000>;
179 regulator-state-mem {
180 regulator-on-in-suspend;
181 regulator-suspend-microvolt = <800000>;
182 };
183 };
184
185 vcc_1v8: LDO_REG4 {
186 regulator-name = "vcc_1v8";
187 regulator-always-on;
188 regulator-boot-on;
189 regulator-min-microvolt = <1800000>;
190 regulator-max-microvolt = <1800000>;
191 regulator-state-mem {
192 regulator-on-in-suspend;
193 regulator-suspend-microvolt = <1800000>;
194 };
195 };
196
197 vcc_dovdd: LDO_REG5 {
198 regulator-name = "vcc_dovdd";
199 regulator-boot-on;
200 regulator-min-microvolt = <1800000>;
201 regulator-max-microvolt = <1800000>;
202 regulator-state-mem {
203 regulator-off-in-suspend;
204 };
205 };
206
207 vcc_dvdd: LDO_REG6 {
208 regulator-name = "vcc_dvdd";
209 regulator-min-microvolt = <1200000>;
210 regulator-max-microvolt = <1200000>;
211 regulator-state-mem {
212 regulator-off-in-suspend;
213 };
214 };
215
216 vcc_avdd: LDO_REG7 {
217 regulator-name = "vcc_avdd";
218 regulator-min-microvolt = <2800000>;
219 regulator-max-microvolt = <2800000>;
220 regulator-state-mem {
221 regulator-off-in-suspend;
222 };
223 };
224
225 vccio_sd: LDO_REG8 {
226 regulator-name = "vccio_sd";
227 regulator-always-on;
228 regulator-boot-on;
229 regulator-min-microvolt = <1800000>;
230 regulator-max-microvolt = <3300000>;
231 regulator-state-mem {
232 regulator-off-in-suspend;
233 };
234 };
235
236 vcc3v3_sd: LDO_REG9 {
237 regulator-name = "vcc3v3_sd";
238 regulator-always-on;
239 regulator-boot-on;
240 regulator-min-microvolt = <3300000>;
241 regulator-max-microvolt = <3300000>;
242 regulator-state-mem {
243 regulator-off-in-suspend;
244 };
245 };
246
247 vcc_5v0: SWITCH_REG1 {
248 regulator-name = "vcc_5v0";
249 };
250
251 vcc_3v3: SWITCH_REG2 {
252 regulator-name = "vcc_3v3";
253 regulator-always-on;
254 regulator-boot-on;
255 };
256 };
257 };
258};
259
260&pinctrl {
261 bt {
262 bt_enable: bt-enable {
263 rockchip,pins = <3 RK_PA5 RK_FUNC_GPIO &pcfg_pull_none>;
264 };
265 };
266
267 flash {
268 flash_vol_sel: flash-vol-sel {
269 rockchip,pins = <0 RK_PB3 RK_FUNC_GPIO &pcfg_pull_none>;
270 };
271 };
272
273 pmic {
274 pmic_int_l: pmic-int-l {
275 rockchip,pins = <0 RK_PB1 RK_FUNC_GPIO &pcfg_pull_up>;
276 };
277 };
278
279 wifi {
280 wifi_enable_h: wifi-enable-h {
281 rockchip,pins = <1 RK_PD0 RK_FUNC_GPIO &pcfg_pull_none>;
282 };
283 };
284};
285
286&pmu_io_domains {
287 pmuio0-supply = <&vcc1v8_pmu>;
288 pmuio1-supply = <&vcc3v3_sys>;
289 vccio1-supply = <&vccio_flash>;
290 vccio2-supply = <&vccio_sd>;
291 vccio3-supply = <&vcc_1v8>;
292 vccio4-supply = <&vcc_dovdd>;
293 vccio5-supply = <&vcc_1v8>;
294 vccio6-supply = <&vcc_1v8>;
295 vccio7-supply = <&vcc_dovdd>;
296 status = "okay";
297};
298
299&saradc {
300 vref-supply = <&vcc_1v8>;
301 status = "okay";
302};
303
304&sdio {
305 bus-width = <4>;
306 cap-sd-highspeed;
307 cap-sdio-irq;
308 keep-power-in-suspend;
309 max-frequency = <100000000>;
310 mmc-pwrseq = <&sdio_pwrseq>;
311 non-removable;
312 pinctrl-names = "default";
313 pinctrl-0 = <&sdmmc1_clk &sdmmc1_cmd &sdmmc1_bus4>;
314 rockchip,default-sample-phase = <90>;
315 sd-uhs-sdr104;
316 vmmc-supply = <&vcc3v3_sys>;
317 vqmmc-supply = <&vcc_1v8>;
318 status = "okay";
319 #address-cells = <1>;
320 #size-cells = <0>;
321};
322
323&uart0 {
324 pinctrl-names = "default";
325 pinctrl-0 = <&uart0_xfer &uart0_ctsn &uart0_rtsn>;
326 status = "okay";
327
328 bluetooth {
329 compatible = "qcom,qca9377-bt";
330 clocks = <&rk809 1>;
331 enable-gpios = <&gpio3 RK_PA5 GPIO_ACTIVE_HIGH>; /* BT_RST */
332 max-speed = <2000000>;
333 pinctrl-names = "default";
334 pinctrl-0 = <&bt_enable>;
335 vddxo-supply = <&vcc3v3_sys>;
336 vddio-supply = <&vcc_1v8>;
337 };
338};