blob: 3d684ce076db6ab26b2007a5528a437365cfe715 [file] [log] [blame]
Simon Glasse161ccf2012-10-17 13:24:51 +00001/*
2 * Copyright (c) 2011 The Chromium OS Authors.
3 * See file CREDITS for list of people who contributed to this
4 * project.
5 *
6 * This program is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU General Public License as
8 * published by the Free Software Foundation; either version 2 of
9 * the License, or (at your option) any later version.
10 *
11 * This program is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 * GNU General Public License for more details.
15 *
16 * You should have received a copy of the GNU General Public License
17 * along with this program; if not, write to the Free Software
18 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
19 * MA 02111-1307 USA
20 */
21
22#include <common.h>
23#include <fdtdec.h>
24#include <lcd.h>
25
26#include <asm/system.h>
27#include <asm/gpio.h>
28
29#include <asm/arch/clock.h>
30#include <asm/arch/funcmux.h>
31#include <asm/arch/pinmux.h>
32#include <asm/arch/pwm.h>
33#include <asm/arch/display.h>
34#include <asm/arch-tegra/timer.h>
35
36DECLARE_GLOBAL_DATA_PTR;
37
38/* These are the stages we go throuh in enabling the LCD */
39enum stage_t {
40 STAGE_START,
41 STAGE_PANEL_VDD,
42 STAGE_LVDS,
43 STAGE_BACKLIGHT_VDD,
44 STAGE_PWM,
45 STAGE_BACKLIGHT_EN,
46 STAGE_DONE,
47};
48
49static enum stage_t stage; /* Current stage we are at */
50static unsigned long timer_next; /* Time we can move onto next stage */
51
52/* Our LCD config, set up in handle_stage() */
53static struct fdt_panel_config config;
54struct fdt_disp_config *disp_config; /* Display controller config */
55
56enum {
57 /* Maximum LCD size we support */
58 LCD_MAX_WIDTH = 1366,
59 LCD_MAX_HEIGHT = 768,
60 LCD_MAX_LOG2_BPP = 4, /* 2^4 = 16 bpp */
61};
62
Simon Glasse161ccf2012-10-17 13:24:51 +000063void *lcd_base; /* Start of framebuffer memory */
Simon Glasse161ccf2012-10-17 13:24:51 +000064
65vidinfo_t panel_info = {
66 /* Insert a value here so that we don't end up in the BSS */
67 .vl_col = -1,
68};
69
Simon Glasse161ccf2012-10-17 13:24:51 +000070#ifndef CONFIG_OF_CONTROL
71#error "You must enable CONFIG_OF_CONTROL to get Tegra LCD support"
72#endif
73
Simon Glasse161ccf2012-10-17 13:24:51 +000074static void update_panel_size(struct fdt_disp_config *config)
75{
76 panel_info.vl_col = config->width;
77 panel_info.vl_row = config->height;
78 panel_info.vl_bpix = config->log2_bpp;
79}
80
81/*
82 * Main init function called by lcd driver.
83 * Inits and then prints test pattern if required.
84 */
85
86void lcd_ctrl_init(void *lcdbase)
87{
Simon Glassd7305d12012-10-17 13:24:57 +000088 int type = DCACHE_OFF;
Thierry Reding8f837a92012-11-23 00:58:49 +000089 int size;
Simon Glasse161ccf2012-10-17 13:24:51 +000090
91 assert(disp_config);
92
93 lcd_base = (void *)disp_config->frame_buffer;
94
95 /* Make sure that we can acommodate the selected LCD */
96 assert(disp_config->width <= LCD_MAX_WIDTH);
97 assert(disp_config->height <= LCD_MAX_HEIGHT);
98 assert(disp_config->log2_bpp <= LCD_MAX_LOG2_BPP);
99 if (disp_config->width <= LCD_MAX_WIDTH
100 && disp_config->height <= LCD_MAX_HEIGHT
101 && disp_config->log2_bpp <= LCD_MAX_LOG2_BPP)
102 update_panel_size(disp_config);
Thierry Reding8f837a92012-11-23 00:58:49 +0000103 size = lcd_get_size(&lcd_line_length);
Simon Glasse161ccf2012-10-17 13:24:51 +0000104
Simon Glassd7305d12012-10-17 13:24:57 +0000105 /* Set up the LCD caching as requested */
106 if (config.cache_type & FDT_LCD_CACHE_WRITE_THROUGH)
107 type = DCACHE_WRITETHROUGH;
108 else if (config.cache_type & FDT_LCD_CACHE_WRITE_BACK)
109 type = DCACHE_WRITEBACK;
110 mmu_set_region_dcache_behaviour(disp_config->frame_buffer, size, type);
111
112 /* Enable flushing after LCD writes if requested */
113 lcd_set_flush_dcache(config.cache_type & FDT_LCD_CACHE_FLUSH);
114
Simon Glasse161ccf2012-10-17 13:24:51 +0000115 debug("LCD frame buffer at %p\n", lcd_base);
116}
117
118ulong calc_fbsize(void)
119{
120 return (panel_info.vl_col * panel_info.vl_row *
121 NBITS(panel_info.vl_bpix)) / 8;
122}
123
124void lcd_setcolreg(ushort regno, ushort red, ushort green, ushort blue)
125{
126}
127
128void tegra_lcd_early_init(const void *blob)
129{
130 /*
131 * Go with the maximum size for now. We will fix this up after
132 * relocation. These values are only used for memory alocation.
133 */
134 panel_info.vl_col = LCD_MAX_WIDTH;
135 panel_info.vl_row = LCD_MAX_HEIGHT;
136 panel_info.vl_bpix = LCD_MAX_LOG2_BPP;
137}
138
139/**
140 * Decode the panel information from the fdt.
141 *
142 * @param blob fdt blob
143 * @param config structure to store fdt config into
144 * @return 0 if ok, -ve on error
145 */
146static int fdt_decode_lcd(const void *blob, struct fdt_panel_config *config)
147{
148 int display_node;
149
150 disp_config = tegra_display_get_config();
151 if (!disp_config) {
152 debug("%s: Display controller is not configured\n", __func__);
153 return -1;
154 }
155 display_node = disp_config->panel_node;
156 if (display_node < 0) {
157 debug("%s: No panel configuration available\n", __func__);
158 return -1;
159 }
160
161 config->pwm_channel = pwm_request(blob, display_node, "nvidia,pwm");
162 if (config->pwm_channel < 0) {
163 debug("%s: Unable to request PWM channel\n", __func__);
164 return -1;
165 }
166
167 config->cache_type = fdtdec_get_int(blob, display_node,
168 "nvidia,cache-type",
169 FDT_LCD_CACHE_WRITE_BACK_FLUSH);
170
171 /* These GPIOs are all optional */
172 fdtdec_decode_gpio(blob, display_node, "nvidia,backlight-enable-gpios",
173 &config->backlight_en);
174 fdtdec_decode_gpio(blob, display_node, "nvidia,lvds-shutdown-gpios",
175 &config->lvds_shutdown);
176 fdtdec_decode_gpio(blob, display_node, "nvidia,backlight-vdd-gpios",
177 &config->backlight_vdd);
178 fdtdec_decode_gpio(blob, display_node, "nvidia,panel-vdd-gpios",
179 &config->panel_vdd);
180
181 return fdtdec_get_int_array(blob, display_node, "nvidia,panel-timings",
182 config->panel_timings, FDT_LCD_TIMINGS);
183}
184
185/**
186 * Handle the next stage of device init
187 */
188static int handle_stage(const void *blob)
189{
190 debug("%s: stage %d\n", __func__, stage);
191
192 /* do the things for this stage */
193 switch (stage) {
194 case STAGE_START:
195 /* Initialize the Tegra display controller */
196 if (tegra_display_probe(gd->fdt_blob, (void *)gd->fb_base)) {
197 printf("%s: Failed to probe display driver\n",
198 __func__);
199 return -1;
200 }
201
202 /* get panel details */
203 if (fdt_decode_lcd(blob, &config)) {
204 printf("No valid LCD information in device tree\n");
205 return -1;
206 }
207
208 /*
209 * It is possible that the FDT has requested that the LCD be
210 * disabled. We currently don't support this. It would require
211 * changes to U-Boot LCD subsystem to have LCD support
212 * compiled in but not used. An easier option might be to
213 * still have a frame buffer, but leave the backlight off and
214 * remove all mention of lcd in the stdout environment
215 * variable.
216 */
217
218 funcmux_select(PERIPH_ID_DISP1, FUNCMUX_DEFAULT);
219
220 fdtdec_setup_gpio(&config.panel_vdd);
221 fdtdec_setup_gpio(&config.lvds_shutdown);
222 fdtdec_setup_gpio(&config.backlight_vdd);
223 fdtdec_setup_gpio(&config.backlight_en);
224
225 /*
226 * TODO: If fdt includes output flag we can omit this code
227 * since fdtdec_setup_gpio will do it for us.
228 */
229 if (fdt_gpio_isvalid(&config.panel_vdd))
230 gpio_direction_output(config.panel_vdd.gpio, 0);
231 if (fdt_gpio_isvalid(&config.lvds_shutdown))
232 gpio_direction_output(config.lvds_shutdown.gpio, 0);
233 if (fdt_gpio_isvalid(&config.backlight_vdd))
234 gpio_direction_output(config.backlight_vdd.gpio, 0);
235 if (fdt_gpio_isvalid(&config.backlight_en))
236 gpio_direction_output(config.backlight_en.gpio, 0);
237 break;
238 case STAGE_PANEL_VDD:
239 if (fdt_gpio_isvalid(&config.panel_vdd))
240 gpio_direction_output(config.panel_vdd.gpio, 1);
241 break;
242 case STAGE_LVDS:
243 if (fdt_gpio_isvalid(&config.lvds_shutdown))
244 gpio_set_value(config.lvds_shutdown.gpio, 1);
245 break;
246 case STAGE_BACKLIGHT_VDD:
247 if (fdt_gpio_isvalid(&config.backlight_vdd))
248 gpio_set_value(config.backlight_vdd.gpio, 1);
249 break;
250 case STAGE_PWM:
251 /* Enable PWM at 15/16 high, 32768 Hz with divider 1 */
252 pinmux_set_func(PINGRP_GPU, PMUX_FUNC_PWM);
253 pinmux_tristate_disable(PINGRP_GPU);
254
255 pwm_enable(config.pwm_channel, 32768, 0xdf, 1);
256 break;
257 case STAGE_BACKLIGHT_EN:
258 if (fdt_gpio_isvalid(&config.backlight_en))
259 gpio_set_value(config.backlight_en.gpio, 1);
260 break;
261 case STAGE_DONE:
262 break;
263 }
264
265 /* set up timer for next stage */
266 timer_next = timer_get_us();
267 if (stage < FDT_LCD_TIMINGS)
268 timer_next += config.panel_timings[stage] * 1000;
269
270 /* move to next stage */
271 stage++;
272 return 0;
273}
274
275int tegra_lcd_check_next_stage(const void *blob, int wait)
276{
277 if (stage == STAGE_DONE)
278 return 0;
279
280 do {
281 /* wait if we need to */
282 debug("%s: stage %d\n", __func__, stage);
283 if (stage != STAGE_START) {
284 int delay = timer_next - timer_get_us();
285
286 if (delay > 0) {
287 if (wait)
288 udelay(delay);
289 else
290 return 0;
291 }
292 }
293
294 if (handle_stage(blob))
295 return -1;
296 } while (wait && stage != STAGE_DONE);
297 if (stage == STAGE_DONE)
298 debug("%s: LCD init complete\n", __func__);
299
300 return 0;
301}
302
303void lcd_enable(void)
304{
305 /*
306 * Backlight and power init will be done separately in
307 * tegra_lcd_check_next_stage(), which should be called in
308 * board_late_init().
309 *
310 * U-Boot code supports only colour depth, selected at compile time.
311 * The device tree setting should match this. Otherwise the display
312 * will not look right, and U-Boot may crash.
313 */
314 if (disp_config->log2_bpp != LCD_BPP) {
315 printf("%s: Error: LCD depth configured in FDT (%d = %dbpp)"
316 " must match setting of LCD_BPP (%d)\n", __func__,
317 disp_config->log2_bpp, disp_config->bpp, LCD_BPP);
318 }
319}