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Tom Rini10e47792018-05-06 17:58:06 -04001/* SPDX-License-Identifier: GPL-2.0+ */
Tom Rinia2f4c912013-08-09 11:22:17 -04002/*
3 * ti_armv7_common.h
4 *
Nishanth Menoneaa39c62023-11-01 15:56:03 -05005 * Copyright (C) 2013 Texas Instruments Incorporated - https://www.ti.com/
Tom Rinia2f4c912013-08-09 11:22:17 -04006 *
Tom Rinia2f4c912013-08-09 11:22:17 -04007 * The various ARMv7 SoCs from TI all share a number of IP blocks when
8 * implementing a given feature. Rather than define these in every
9 * board or even SoC common file, we define a common file to be re-used
10 * in all cases. While technically true that some of these details are
11 * configurable at the board design, they are common throughout SoC
12 * reference platforms as well as custom designs and become de facto
13 * standards.
14 */
15
16#ifndef __CONFIG_TI_ARMV7_COMMON_H__
17#define __CONFIG_TI_ARMV7_COMMON_H__
18
Tom Rinia2f4c912013-08-09 11:22:17 -040019/*
Tom Rini96886f22014-03-28 15:03:29 -040020 * We setup defaults based on constraints from the Linux kernel, which should
21 * also be safe elsewhere. We have the default load at 32MB into DDR (for
22 * the kernel), FDT above 128MB (the maximum location for the end of the
23 * kernel), and the ramdisk 512KB above that (allowing for hopefully never
24 * seen large trees). We say all of this must be within the first 256MB
25 * as that will normally be within the kernel lowmem and thus visible via
26 * bootm_size and we only run on platforms with 256MB or more of memory.
Sam Protsenko1651ee12020-01-24 17:53:49 +020027 *
28 * As a temporary storage for DTBO blobs (which should be applied into DTB
29 * blob), we use the location 15.5 MB above the ramdisk. If someone wants to
30 * use ramdisk bigger than 15.5 MB, then DTBO can be loaded and applied to DTB
31 * blob before loading the ramdisk, as DTBO location is only used as a temporary
32 * storage, and can be re-used after 'fdt apply' command is done.
Tom Rinia2f4c912013-08-09 11:22:17 -040033 */
Tom Rini96886f22014-03-28 15:03:29 -040034#define DEFAULT_LINUX_BOOT_ENV \
35 "loadaddr=0x82000000\0" \
36 "kernel_addr_r=0x82000000\0" \
37 "fdtaddr=0x88000000\0" \
Sam Protsenko1651ee12020-01-24 17:53:49 +020038 "dtboaddr=0x89000000\0" \
Tom Rini96886f22014-03-28 15:03:29 -040039 "fdt_addr_r=0x88000000\0" \
Amjad Ouled-Ameur4d797722021-10-29 16:08:17 +020040 "fdtoverlay_addr_r=0x89000000\0" \
Tom Rini96886f22014-03-28 15:03:29 -040041 "rdaddr=0x88080000\0" \
42 "ramdisk_addr_r=0x88080000\0" \
Sjoerd Simons3a3b3d12015-08-28 15:01:55 +020043 "scriptaddr=0x80000000\0" \
44 "pxefile_addr_r=0x80100000\0" \
Lokesh Vutlaf01f8b32016-11-29 11:57:59 +053045 "bootm_size=0x10000000\0" \
46 "boot_fdt=try\0"
Tom Rinia2f4c912013-08-09 11:22:17 -040047
Lokesh Vutlac2913ac2016-11-29 11:58:00 +053048#define DEFAULT_FIT_TI_ARGS \
49 "boot_fit=0\0" \
Andrew F. Davis5589be62019-08-12 15:59:54 -040050 "addr_fit=0x90000000\0" \
Andrew F. Davis77c875c2019-08-12 15:59:55 -040051 "name_fit=fitImage\0" \
52 "update_to_fit=setenv loadaddr ${addr_fit}; setenv bootfile ${name_fit}\0" \
Andrew F. Davisc21e8192019-08-26 17:51:00 -040053 "get_overlaystring=" \
Suman Annaad30ac32020-04-24 13:39:52 -050054 "for overlay in $name_overlays;" \
Andrew F. Davisc21e8192019-08-26 17:51:00 -040055 "do;" \
56 "setenv overlaystring ${overlaystring}'#'${overlay};" \
57 "done;\0" \
Andrew Davis6dd3e712023-04-25 11:20:45 -050058 "get_fit_config=setexpr name_fit_config gsub / _ conf-${fdtfile}\0" \
59 "run_fit=run get_fit_config; bootm ${addr_fit}#${name_fit_config}${overlaystring}\0" \
Lokesh Vutlac2913ac2016-11-29 11:58:00 +053060
Tom Rinia2f4c912013-08-09 11:22:17 -040061/*
Enric Balletbò i Serra07322c52013-12-06 21:30:21 +010062 * DDR information. If the CONFIG_NR_DRAM_BANKS is not defined,
63 * we say (for simplicity) that we have 1 bank, always, even when
64 * we have more. We always start at 0x80000000, and we place the
65 * initial stack pointer in our SRAM. Otherwise, we can define
66 * CONFIG_NR_DRAM_BANKS before including this file.
Tom Rinia2f4c912013-08-09 11:22:17 -040067 */
Tom Rinibb4dd962022-11-16 13:10:37 -050068#define CFG_SYS_SDRAM_BASE 0x80000000
Nishanth Menonb4471512015-07-22 18:05:45 -050069
Jean-Jacques Hiblot52a51512018-12-07 14:50:49 +010070/* If DM_I2C, enable non-DM I2C support */
Tom Rinia2f4c912013-08-09 11:22:17 -040071
Tom Rinia2f4c912013-08-09 11:22:17 -040072/*
Tom Rinia2f4c912013-08-09 11:22:17 -040073 * The following are general good-enough settings for U-Boot. We set a
74 * large malloc pool as we generally have a lot of DDR, and we opt for
75 * function over binary size in the main portion of U-Boot as this is
76 * generally easily constrained later if needed. We enable the config
77 * options that give us information in the environment about what board
78 * we are on so we do not need to rely on the command prompt. We set a
79 * console baudrate of 115200 and use the default baud rate table.
80 */
Tom Rinic5e96362013-08-20 08:53:49 -040081
82/* As stated above, the following choices are optional. */
Tom Rinia2f4c912013-08-09 11:22:17 -040083
Tom Rinia2f4c912013-08-09 11:22:17 -040084/* Console I/O Buffer Size */
Tom Rinia2f4c912013-08-09 11:22:17 -040085/*
86 * When we have SPI, NOR or NAND flash we expect to be making use of
87 * mtdparts, both for ease of use in U-Boot and for passing information
88 * on to the Linux kernel.
89 */
Tom Rinia2f4c912013-08-09 11:22:17 -040090
Tom Rinia2f4c912013-08-09 11:22:17 -040091/*
Tom Rinia2f4c912013-08-09 11:22:17 -040092 * Our platforms make use of SPL to initalize the hardware (primarily
Andrew F. Davise2f61e72016-08-30 14:06:28 -050093 * memory) enough for full U-Boot to be loaded. We make use of the general
94 * SPL framework found under common/spl/. Given our generally common memory
95 * map, we set a number of related defaults and sizes here.
Tom Rinia2f4c912013-08-09 11:22:17 -040096 */
Sourav Poddar5248bba2014-05-19 16:53:37 -040097#if !defined(CONFIG_NOR_BOOT) && \
98 !(defined(CONFIG_QSPI_BOOT) && defined(CONFIG_AM43XX))
Andrew F. Davise2f61e72016-08-30 14:06:28 -050099
100/*
101 * We also support Falcon Mode so that the Linux kernel can be booted
102 * directly from SPL. This is not currently available on HS devices.
103 */
Tom Rinia2f4c912013-08-09 11:22:17 -0400104
105/*
Tom Rinibe737992014-07-18 11:51:32 -0400106 * Place the image at the start of the ROM defined image space (per
107 * CONFIG_SPL_TEXT_BASE and we limit our size to the ROM-defined
Tom Rinicfff4aa2016-08-26 13:30:43 -0400108 * downloaded image area minus 1KiB for scratch space. We initalize DRAM as
109 * soon as we can so that we can place stack, malloc and BSS there. We load
110 * U-Boot itself into memory at 0x80800000 for legacy reasons (to not conflict
111 * with older SPLs). We have our BSS be placed 2MiB after this, to allow for
112 * the default Linux kernel address of 0x80008000 to work with most sized
113 * kernels, in the Falcon Mode case. We have the SPL malloc pool at the end
114 * of the BSS area. We suggest that the stack be placed at 32MiB after the
115 * start of DRAM to allow room for all of the above (handled in Kconfig).
Tom Rinia2f4c912013-08-09 11:22:17 -0400116 */
Tom Rinicfff4aa2016-08-26 13:30:43 -0400117
Tom Rinia2f4c912013-08-09 11:22:17 -0400118#ifdef CONFIG_SPL_OS_BOOT
Tom Rinia2f4c912013-08-09 11:22:17 -0400119/* FAT */
Tom Rinia2f4c912013-08-09 11:22:17 -0400120
121/* RAW SD card / eMMC */
Tom Rinia2f4c912013-08-09 11:22:17 -0400122#endif
123
Tom Rinif48e5ee2013-08-20 08:53:44 -0400124/* General parts of the framework, required. */
Tom Rinia2f4c912013-08-09 11:22:17 -0400125
Miquel Raynald0935362019-10-03 19:50:03 +0200126#ifdef CONFIG_MTD_RAW_NAND
Tom Rinib4213492022-11-12 17:36:51 -0500127#define CFG_SYS_NAND_U_BOOT_START CONFIG_TEXT_BASE
Tom Rinia2f4c912013-08-09 11:22:17 -0400128#endif
129#endif /* !CONFIG_NOR_BOOT */
130
Cooper Jr., Franklin07610ab2015-04-21 07:51:04 -0500131/* Generic Environment Variables */
132
133#ifdef CONFIG_CMD_NET
134#define NETARGS \
135 "static_ip=${ipaddr}:${serverip}:${gatewayip}:${netmask}:${hostname}" \
136 "::off\0" \
137 "nfsopts=nolock\0" \
138 "rootpath=/export/rootfs\0" \
139 "netloadimage=tftp ${loadaddr} ${bootfile}\0" \
140 "netloadfdt=tftp ${fdtaddr} ${fdtfile}\0" \
141 "netargs=setenv bootargs console=${console} " \
142 "${optargs} " \
143 "root=/dev/nfs " \
144 "nfsroot=${serverip}:${rootpath},${nfsopts} rw " \
145 "ip=dhcp\0" \
146 "netboot=echo Booting from network ...; " \
147 "setenv autoload no; " \
148 "dhcp; " \
149 "run netloadimage; " \
150 "run netloadfdt; " \
151 "run netargs; " \
152 "bootz ${loadaddr} - ${fdtaddr}\0"
Cooper Jr., Franklindcee9cf2015-06-10 08:54:02 -0500153#else
154#define NETARGS ""
Cooper Jr., Franklin07610ab2015-04-21 07:51:04 -0500155#endif
156
Manorit Chawdhry2744a762023-07-14 11:22:35 +0530157#ifdef CONFIG_ARM64
158#ifdef CONFIG_DISTRO_DEFAULTS
159#ifdef CONFIG_CMD_PXE
160# define BOOT_TARGET_PXE(func) func(PXE, pxe, na)
161#else
162# define BOOT_TARGET_PXE(func)
163#endif
164
165#ifdef CONFIG_CMD_DHCP
166# define BOOT_TARGET_DHCP(func) func(DHCP, dhcp, na)
167#else
168# define BOOT_TARGET_DHCP(func)
169#endif
170
171#ifdef CONFIG_CMD_MMC
172#define BOOT_TARGET_MMC(func) \
173 func(TI_MMC, ti_mmc, na) \
174 func(MMC, mmc, 0) \
175 func(MMC, mmc, 1)
176#else
177#define BOOT_TARGET_MMC(func)
178#endif
179
180#define BOOTENV_DEV_TI_MMC(devtypeu, devtypel, instance)
181
182#define BOOTENV_DEV_NAME_TI_MMC(devtyeu, devtypel, instance) \
183 "ti_mmc "
184
185#ifdef CONFIG_CMD_USB
186# define BOOT_TARGET_USB(func) func(USB, usb, 0)
187#else
188# define BOOT_TARGET_USB(func)
189#endif
190
191#define BOOT_TARGET_DEVICES(func) \
192 BOOT_TARGET_MMC(func) \
193 BOOT_TARGET_USB(func) \
194 BOOT_TARGET_PXE(func) \
195 BOOT_TARGET_DHCP(func)
196
197#include <config_distro_bootcmd.h>
198
199/* Incorporate settings into the U-Boot environment */
200#define CFG_EXTRA_ENV_SETTINGS \
201 BOOTENV
202
Nishanth Menonb5774032023-08-25 13:02:48 -0500203#endif /* CONFIG_DISTRO_DEFAULTS */
Manorit Chawdhry2744a762023-07-14 11:22:35 +0530204
205#endif /* CONFIG_ARM64 */
206
Tom Rinia2f4c912013-08-09 11:22:17 -0400207#endif /* __CONFIG_TI_ARMV7_COMMON_H__ */