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git01.mediatek.com / filogic / uboot / 87682e1aab5d3f3f48cdb618536996fe1b9bdd57 / . / arch / arm / dts / sdm845-db845c.dts
blob: c7eba6c491be2bf60af4876fe29f63f6132d4f0c [file] [log] [blame]
Caleb Connolly87682e12024-02-26 17:26:33 +0000[diff] [blame^]1// SPDX-License-Identifier: GPL-2.0
2/*
3 * Copyright (c) 2019, Linaro Ltd.
4 */
5
6/dts-v1/;
7
8#include <dt-bindings/leds/common.h>
9#include <dt-bindings/pinctrl/qcom,pmic-gpio.h>
10#include <dt-bindings/regulator/qcom,rpmh-regulator.h>
11#include <dt-bindings/sound/qcom,q6afe.h>
12#include <dt-bindings/sound/qcom,q6asm.h>
13#include "sdm845.dtsi"
14#include "sdm845-wcd9340.dtsi"
15#include "pm8998.dtsi"
16#include "pmi8998.dtsi"
17
18/ {
19 model = "Thundercomm Dragonboard 845c";
20 compatible = "thundercomm,db845c", "qcom,sdm845";
21 qcom,msm-id = <341 0x20001>;
22 qcom,board-id = <8 0>;
23
24 aliases {
25 serial0 = &uart9;
26 serial1 = &uart6;
27 };
28
29 chosen {
30 stdout-path = "serial0:115200n8";
31 };
32
33 /* Fixed crystal oscillator dedicated to MCP2517FD */
34 clk40M: can-clock {
35 compatible = "fixed-clock";
36 #clock-cells = <0>;
37 clock-frequency = <40000000>;
38 };
39
40 dc12v: dc12v-regulator {
41 compatible = "regulator-fixed";
42 regulator-name = "DC12V";
43 regulator-min-microvolt = <12000000>;
44 regulator-max-microvolt = <12000000>;
45 regulator-always-on;
46 };
47
48 gpio-keys {
49 compatible = "gpio-keys";
50 autorepeat;
51
52 pinctrl-names = "default";
53 pinctrl-0 = <&vol_up_pin_a>;
54
55 key-vol-up {
56 label = "Volume Up";
57 linux,code = <KEY_VOLUMEUP>;
58 gpios = <&pm8998_gpios 6 GPIO_ACTIVE_LOW>;
59 };
60 };
61
62 leds {
63 compatible = "gpio-leds";
64
65 led-0 {
66 label = "green:user4";
67 function = LED_FUNCTION_INDICATOR;
68 color = <LED_COLOR_ID_GREEN>;
69 gpios = <&pm8998_gpios 13 GPIO_ACTIVE_HIGH>;
70 linux,default-trigger = "panic-indicator";
71 default-state = "off";
72 };
73
74 led-1 {
75 label = "yellow:wlan";
76 function = LED_FUNCTION_WLAN;
77 color = <LED_COLOR_ID_YELLOW>;
78 gpios = <&pm8998_gpios 9 GPIO_ACTIVE_HIGH>;
79 linux,default-trigger = "phy0tx";
80 default-state = "off";
81 };
82
83 led-2 {
84 label = "blue:bt";
85 function = LED_FUNCTION_BLUETOOTH;
86 color = <LED_COLOR_ID_BLUE>;
87 gpios = <&pm8998_gpios 5 GPIO_ACTIVE_HIGH>;
88 linux,default-trigger = "bluetooth-power";
89 default-state = "off";
90 };
91 };
92
93 hdmi-out {
94 compatible = "hdmi-connector";
95 type = "a";
96
97 port {
98 hdmi_con: endpoint {
99 remote-endpoint = <&lt9611_out>;
100 };
101 };
102 };
103
104 reserved-memory {
105 /* Cont splash region set up by the bootloader */
106 cont_splash_mem: framebuffer@9d400000 {
107 reg = <0x0 0x9d400000 0x0 0x2400000>;
108 no-map;
109 };
110 };
111
112 lt9611_1v8: lt9611-vdd18-regulator {
113 compatible = "regulator-fixed";
114 regulator-name = "LT9611_1V8";
115
116 vin-supply = <&vdc_5v>;
117 regulator-min-microvolt = <1800000>;
118 regulator-max-microvolt = <1800000>;
119
120 gpio = <&tlmm 89 GPIO_ACTIVE_HIGH>;
121 enable-active-high;
122 };
123
124 lt9611_3v3: lt9611-3v3 {
125 compatible = "regulator-fixed";
126 regulator-name = "LT9611_3V3";
127
128 vin-supply = <&vdc_3v3>;
129 regulator-min-microvolt = <3300000>;
130 regulator-max-microvolt = <3300000>;
131
132 /*
133 * TODO: make it possible to drive same GPIO from two clients
134 * gpio = <&tlmm 89 GPIO_ACTIVE_HIGH>;
135 * enable-active-high;
136 */
137 };
138
139 pcie0_1p05v: pcie-0-1p05v-regulator {
140 compatible = "regulator-fixed";
141 regulator-name = "PCIE0_1.05V";
142
143 vin-supply = <&vbat>;
144 regulator-min-microvolt = <1050000>;
145 regulator-max-microvolt = <1050000>;
146
147 /*
148 * TODO: make it possible to drive same GPIO from two clients
149 * gpio = <&tlmm 90 GPIO_ACTIVE_HIGH>;
150 * enable-active-high;
151 */
152 };
153
154 cam0_dvdd_1v2: cam0-dvdd-1v2-regulator {
155 compatible = "regulator-fixed";
156 regulator-name = "CAM0_DVDD_1V2";
157 regulator-min-microvolt = <1200000>;
158 regulator-max-microvolt = <1200000>;
159 enable-active-high;
160 gpio = <&pm8998_gpios 12 GPIO_ACTIVE_HIGH>;
161 pinctrl-names = "default";
162 pinctrl-0 = <&cam0_dvdd_1v2_en_default>;
163 vin-supply = <&vbat>;
164 };
165
166 cam0_avdd_2v8: cam0-avdd-2v8-regulator {
167 compatible = "regulator-fixed";
168 regulator-name = "CAM0_AVDD_2V8";
169 regulator-min-microvolt = <2800000>;
170 regulator-max-microvolt = <2800000>;
171 enable-active-high;
172 gpio = <&pm8998_gpios 10 GPIO_ACTIVE_HIGH>;
173 pinctrl-names = "default";
174 pinctrl-0 = <&cam0_avdd_2v8_en_default>;
175 vin-supply = <&vbat>;
176 };
177
178 /* This regulator is enabled when the VREG_LVS1A_1P8 trace is enabled */
179 cam3_avdd_2v8: cam3-avdd-2v8-regulator {
180 compatible = "regulator-fixed";
181 regulator-name = "CAM3_AVDD_2V8";
182 regulator-min-microvolt = <2800000>;
183 regulator-max-microvolt = <2800000>;
184 regulator-always-on;
185 vin-supply = <&vbat>;
186 };
187
188 pcie0_3p3v_dual: vldo-3v3-regulator {
189 compatible = "regulator-fixed";
190 regulator-name = "VLDO_3V3";
191
192 vin-supply = <&vbat>;
193 regulator-min-microvolt = <3300000>;
194 regulator-max-microvolt = <3300000>;
195
196 gpio = <&tlmm 90 GPIO_ACTIVE_HIGH>;
197 enable-active-high;
198
199 pinctrl-names = "default";
200 pinctrl-0 = <&pcie0_pwren_state>;
201 };
202
203 v5p0_hdmiout: v5p0-hdmiout-regulator {
204 compatible = "regulator-fixed";
205 regulator-name = "V5P0_HDMIOUT";
206
207 vin-supply = <&vdc_5v>;
208 regulator-min-microvolt = <500000>;
209 regulator-max-microvolt = <500000>;
210
211 /*
212 * TODO: make it possible to drive same GPIO from two clients
213 * gpio = <&tlmm 89 GPIO_ACTIVE_HIGH>;
214 * enable-active-high;
215 */
216 };
217
218 vbat: vbat-regulator {
219 compatible = "regulator-fixed";
220 regulator-name = "VBAT";
221
222 vin-supply = <&dc12v>;
223 regulator-min-microvolt = <4200000>;
224 regulator-max-microvolt = <4200000>;
225 regulator-always-on;
226 };
227
228 vbat_som: vbat-som-regulator {
229 compatible = "regulator-fixed";
230 regulator-name = "VBAT_SOM";
231
232 vin-supply = <&dc12v>;
233 regulator-min-microvolt = <4200000>;
234 regulator-max-microvolt = <4200000>;
235 regulator-always-on;
236 };
237
238 vdc_3v3: vdc-3v3-regulator {
239 compatible = "regulator-fixed";
240 regulator-name = "VDC_3V3";
241 vin-supply = <&dc12v>;
242 regulator-min-microvolt = <3300000>;
243 regulator-max-microvolt = <3300000>;
244 regulator-always-on;
245 };
246
247 vdc_5v: vdc-5v-regulator {
248 compatible = "regulator-fixed";
249 regulator-name = "VDC_5V";
250
251 vin-supply = <&dc12v>;
252 regulator-min-microvolt = <500000>;
253 regulator-max-microvolt = <500000>;
254 regulator-always-on;
255 };
256
257 vreg_s4a_1p8: vreg-s4a-1p8 {
258 compatible = "regulator-fixed";
259 regulator-name = "vreg_s4a_1p8";
260
261 regulator-min-microvolt = <1800000>;
262 regulator-max-microvolt = <1800000>;
263 regulator-always-on;
264 };
265
266 vph_pwr: vph-pwr-regulator {
267 compatible = "regulator-fixed";
268 regulator-name = "vph_pwr";
269
270 vin-supply = <&vbat_som>;
271 };
272};
273
274&adsp_pas {
275 status = "okay";
276
277 firmware-name = "qcom/sdm845/adsp.mbn";
278};
279
280&apps_rsc {
281 regulators-0 {
282 compatible = "qcom,pm8998-rpmh-regulators";
283 qcom,pmic-id = "a";
284 vdd-s1-supply = <&vph_pwr>;
285 vdd-s2-supply = <&vph_pwr>;
286 vdd-s3-supply = <&vph_pwr>;
287 vdd-s4-supply = <&vph_pwr>;
288 vdd-s5-supply = <&vph_pwr>;
289 vdd-s6-supply = <&vph_pwr>;
290 vdd-s7-supply = <&vph_pwr>;
291 vdd-s8-supply = <&vph_pwr>;
292 vdd-s9-supply = <&vph_pwr>;
293 vdd-s10-supply = <&vph_pwr>;
294 vdd-s11-supply = <&vph_pwr>;
295 vdd-s12-supply = <&vph_pwr>;
296 vdd-s13-supply = <&vph_pwr>;
297 vdd-l1-l27-supply = <&vreg_s7a_1p025>;
298 vdd-l2-l8-l17-supply = <&vreg_s3a_1p35>;
299 vdd-l3-l11-supply = <&vreg_s7a_1p025>;
300 vdd-l4-l5-supply = <&vreg_s7a_1p025>;
301 vdd-l6-supply = <&vph_pwr>;
302 vdd-l7-l12-l14-l15-supply = <&vreg_s5a_2p04>;
303 vdd-l9-supply = <&vreg_bob>;
304 vdd-l10-l23-l25-supply = <&vreg_bob>;
305 vdd-l13-l19-l21-supply = <&vreg_bob>;
306 vdd-l16-l28-supply = <&vreg_bob>;
307 vdd-l18-l22-supply = <&vreg_bob>;
308 vdd-l20-l24-supply = <&vreg_bob>;
309 vdd-l26-supply = <&vreg_s3a_1p35>;
310 vin-lvs-1-2-supply = <&vreg_s4a_1p8>;
311
312 vreg_s3a_1p35: smps3 {
313 regulator-min-microvolt = <1352000>;
314 regulator-max-microvolt = <1352000>;
315 };
316
317 vreg_s5a_2p04: smps5 {
318 regulator-min-microvolt = <1904000>;
319 regulator-max-microvolt = <2040000>;
320 };
321
322 vreg_s7a_1p025: smps7 {
323 regulator-min-microvolt = <900000>;
324 regulator-max-microvolt = <1028000>;
325 };
326
327 vreg_l1a_0p875: ldo1 {
328 regulator-min-microvolt = <880000>;
329 regulator-max-microvolt = <880000>;
330 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
331 };
332
333 vreg_l5a_0p8: ldo5 {
334 regulator-min-microvolt = <800000>;
335 regulator-max-microvolt = <800000>;
336 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
337 };
338
339 vreg_l12a_1p8: ldo12 {
340 regulator-min-microvolt = <1800000>;
341 regulator-max-microvolt = <1800000>;
342 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
343 };
344
345 vreg_l7a_1p8: ldo7 {
346 regulator-min-microvolt = <1800000>;
347 regulator-max-microvolt = <1800000>;
348 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
349 };
350
351 vreg_l13a_2p95: ldo13 {
352 regulator-min-microvolt = <1800000>;
353 regulator-max-microvolt = <2960000>;
354 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
355 };
356
357 vreg_l17a_1p3: ldo17 {
358 regulator-min-microvolt = <1304000>;
359 regulator-max-microvolt = <1304000>;
360 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
361 };
362
363 vreg_l20a_2p95: ldo20 {
364 regulator-min-microvolt = <2960000>;
365 regulator-max-microvolt = <2968000>;
366 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
367 };
368
369 vreg_l21a_2p95: ldo21 {
370 regulator-min-microvolt = <2960000>;
371 regulator-max-microvolt = <2968000>;
372 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
373 };
374
375 vreg_l24a_3p075: ldo24 {
376 regulator-min-microvolt = <3088000>;
377 regulator-max-microvolt = <3088000>;
378 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
379 };
380
381 vreg_l25a_3p3: ldo25 {
382 regulator-min-microvolt = <3300000>;
383 regulator-max-microvolt = <3312000>;
384 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
385 };
386
387 vreg_l26a_1p2: ldo26 {
388 regulator-min-microvolt = <1200000>;
389 regulator-max-microvolt = <1200000>;
390 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
391 };
392
393 vreg_lvs1a_1p8: lvs1 {
394 regulator-min-microvolt = <1800000>;
395 regulator-max-microvolt = <1800000>;
396 regulator-always-on;
397 };
398
399 vreg_lvs2a_1p8: lvs2 {
400 regulator-min-microvolt = <1800000>;
401 regulator-max-microvolt = <1800000>;
402 regulator-always-on;
403 };
404 };
405
406 regulators-1 {
407 compatible = "qcom,pmi8998-rpmh-regulators";
408 qcom,pmic-id = "b";
409
410 vdd-bob-supply = <&vph_pwr>;
411
412 vreg_bob: bob {
413 regulator-min-microvolt = <3312000>;
414 regulator-max-microvolt = <3600000>;
415 regulator-initial-mode = <RPMH_REGULATOR_MODE_AUTO>;
416 regulator-allow-bypass;
417 };
418 };
419};
420
421&camss {
422 status = "okay";
423
424 vdda-phy-supply = <&vreg_l1a_0p875>;
425 vdda-pll-supply = <&vreg_l26a_1p2>;
426};
427
428&cdsp_pas {
429 status = "okay";
430 firmware-name = "qcom/sdm845/cdsp.mbn";
431};
432
433&gcc {
434 protected-clocks = <GCC_QSPI_CORE_CLK>,
435 <GCC_QSPI_CORE_CLK_SRC>,
436 <GCC_QSPI_CNOC_PERIPH_AHB_CLK>,
437 <GCC_LPASS_Q6_AXI_CLK>,
438 <GCC_LPASS_SWAY_CLK>;
439};
440
441&gmu {
442 status = "okay";
443};
444
445&gpi_dma0 {
446 status = "okay";
447};
448
449&gpi_dma1 {
450 status = "okay";
451};
452
453&gpu {
454 status = "okay";
455 zap-shader {
456 memory-region = <&gpu_mem>;
457 firmware-name = "qcom/sdm845/a630_zap.mbn";
458 };
459};
460
461&i2c10 {
462 status = "okay";
463 clock-frequency = <400000>;
464
465 lt9611_codec: hdmi-bridge@3b {
466 compatible = "lontium,lt9611";
467 reg = <0x3b>;
468 #sound-dai-cells = <1>;
469
470 interrupts-extended = <&tlmm 84 IRQ_TYPE_EDGE_FALLING>;
471
472 reset-gpios = <&tlmm 128 GPIO_ACTIVE_HIGH>;
473
474 vdd-supply = <&lt9611_1v8>;
475 vcc-supply = <&lt9611_3v3>;
476
477 pinctrl-names = "default";
478 pinctrl-0 = <&lt9611_irq_pin>, <&dsi_sw_sel>;
479
480 ports {
481 #address-cells = <1>;
482 #size-cells = <0>;
483
484 port@0 {
485 reg = <0>;
486
487 lt9611_a: endpoint {
488 remote-endpoint = <&mdss_dsi0_out>;
489 };
490 };
491
492 port@1 {
493 reg = <1>;
494
495 lt9611_b: endpoint {
496 remote-endpoint = <&mdss_dsi1_out>;
497 };
498 };
499
500 port@2 {
501 reg = <2>;
502
503 lt9611_out: endpoint {
504 remote-endpoint = <&hdmi_con>;
505 };
506 };
507 };
508 };
509};
510
511&i2c11 {
512 /* On Low speed expansion */
513 clock-frequency = <100000>;
514 status = "okay";
515};
516
517&i2c14 {
518 /* On Low speed expansion */
519 clock-frequency = <100000>;
520 status = "okay";
521};
522
523&mdss {
524 memory-region = <&cont_splash_mem>;
525 status = "okay";
526};
527
528&mdss_dsi0 {
529 status = "okay";
530 vdda-supply = <&vreg_l26a_1p2>;
531
532 qcom,dual-dsi-mode;
533 qcom,master-dsi;
534
535 ports {
536 port@1 {
537 endpoint {
538 remote-endpoint = <&lt9611_a>;
539 data-lanes = <0 1 2 3>;
540 };
541 };
542 };
543};
544
545&mdss_dsi0_phy {
546 status = "okay";
547 vdds-supply = <&vreg_l1a_0p875>;
548};
549
550&mdss_dsi1 {
551 vdda-supply = <&vreg_l26a_1p2>;
552
553 qcom,dual-dsi-mode;
554
555 /* DSI1 is slave, so use DSI0 clocks */
556 assigned-clock-parents = <&mdss_dsi0_phy 0>, <&mdss_dsi0_phy 1>;
557
558 status = "okay";
559
560 ports {
561 port@1 {
562 endpoint {
563 remote-endpoint = <&lt9611_b>;
564 data-lanes = <0 1 2 3>;
565 };
566 };
567 };
568};
569
570&mdss_dsi1_phy {
571 vdds-supply = <&vreg_l1a_0p875>;
572 status = "okay";
573};
574
575&mss_pil {
576 status = "okay";
577 firmware-name = "qcom/sdm845/mba.mbn", "qcom/sdm845/modem.mbn";
578};
579
580&pcie0 {
581 status = "okay";
582 perst-gpios = <&tlmm 35 GPIO_ACTIVE_LOW>;
583 enable-gpio = <&tlmm 134 GPIO_ACTIVE_HIGH>;
584
585 vddpe-3v3-supply = <&pcie0_3p3v_dual>;
586
587 pinctrl-names = "default";
588 pinctrl-0 = <&pcie0_default_state>;
589};
590
591&pcie0_phy {
592 status = "okay";
593
594 vdda-phy-supply = <&vreg_l1a_0p875>;
595 vdda-pll-supply = <&vreg_l26a_1p2>;
596};
597
598&pcie1 {
599 status = "okay";
600 perst-gpios = <&tlmm 102 GPIO_ACTIVE_LOW>;
601
602 pinctrl-names = "default";
603 pinctrl-0 = <&pcie1_default_state>;
604};
605
606&pcie1_phy {
607 status = "okay";
608
609 vdda-phy-supply = <&vreg_l1a_0p875>;
610 vdda-pll-supply = <&vreg_l26a_1p2>;
611};
612
613&pm8998_gpios {
614 gpio-line-names =
615 "NC",
616 "NC",
617 "WLAN_SW_CTRL",
618 "NC",
619 "PM_GPIO5_BLUE_BT_LED",
620 "VOL_UP_N",
621 "NC",
622 "ADC_IN1",
623 "PM_GPIO9_YEL_WIFI_LED",
624 "CAM0_AVDD_EN",
625 "NC",
626 "CAM0_DVDD_EN",
627 "PM_GPIO13_GREEN_U4_LED",
628 "DIV_CLK2",
629 "NC",
630 "NC",
631 "NC",
632 "SMB_STAT",
633 "NC",
634 "NC",
635 "ADC_IN2",
636 "OPTION1",
637 "WCSS_PWR_REQ",
638 "PM845_GPIO24",
639 "OPTION2",
640 "PM845_SLB";
641
642 cam0_dvdd_1v2_en_default: cam0-dvdd-1v2-en-state {
643 pins = "gpio12";
644 function = "normal";
645
646 bias-pull-up;
647 drive-push-pull;
648 qcom,drive-strength = <PMIC_GPIO_STRENGTH_HIGH>;
649 };
650
651 cam0_avdd_2v8_en_default: cam0-avdd-2v8-en-state {
652 pins = "gpio10";
653 function = "normal";
654
655 bias-pull-up;
656 drive-push-pull;
657 qcom,drive-strength = <PMIC_GPIO_STRENGTH_HIGH>;
658 };
659
660 vol_up_pin_a: vol-up-active-state {
661 pins = "gpio6";
662 function = "normal";
663 input-enable;
664 bias-pull-up;
665 qcom,drive-strength = <PMIC_GPIO_STRENGTH_NO>;
666 };
667};
668
669&pm8998_resin {
670 linux,code = <KEY_VOLUMEDOWN>;
671 status = "okay";
672};
673
674&pmi8998_lpg {
675 status = "okay";
676
677 qcom,power-source = <1>;
678
679 led@3 {
680 reg = <3>;
681 color = <LED_COLOR_ID_GREEN>;
682 function = LED_FUNCTION_HEARTBEAT;
683 function-enumerator = <3>;
684
685 linux,default-trigger = "heartbeat";
686 default-state = "on";
687 };
688
689 led@4 {
690 reg = <4>;
691 color = <LED_COLOR_ID_GREEN>;
692 function = LED_FUNCTION_INDICATOR;
693 function-enumerator = <2>;
694 };
695
696 led@5 {
697 reg = <5>;
698 color = <LED_COLOR_ID_GREEN>;
699 function = LED_FUNCTION_INDICATOR;
700 function-enumerator = <1>;
701 };
702};
703
704/* QUAT I2S Uses 4 I2S SD Lines for audio on LT9611 HDMI Bridge */
705&q6afedai {
706 dai@22 {
707 reg = <QUATERNARY_MI2S_RX>;
708 qcom,sd-lines = <0 1 2 3>;
709 };
710};
711
712&q6asmdai {
713 dai@0 {
714 reg = <0>;
715 };
716
717 dai@1 {
718 reg = <1>;
719 };
720
721 dai@2 {
722 reg = <2>;
723 };
724
725 dai@3 {
726 reg = <3>;
727 direction = <2>;
728 is-compress-dai;
729 };
730};
731
732&qupv3_id_0 {
733 status = "okay";
734};
735
736&qupv3_id_1 {
737 status = "okay";
738};
739
740&sdhc_2 {
741 status = "okay";
742
743 pinctrl-names = "default";
744 pinctrl-0 = <&sdc2_default_state &sdc2_card_det_n>;
745
746 vmmc-supply = <&vreg_l21a_2p95>;
747 vqmmc-supply = <&vreg_l13a_2p95>;
748
749 bus-width = <4>;
750 cd-gpios = <&tlmm 126 GPIO_ACTIVE_LOW>;
751};
752
753&sound {
754 compatible = "qcom,db845c-sndcard", "qcom,sdm845-sndcard";
755 pinctrl-0 = <&quat_mi2s_active
756 &quat_mi2s_sd0_active
757 &quat_mi2s_sd1_active
758 &quat_mi2s_sd2_active
759 &quat_mi2s_sd3_active>;
760 pinctrl-names = "default";
761 model = "DB845c";
762 audio-routing =
763 "RX_BIAS", "MCLK",
764 "AMIC1", "MIC BIAS1",
765 "AMIC2", "MIC BIAS2",
766 "DMIC0", "MIC BIAS1",
767 "DMIC1", "MIC BIAS1",
768 "DMIC2", "MIC BIAS3",
769 "DMIC3", "MIC BIAS3",
770 "SpkrLeft IN", "SPK1 OUT",
771 "SpkrRight IN", "SPK2 OUT",
772 "MM_DL1", "MultiMedia1 Playback",
773 "MM_DL2", "MultiMedia2 Playback",
774 "MM_DL4", "MultiMedia4 Playback",
775 "MultiMedia3 Capture", "MM_UL3";
776
777 mm1-dai-link {
778 link-name = "MultiMedia1";
779 cpu {
780 sound-dai = <&q6asmdai MSM_FRONTEND_DAI_MULTIMEDIA1>;
781 };
782 };
783
784 mm2-dai-link {
785 link-name = "MultiMedia2";
786 cpu {
787 sound-dai = <&q6asmdai MSM_FRONTEND_DAI_MULTIMEDIA2>;
788 };
789 };
790
791 mm3-dai-link {
792 link-name = "MultiMedia3";
793 cpu {
794 sound-dai = <&q6asmdai MSM_FRONTEND_DAI_MULTIMEDIA3>;
795 };
796 };
797
798 mm4-dai-link {
799 link-name = "MultiMedia4";
800 cpu {
801 sound-dai = <&q6asmdai MSM_FRONTEND_DAI_MULTIMEDIA4>;
802 };
803 };
804
805 hdmi-dai-link {
806 link-name = "HDMI Playback";
807 cpu {
808 sound-dai = <&q6afedai QUATERNARY_MI2S_RX>;
809 };
810
811 platform {
812 sound-dai = <&q6routing>;
813 };
814
815 codec {
816 sound-dai = <&lt9611_codec 0>;
817 };
818 };
819
820 slim-dai-link {
821 link-name = "SLIM Playback";
822 cpu {
823 sound-dai = <&q6afedai SLIMBUS_0_RX>;
824 };
825
826 platform {
827 sound-dai = <&q6routing>;
828 };
829
830 codec {
831 sound-dai = <&left_spkr>, <&right_spkr>, <&swm 0>, <&wcd9340 0>;
832 };
833 };
834
835 slimcap-dai-link {
836 link-name = "SLIM Capture";
837 cpu {
838 sound-dai = <&q6afedai SLIMBUS_0_TX>;
839 };
840
841 platform {
842 sound-dai = <&q6routing>;
843 };
844
845 codec {
846 sound-dai = <&wcd9340 1>;
847 };
848 };
849};
850
851&spi0 {
852 status = "okay";
853 pinctrl-names = "default";
854 pinctrl-0 = <&qup_spi0_default>;
855 cs-gpios = <&tlmm 3 GPIO_ACTIVE_LOW>;
856
857 can@0 {
858 compatible = "microchip,mcp2517fd";
859 reg = <0>;
860 clocks = <&clk40M>;
861 interrupts-extended = <&tlmm 104 IRQ_TYPE_LEVEL_LOW>;
862 spi-max-frequency = <10000000>;
863 vdd-supply = <&vdc_5v>;
864 xceiver-supply = <&vdc_5v>;
865 };
866};
867
868&spi2 {
869 /* On Low speed expansion */
870 status = "okay";
871};
872
873&tlmm {
874 cam0_default: cam0-default-state {
875 rst-pins {
876 pins = "gpio9";
877 function = "gpio";
878
879 drive-strength = <16>;
880 bias-disable;
881 };
882
883 mclk0-pins {
884 pins = "gpio13";
885 function = "cam_mclk";
886
887 drive-strength = <16>;
888 bias-disable;
889 };
890 };
891
892 cam3_default: cam3-default-state {
893 rst-pins {
894 function = "gpio";
895 pins = "gpio21";
896
897 drive-strength = <16>;
898 bias-disable;
899 };
900
901 mclk3-pins {
902 function = "cam_mclk";
903 pins = "gpio16";
904
905 drive-strength = <16>;
906 bias-disable;
907 };
908 };
909
910 dsi_sw_sel: dsi-sw-sel-state {
911 pins = "gpio120";
912 function = "gpio";
913
914 drive-strength = <2>;
915 bias-disable;
916 output-high;
917 };
918
919 lt9611_irq_pin: lt9611-irq-state {
920 pins = "gpio84";
921 function = "gpio";
922 bias-disable;
923 };
924
925 pcie0_default_state: pcie0-default-state {
926 clkreq-pins {
927 pins = "gpio36";
928 function = "pci_e0";
929 bias-pull-up;
930 };
931
932 reset-n-pins {
933 pins = "gpio35";
934 function = "gpio";
935
936 drive-strength = <2>;
937 output-low;
938 bias-pull-down;
939 };
940
941 wake-n-pins {
942 pins = "gpio37";
943 function = "gpio";
944
945 drive-strength = <2>;
946 bias-pull-up;
947 };
948 };
949
950 pcie0_pwren_state: pcie0-pwren-state {
951 pins = "gpio90";
952 function = "gpio";
953
954 drive-strength = <2>;
955 bias-disable;
956 };
957
958 pcie1_default_state: pcie1-default-state {
959 perst-n-pins {
960 pins = "gpio102";
961 function = "gpio";
962
963 drive-strength = <16>;
964 bias-disable;
965 };
966
967 clkreq-pins {
968 pins = "gpio103";
969 function = "pci_e1";
970 bias-pull-up;
971 };
972
973 wake-n-pins {
974 pins = "gpio11";
975 function = "gpio";
976
977 drive-strength = <2>;
978 bias-pull-up;
979 };
980
981 reset-n-pins {
982 pins = "gpio75";
983 function = "gpio";
984
985 drive-strength = <16>;
986 bias-pull-up;
987 output-high;
988 };
989 };
990
991 sdc2_default_state: sdc2-default-state {
992 clk-pins {
993 pins = "sdc2_clk";
994 bias-disable;
995
996 /*
997 * It seems that mmc_test reports errors if drive
998 * strength is not 16 on clk, cmd, and data pins.
999 */
1000 drive-strength = <16>;
1001 };
1002
1003 cmd-pins {
1004 pins = "sdc2_cmd";
1005 bias-pull-up;
1006 drive-strength = <10>;
1007 };
1008
1009 data-pins {
1010 pins = "sdc2_data";
1011 bias-pull-up;
1012 drive-strength = <10>;
1013 };
1014 };
1015
1016 sdc2_card_det_n: sd-card-det-n-state {
1017 pins = "gpio126";
1018 function = "gpio";
1019 bias-pull-up;
1020 };
1021};
1022
1023&uart3 {
1024 label = "LS-UART0";
1025 pinctrl-0 = <&qup_uart3_4pin>;
1026
1027 status = "disabled";
1028};
1029
1030&uart6 {
1031 status = "okay";
1032
1033 pinctrl-0 = <&qup_uart6_4pin>;
1034
1035 bluetooth {
1036 compatible = "qcom,wcn3990-bt";
1037
1038 vddio-supply = <&vreg_s4a_1p8>;
1039 vddxo-supply = <&vreg_l7a_1p8>;
1040 vddrf-supply = <&vreg_l17a_1p3>;
1041 vddch0-supply = <&vreg_l25a_3p3>;
1042 max-speed = <3200000>;
1043 };
1044};
1045
1046&uart9 {
1047 label = "LS-UART1";
1048 status = "okay";
1049};
1050
1051&usb_1 {
1052 status = "okay";
1053};
1054
1055&usb_1_dwc3 {
1056 dr_mode = "peripheral";
1057};
1058
1059&usb_1_hsphy {
1060 status = "okay";
1061
1062 vdd-supply = <&vreg_l1a_0p875>;
1063 vdda-pll-supply = <&vreg_l12a_1p8>;
1064 vdda-phy-dpdm-supply = <&vreg_l24a_3p075>;
1065
1066 qcom,imp-res-offset-value = <8>;
1067 qcom,hstx-trim-value = <QUSB2_V2_HSTX_TRIM_21_6_MA>;
1068 qcom,preemphasis-level = <QUSB2_V2_PREEMPHASIS_5_PERCENT>;
1069 qcom,preemphasis-width = <QUSB2_V2_PREEMPHASIS_WIDTH_HALF_BIT>;
1070};
1071
1072&usb_1_qmpphy {
1073 status = "okay";
1074
1075 vdda-phy-supply = <&vreg_l26a_1p2>;
1076 vdda-pll-supply = <&vreg_l1a_0p875>;
1077};
1078
1079&usb_2 {
1080 status = "okay";
1081};
1082
1083&usb_2_dwc3 {
1084 dr_mode = "host";
1085};
1086
1087&usb_2_hsphy {
1088 status = "okay";
1089
1090 vdd-supply = <&vreg_l1a_0p875>;
1091 vdda-pll-supply = <&vreg_l12a_1p8>;
1092 vdda-phy-dpdm-supply = <&vreg_l24a_3p075>;
1093
1094 qcom,imp-res-offset-value = <8>;
1095 qcom,hstx-trim-value = <QUSB2_V2_HSTX_TRIM_22_8_MA>;
1096};
1097
1098&usb_2_qmpphy {
1099 status = "okay";
1100
1101 vdda-phy-supply = <&vreg_l26a_1p2>;
1102 vdda-pll-supply = <&vreg_l1a_0p875>;
1103};
1104
1105&ufs_mem_hc {
1106 status = "okay";
1107
1108 reset-gpios = <&tlmm 150 GPIO_ACTIVE_LOW>;
1109
1110 vcc-supply = <&vreg_l20a_2p95>;
1111 vcc-max-microamp = <800000>;
1112};
1113
1114&ufs_mem_phy {
1115 status = "okay";
1116
1117 vdda-phy-supply = <&vreg_l1a_0p875>;
1118 vdda-pll-supply = <&vreg_l26a_1p2>;
1119};
1120
1121&venus {
1122 status = "okay";
1123};
1124
1125&wcd9340 {
1126 reset-gpios = <&tlmm 64 GPIO_ACTIVE_HIGH>;
1127 vdd-buck-supply = <&vreg_s4a_1p8>;
1128 vdd-buck-sido-supply = <&vreg_s4a_1p8>;
1129 vdd-tx-supply = <&vreg_s4a_1p8>;
1130 vdd-rx-supply = <&vreg_s4a_1p8>;
1131 vdd-io-supply = <&vreg_s4a_1p8>;
1132
1133 swm: swm@c85 {
1134 left_spkr: speaker@0,1 {
1135 compatible = "sdw10217201000";
1136 reg = <0 1>;
1137 powerdown-gpios = <&wcdgpio 1 GPIO_ACTIVE_HIGH>;
1138 #thermal-sensor-cells = <0>;
1139 sound-name-prefix = "SpkrLeft";
1140 #sound-dai-cells = <0>;
1141 };
1142
1143 right_spkr: speaker@0,2 {
1144 compatible = "sdw10217201000";
1145 powerdown-gpios = <&wcdgpio 1 GPIO_ACTIVE_HIGH>;
1146 reg = <0 2>;
1147 #thermal-sensor-cells = <0>;
1148 sound-name-prefix = "SpkrRight";
1149 #sound-dai-cells = <0>;
1150 };
1151 };
1152};
1153
1154&wifi {
1155 status = "okay";
1156
1157 vdd-0.8-cx-mx-supply = <&vreg_l5a_0p8>;
1158 vdd-1.8-xo-supply = <&vreg_l7a_1p8>;
1159 vdd-1.3-rfa-supply = <&vreg_l17a_1p3>;
1160 vdd-3.3-ch0-supply = <&vreg_l25a_3p3>;
1161
1162 qcom,snoc-host-cap-8bit-quirk;
1163 qcom,ath10k-calibration-variant = "Thundercomm_DB845C";
1164};
1165
1166/* PINCTRL - additions to nodes defined in sdm845.dtsi */
1167&qup_spi2_default {
1168 drive-strength = <16>;
1169};
1170
1171&qup_i2c10_default {
1172 drive-strength = <2>;
1173 bias-disable;
1174};
1175
1176&qup_uart9_rx {
1177 drive-strength = <2>;
1178 bias-pull-up;
1179};
1180
1181&qup_uart9_tx {
1182 drive-strength = <2>;
1183 bias-disable;
1184};
1185
1186/* PINCTRL - additions to nodes defined in sdm845.dtsi */
1187&qup_spi0_default {
1188 drive-strength = <6>;
1189 bias-disable;
1190};