blob: fe1c0a0d5eb4613e8e03664a58b66c5281693675 [file] [log] [blame]
wdenkc6097192002-11-03 00:24:07 +00001/*
2 * (C) Copyright 2000
3 * Rob Taylor, Flying Pig Systems. robt@flyingpig.com.
4 *
5 * See file CREDITS for list of people who contributed to this
6 * project.
7 *
8 * This program is free software; you can redistribute it and/or
9 * modify it under the terms of the GNU General Public License as
10 * published by the Free Software Foundation; either version 2 of
11 * the License, or (at your option) any later version.
12 *
13 * This program is distributed in the hope that it will be useful,
14 * but WITHOUT ANY WARRANTY; without even the implied warranty of
15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 * GNU General Public License for more details.
17 *
18 * You should have received a copy of the GNU General Public License
19 * along with this program; if not, write to the Free Software
20 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
21 * MA 02111-1307 USA
22 */
23
24#include <common.h>
25#include <mpc824x.h>
26#include <pci.h>
27
28int checkboard (void)
29{
30 /*TODO: Check processor type */
31
32 puts ( "Board: Sandpoint "
33#ifdef CONFIG_MPC8240
34 "8240"
35#endif
36#ifdef CONFIG_MPC8245
37 "8245"
38#endif
39 " Unity ##Test not implemented yet##\n");
40 return 0;
41}
42
43#if 0 /* NOT USED */
44int checkflash (void)
45{
46 /* TODO: XXX XXX XXX */
47 printf ("## Test not implemented yet ##\n");
48
49 return (0);
50}
51#endif
52
53long int initdram (int board_type)
54{
55 int i, cnt;
56 volatile uchar * base= CFG_SDRAM_BASE;
57 volatile ulong * addr;
58 ulong save[32];
59 ulong val, ret = 0;
60
61 for (i=0, cnt=(CFG_MAX_RAM_SIZE / sizeof(long)) >> 1; cnt > 0; cnt >>= 1) {
62 addr = (volatile ulong *)base + cnt;
63 save[i++] = *addr;
64 *addr = ~cnt;
65 }
66
67 addr = (volatile ulong *)base;
68 save[i] = *addr;
69 *addr = 0;
70
71 if (*addr != 0) {
72 *addr = save[i];
73 goto Done;
74 }
75
76 for (cnt = 1; cnt <= CFG_MAX_RAM_SIZE / sizeof(long); cnt <<= 1) {
77 addr = (volatile ulong *)base + cnt;
78 val = *addr;
79 *addr = save[--i];
80 if (val != ~cnt) {
81 ulong new_bank0_end = cnt * sizeof(long) - 1;
82 ulong mear1 = mpc824x_mpc107_getreg(MEAR1);
83 ulong emear1 = mpc824x_mpc107_getreg(EMEAR1);
84 mear1 = (mear1 & 0xFFFFFF00) |
85 ((new_bank0_end & MICR_ADDR_MASK) >> MICR_ADDR_SHIFT);
86 emear1 = (emear1 & 0xFFFFFF00) |
87 ((new_bank0_end & MICR_ADDR_MASK) >> MICR_EADDR_SHIFT);
88 mpc824x_mpc107_setreg(MEAR1, mear1);
89 mpc824x_mpc107_setreg(EMEAR1, emear1);
90
91 ret = cnt * sizeof(long);
92 goto Done;
93 }
94 }
95
96 ret = CFG_MAX_RAM_SIZE;
97Done:
98 return ret;
99}
100
101/*
102 * Initialize PCI Devices, report devices found.
103 */
104#ifndef CONFIG_PCI_PNP
105static struct pci_config_table pci_sandpoint_config_table[] = {
106 { PCI_ANY_ID, PCI_ANY_ID, PCI_ANY_ID, PCI_ANY_ID, 0x0f, PCI_ANY_ID,
107 pci_cfgfunc_config_device, { PCI_ENET0_IOADDR,
108 PCI_ENET0_MEMADDR,
109 PCI_COMMAND_MEMORY | PCI_COMMAND_MASTER }},
110 { PCI_ANY_ID, PCI_ANY_ID, PCI_ANY_ID, PCI_ANY_ID, 0x10, PCI_ANY_ID,
111 pci_cfgfunc_config_device, { PCI_ENET1_IOADDR,
112 PCI_ENET1_MEMADDR,
113 PCI_COMMAND_MEMORY | PCI_COMMAND_MASTER }},
114 { }
115};
116#endif
117
118struct pci_controller hose = {
119#ifndef CONFIG_PCI_PNP
120 config_table: pci_sandpoint_config_table,
121#endif
122};
123
stroesef5dd4102003-02-14 11:21:23 +0000124void pci_init_board(void)
wdenkc6097192002-11-03 00:24:07 +0000125{
126 pci_mpc824x_init(&hose);
127}