Tom Rini | 10e4779 | 2018-05-06 17:58:06 -0400 | [diff] [blame] | 1 | /* SPDX-License-Identifier: GPL-2.0+ */ |
Nobuhiro Iwamatsu | dabcc0e | 2007-09-23 02:31:13 +0900 | [diff] [blame] | 2 | /* |
| 3 | * Configuation settings for the Hitachi Solution Engine 7722 |
| 4 | * |
| 5 | * Copyright (C) 2007 Nobuhiro Iwamatsu <iwamatsu@nigauri.org> |
Nobuhiro Iwamatsu | dabcc0e | 2007-09-23 02:31:13 +0900 | [diff] [blame] | 6 | */ |
| 7 | |
| 8 | #ifndef __MS7722SE_H |
| 9 | #define __MS7722SE_H |
| 10 | |
Nobuhiro Iwamatsu | dabcc0e | 2007-09-23 02:31:13 +0900 | [diff] [blame] | 11 | #define CONFIG_CPU_SH7722 1 |
Nobuhiro Iwamatsu | dabcc0e | 2007-09-23 02:31:13 +0900 | [diff] [blame] | 12 | |
Vladimir Zapolskiy | 5e72b84 | 2016-11-28 00:15:30 +0200 | [diff] [blame] | 13 | #define CONFIG_DISPLAY_BOARDINFO |
Nobuhiro Iwamatsu | dabcc0e | 2007-09-23 02:31:13 +0900 | [diff] [blame] | 14 | #undef CONFIG_SHOW_BOOT_PROGRESS |
| 15 | |
| 16 | /* SMC9111 */ |
Ben Warren | 0fd6aae | 2009-10-04 22:37:03 -0700 | [diff] [blame] | 17 | #define CONFIG_SMC91111 |
Nobuhiro Iwamatsu | dabcc0e | 2007-09-23 02:31:13 +0900 | [diff] [blame] | 18 | #define CONFIG_SMC91111_BASE (0xB8000000) |
| 19 | |
| 20 | /* MEMORY */ |
| 21 | #define MS7722SE_SDRAM_BASE (0x8C000000) |
| 22 | #define MS7722SE_FLASH_BASE_1 (0xA0000000) |
Nobuhiro Iwamatsu | dabcc0e | 2007-09-23 02:31:13 +0900 | [diff] [blame] | 23 | #define MS7722SE_FLASH_BANK_SIZE (8*1024 * 1024) |
| 24 | |
Jean-Christophe PLAGNIOL-VILLARD | 0383694 | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 25 | #define CONFIG_SYS_PBSIZE 256 /* Buffer size for Console output */ |
Jean-Christophe PLAGNIOL-VILLARD | 0383694 | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 26 | #define CONFIG_SYS_BAUDRATE_TABLE { 115200 } /* List of legal baudrate settings for this board */ |
Nobuhiro Iwamatsu | dabcc0e | 2007-09-23 02:31:13 +0900 | [diff] [blame] | 27 | |
| 28 | /* SCIF */ |
Nobuhiro Iwamatsu | dabcc0e | 2007-09-23 02:31:13 +0900 | [diff] [blame] | 29 | #define CONFIG_CONS_SCIF0 1 |
Nobuhiro Iwamatsu | dabcc0e | 2007-09-23 02:31:13 +0900 | [diff] [blame] | 30 | |
Jean-Christophe PLAGNIOL-VILLARD | 0383694 | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 31 | #define CONFIG_SYS_MEMTEST_START (MS7722SE_SDRAM_BASE) |
| 32 | #define CONFIG_SYS_MEMTEST_END (CONFIG_SYS_MEMTEST_START + (60 * 1024 * 1024)) |
Nobuhiro Iwamatsu | dabcc0e | 2007-09-23 02:31:13 +0900 | [diff] [blame] | 33 | |
Jean-Christophe PLAGNIOL-VILLARD | 0383694 | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 34 | #undef CONFIG_SYS_MEMTEST_SCRATCH /* Scratch address used by the alternate memory test */ |
Nobuhiro Iwamatsu | dabcc0e | 2007-09-23 02:31:13 +0900 | [diff] [blame] | 35 | |
Jean-Christophe PLAGNIOL-VILLARD | 0383694 | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 36 | #undef CONFIG_SYS_LOADS_BAUD_CHANGE /* Enable temporary baudrate change while serial download */ |
Nobuhiro Iwamatsu | dabcc0e | 2007-09-23 02:31:13 +0900 | [diff] [blame] | 37 | |
Jean-Christophe PLAGNIOL-VILLARD | 0383694 | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 38 | #define CONFIG_SYS_SDRAM_BASE (MS7722SE_SDRAM_BASE) |
| 39 | #define CONFIG_SYS_SDRAM_SIZE (64 * 1024 * 1024) /* maybe more, but if so u-boot doesn't know about it... */ |
Nobuhiro Iwamatsu | dabcc0e | 2007-09-23 02:31:13 +0900 | [diff] [blame] | 40 | |
Jean-Christophe PLAGNIOL-VILLARD | 0383694 | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 41 | #define CONFIG_SYS_LOAD_ADDR (CONFIG_SYS_SDRAM_BASE + 4 * 1024 * 1024) /* default load address for scripts ?!? */ |
Nobuhiro Iwamatsu | dabcc0e | 2007-09-23 02:31:13 +0900 | [diff] [blame] | 42 | |
Jean-Christophe PLAGNIOL-VILLARD | 0383694 | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 43 | #define CONFIG_SYS_MONITOR_BASE (MS7722SE_FLASH_BASE_1) /* Address of u-boot image |
Wolfgang Denk | a1be476 | 2008-05-20 16:00:29 +0200 | [diff] [blame] | 44 | in Flash (NOT run time address in SDRAM) ?!? */ |
Jean-Christophe PLAGNIOL-VILLARD | 0383694 | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 45 | #define CONFIG_SYS_MONITOR_LEN (128 * 1024) /* */ |
| 46 | #define CONFIG_SYS_MALLOC_LEN (256 * 1024) /* Size of DRAM reserved for malloc() use */ |
Jean-Christophe PLAGNIOL-VILLARD | 0383694 | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 47 | #define CONFIG_SYS_BOOTMAPSZ (8 * 1024 * 1024) |
Nobuhiro Iwamatsu | dabcc0e | 2007-09-23 02:31:13 +0900 | [diff] [blame] | 48 | |
| 49 | /* FLASH */ |
Jean-Christophe PLAGNIOL-VILLARD | 0383694 | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 50 | #undef CONFIG_SYS_FLASH_QUIET_TEST |
| 51 | #define CONFIG_SYS_FLASH_EMPTY_INFO /* print 'E' for empty sector on flinfo */ |
Nobuhiro Iwamatsu | dabcc0e | 2007-09-23 02:31:13 +0900 | [diff] [blame] | 52 | |
Jean-Christophe PLAGNIOL-VILLARD | 0383694 | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 53 | #define CONFIG_SYS_FLASH_BASE (MS7722SE_FLASH_BASE_1) /* Physical start address of Flash memory */ |
Nobuhiro Iwamatsu | dabcc0e | 2007-09-23 02:31:13 +0900 | [diff] [blame] | 54 | |
Jean-Christophe PLAGNIOL-VILLARD | 0383694 | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 55 | #define CONFIG_SYS_MAX_FLASH_SECT 150 /* Max number of sectors on each |
Wolfgang Denk | a1be476 | 2008-05-20 16:00:29 +0200 | [diff] [blame] | 56 | Flash chip */ |
Nobuhiro Iwamatsu | dabcc0e | 2007-09-23 02:31:13 +0900 | [diff] [blame] | 57 | |
| 58 | /* if you use all NOR Flash , you change dip-switch. Please see MS7722SE01 Manual. */ |
Jean-Christophe PLAGNIOL-VILLARD | 0383694 | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 59 | #define CONFIG_SYS_MAX_FLASH_BANKS 2 |
| 60 | #define CONFIG_SYS_FLASH_BANKS_LIST { CONFIG_SYS_FLASH_BASE + (0 * MS7722SE_FLASH_BANK_SIZE), \ |
| 61 | CONFIG_SYS_FLASH_BASE + (1 * MS7722SE_FLASH_BANK_SIZE), \ |
Nobuhiro Iwamatsu | dabcc0e | 2007-09-23 02:31:13 +0900 | [diff] [blame] | 62 | } |
| 63 | |
Jean-Christophe PLAGNIOL-VILLARD | 0383694 | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 64 | #define CONFIG_SYS_FLASH_ERASE_TOUT (3 * 1000) /* Timeout for Flash erase operations (in ms) */ |
| 65 | #define CONFIG_SYS_FLASH_WRITE_TOUT (3 * 1000) /* Timeout for Flash write operations (in ms) */ |
| 66 | #define CONFIG_SYS_FLASH_LOCK_TOUT (3 * 1000) /* Timeout for Flash set sector lock bit operations (in ms) */ |
| 67 | #define CONFIG_SYS_FLASH_UNLOCK_TOUT (3 * 1000) /* Timeout for Flash clear lock bit operations (in ms) */ |
Nobuhiro Iwamatsu | dabcc0e | 2007-09-23 02:31:13 +0900 | [diff] [blame] | 68 | |
Jean-Christophe PLAGNIOL-VILLARD | 0383694 | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 69 | #undef CONFIG_SYS_DIRECT_FLASH_TFTP |
Nobuhiro Iwamatsu | dabcc0e | 2007-09-23 02:31:13 +0900 | [diff] [blame] | 70 | |
Nobuhiro Iwamatsu | dabcc0e | 2007-09-23 02:31:13 +0900 | [diff] [blame] | 71 | #define CONFIG_ENV_OVERWRITE 1 |
Jean-Christophe PLAGNIOL-VILLARD | 7e1cda6 | 2008-09-10 22:48:06 +0200 | [diff] [blame] | 72 | #define CONFIG_ENV_SECT_SIZE (8 * 1024) |
| 73 | #define CONFIG_ENV_SIZE (CONFIG_ENV_SECT_SIZE) |
Jean-Christophe PLAGNIOL-VILLARD | 0383694 | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 74 | #define CONFIG_ENV_ADDR (CONFIG_SYS_FLASH_BASE + (1 * CONFIG_ENV_SECT_SIZE)) |
| 75 | #define CONFIG_ENV_OFFSET (CONFIG_ENV_ADDR - CONFIG_SYS_FLASH_BASE) /* Offset of env Flash sector relative to CONFIG_SYS_FLASH_BASE */ |
Jean-Christophe PLAGNIOL-VILLARD | 7e1cda6 | 2008-09-10 22:48:06 +0200 | [diff] [blame] | 76 | #define CONFIG_ENV_SIZE_REDUND (CONFIG_ENV_SECT_SIZE) |
Jean-Christophe PLAGNIOL-VILLARD | 0383694 | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 77 | #define CONFIG_ENV_ADDR_REDUND (CONFIG_SYS_FLASH_BASE + (2 * CONFIG_ENV_SECT_SIZE)) |
Nobuhiro Iwamatsu | dabcc0e | 2007-09-23 02:31:13 +0900 | [diff] [blame] | 78 | |
| 79 | /* Board Clock */ |
| 80 | #define CONFIG_SYS_CLK_FREQ 33333333 |
Nobuhiro Iwamatsu | e698449 | 2013-08-21 16:11:21 +0900 | [diff] [blame] | 81 | #define CONFIG_SH_SCIF_CLK_FREQ CONFIG_SYS_CLK_FREQ |
Nobuhiro Iwamatsu | dabcc0e | 2007-09-23 02:31:13 +0900 | [diff] [blame] | 82 | |
| 83 | #endif /* __MS7722SE_H */ |