blob: 6ee22d2944b5acfd9ed782979ad00775567bd58f [file] [log] [blame]
Bharat Kumar Reddy Gooty436efc02019-12-16 09:09:43 -08001// SPDX-License-Identifier: GPL-2.0+
2/*
3 * Copyright 2019 Broadcom.
4 */
5#include <common.h>
6#include <asm/gic.h>
7#include <asm/gic-v3.h>
8#include <asm/io.h>
Wasim Khan1fc54802020-02-14 11:00:52 +05309#include <linux/sizes.h>
Bharat Kumar Reddy Gooty436efc02019-12-16 09:09:43 -080010
11static u32 lpi_id_bits;
12
13#define LPI_NRBITS lpi_id_bits
14#define LPI_PROPBASE_SZ ALIGN(BIT(LPI_NRBITS), SZ_64K)
15#define LPI_PENDBASE_SZ ALIGN(BIT(LPI_NRBITS) / 8, SZ_64K)
16
17/*
18 * Program the GIC LPI configuration tables for all
19 * the re-distributors and enable the LPI table
20 * base: Configuration table address
21 * num_redist: number of redistributors
22 */
23int gic_lpi_tables_init(u64 base, u32 num_redist)
24{
25 u32 gicd_typer;
26 u64 val;
27 u64 tmp;
28 int i;
29 u64 redist_lpi_base;
30 u64 pend_base = GICR_BASE + GICR_PENDBASER;
31
32 gicd_typer = readl(GICD_BASE + GICD_TYPER);
33
34 /* GIC support for Locality specific peripheral interrupts (LPI's) */
35 if (!(gicd_typer & GICD_TYPER_LPIS)) {
36 pr_err("GIC implementation does not support LPI's\n");
37 return -EINVAL;
38 }
39
40 /*
41 * Check for LPI is disabled for all the redistributors.
42 * Once the LPI table is enabled, can not program the
43 * LPI configuration tables again, unless the GIC is reset.
44 */
45 for (i = 0; i < num_redist; i++) {
46 u32 offset = i * GIC_REDISTRIBUTOR_OFFSET;
47
48 if ((readl((uintptr_t)(GICR_BASE + offset))) &
49 GICR_CTLR_ENABLE_LPIS) {
50 pr_err("Re-Distributor %d LPI is already enabled\n",
51 i);
52 return -EINVAL;
53 }
54 }
55
56 /* lpi_id_bits to get LPI_PENDBASE_SZ and LPi_PROPBASE_SZ */
57 lpi_id_bits = min_t(u32, GICD_TYPER_ID_BITS(gicd_typer),
58 ITS_MAX_LPI_NRBITS);
59
60 /* Set PropBase */
61 val = (base |
62 GICR_PROPBASER_INNERSHAREABLE |
63 GICR_PROPBASER_RAWAWB |
64 ((LPI_NRBITS - 1) & GICR_PROPBASER_IDBITS_MASK));
65
66 writeq(val, (GICR_BASE + GICR_PROPBASER));
67 tmp = readl(GICR_BASE + GICR_PROPBASER);
68 if ((tmp ^ val) & GICR_PROPBASER_SHAREABILITY_MASK) {
69 if (!(tmp & GICR_PROPBASER_SHAREABILITY_MASK)) {
70 val &= ~(GICR_PROPBASER_SHAREABILITY_MASK |
71 GICR_PROPBASER_CACHEABILITY_MASK);
72 val |= GICR_PROPBASER_NC;
73 writeq(val, (GICR_BASE + GICR_PROPBASER));
74 }
75 }
76
77 redist_lpi_base = base + LPI_PROPBASE_SZ;
78
79 for (i = 0; i < num_redist; i++) {
80 u32 offset = i * GIC_REDISTRIBUTOR_OFFSET;
81
82 val = ((redist_lpi_base + (i * LPI_PENDBASE_SZ)) |
83 GICR_PENDBASER_INNERSHAREABLE |
84 GICR_PENDBASER_RAWAWB);
85
86 writeq(val, (uintptr_t)(pend_base + offset));
87 tmp = readq((uintptr_t)(pend_base + offset));
88 if (!(tmp & GICR_PENDBASER_SHAREABILITY_MASK)) {
89 val &= ~(GICR_PENDBASER_SHAREABILITY_MASK |
90 GICR_PENDBASER_CACHEABILITY_MASK);
91 val |= GICR_PENDBASER_NC;
92 writeq(val, (uintptr_t)(pend_base + offset));
93 }
94
95 /* Enable LPI for the redistributor */
96 writel(GICR_CTLR_ENABLE_LPIS, (uintptr_t)(GICR_BASE + offset));
97 }
98
99 return 0;
100}
101