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TsiChungLiew99b037a2008-01-14 17:43:33 -06001/*
2 * Configuation settings for the Freescale MCF52277 EVB board.
3 *
4 * Copyright (C) 2004-2007 Freescale Semiconductor, Inc.
5 * TsiChung Liew (Tsi-Chung.Liew@freescale.com)
6 *
Wolfgang Denkbd8ec7e2013-10-07 13:07:26 +02007 * SPDX-License-Identifier: GPL-2.0+
TsiChungLiew99b037a2008-01-14 17:43:33 -06008 */
9
10/*
11 * board/config.h - configuration options, board specific
12 */
13
14#ifndef _M52277EVB_H
15#define _M52277EVB_H
16
17/*
18 * High Level Configuration Options
19 * (easy to change)
20 */
TsiChungLiew99b037a2008-01-14 17:43:33 -060021#define CONFIG_M52277EVB /* M52277EVB board */
22
TsiChungLiew99b037a2008-01-14 17:43:33 -060023#define CONFIG_MCFUART
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +020024#define CONFIG_SYS_UART_PORT (0)
TsiChung Liew39966e32008-10-21 15:37:02 +000025#define CONFIG_BAUDRATE 115200
TsiChungLiew99b037a2008-01-14 17:43:33 -060026
27#undef CONFIG_WATCHDOG
28
29#define CONFIG_TIMESTAMP /* Print image info with timestamp */
30
31/*
32 * BOOTP options
33 */
34#define CONFIG_BOOTP_BOOTFILESIZE
35#define CONFIG_BOOTP_BOOTPATH
36#define CONFIG_BOOTP_GATEWAY
37#define CONFIG_BOOTP_HOSTNAME
38
39/* Command line configuration */
TsiChungLiew99b037a2008-01-14 17:43:33 -060040#define CONFIG_CMD_CACHE
41#define CONFIG_CMD_DATE
42#define CONFIG_CMD_ELF
TsiChungLiew99b037a2008-01-14 17:43:33 -060043#define CONFIG_CMD_I2C
44#define CONFIG_CMD_JFFS2
TsiChungLiew99b037a2008-01-14 17:43:33 -060045#define CONFIG_CMD_REGINFO
46#undef CONFIG_CMD_USB
47#undef CONFIG_CMD_BMP
TsiChung Liew39966e32008-10-21 15:37:02 +000048#define CONFIG_CMD_SPI
49#define CONFIG_CMD_SF
TsiChungLiew99b037a2008-01-14 17:43:33 -060050
TsiChung Liew39966e32008-10-21 15:37:02 +000051#define CONFIG_HOSTNAME M52277EVB
52#define CONFIG_SYS_UBOOT_END 0x3FFFF
53#define CONFIG_SYS_LOAD_ADDR2 0x40010007
54#ifdef CONFIG_SYS_STMICRO_BOOT
55/* ST Micro serial flash */
TsiChungLiew99b037a2008-01-14 17:43:33 -060056#define CONFIG_EXTRA_ENV_SETTINGS \
Marek Vasut0b3176c2012-09-23 17:41:24 +020057 "inpclk=" __stringify(CONFIG_SYS_INPUT_CLKSRC) "\0" \
TsiChung Liew39966e32008-10-21 15:37:02 +000058 "loadaddr=0x40010000\0" \
59 "uboot=u-boot.bin\0" \
60 "load=loadb ${loadaddr} ${baudrate};" \
Marek Vasut0b3176c2012-09-23 17:41:24 +020061 "loadb " __stringify(CONFIG_SYS_LOAD_ADDR2) " ${baudrate} \0" \
TsiChungLiew99b037a2008-01-14 17:43:33 -060062 "upd=run load; run prog\0" \
TsiChung Liew39966e32008-10-21 15:37:02 +000063 "prog=sf probe 0:2 10000 1;" \
64 "sf erase 0 30000;" \
65 "sf write ${loadaddr} 0 30000;" \
TsiChungLiew99b037a2008-01-14 17:43:33 -060066 "save\0" \
67 ""
TsiChung Liew39966e32008-10-21 15:37:02 +000068#endif
69#ifdef CONFIG_SYS_SPANSION_BOOT
70#define CONFIG_EXTRA_ENV_SETTINGS \
Marek Vasut0b3176c2012-09-23 17:41:24 +020071 "inpclk=" __stringify(CONFIG_SYS_INPUT_CLKSRC) "\0" \
TsiChung Liew39966e32008-10-21 15:37:02 +000072 "loadaddr=0x40010000\0" \
73 "uboot=u-boot.bin\0" \
74 "load=loadb ${loadaddr} ${baudrate}\0" \
75 "upd=run load; run prog\0" \
Marek Vasut0b3176c2012-09-23 17:41:24 +020076 "prog=prot off " __stringify(CONFIG_SYS_FLASH_BASE) \
77 " " __stringify(CONFIG_SYS_UBOOT_END) ";" \
78 "era " __stringify(CONFIG_SYS_FLASH_BASE) " " \
79 __stringify(CONFIG_SYS_UBOOT_END) ";" \
80 "cp.b ${loadaddr} " __stringify(CONFIG_SYS_FLASH_BASE) \
TsiChung Liew39966e32008-10-21 15:37:02 +000081 " ${filesize}; save\0" \
82 "updsbf=run loadsbf; run progsbf\0" \
83 "loadsbf=loadb ${loadaddr} ${baudrate};" \
Marek Vasut0b3176c2012-09-23 17:41:24 +020084 "loadb " __stringify(CONFIG_SYS_LOAD_ADDR2) " ${baudrate} \0" \
TsiChung Liew39966e32008-10-21 15:37:02 +000085 "progsbf=sf probe 0:2 10000 1;" \
86 "sf erase 0 30000;" \
87 "sf write ${loadaddr} 0 30000;" \
88 ""
89#endif
TsiChungLiew99b037a2008-01-14 17:43:33 -060090
TsiChung Liew39966e32008-10-21 15:37:02 +000091#define CONFIG_BOOTDELAY 3 /* autoboot after 3 seconds */
TsiChungLiew99b037a2008-01-14 17:43:33 -060092/* LCD */
93#ifdef CONFIG_CMD_BMP
94#define CONFIG_LCD
95#define CONFIG_SPLASH_SCREEN
96#define CONFIG_LCD_LOGO
97#define CONFIG_SHARP_LQ035Q7DH06
98#endif
99
100/* USB */
101#ifdef CONFIG_CMD_USB
102#define CONFIG_USB_EHCI
103#define CONFIG_USB_STORAGE
104#define CONFIG_DOS_PARTITION
105#define CONFIG_MAC_PARTITION
106#define CONFIG_ISO_PARTITION
TsiChung Liew39966e32008-10-21 15:37:02 +0000107#define CONFIG_SYS_USB_EHCI_REGS_BASE 0xFC0B0000
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +0200108#define CONFIG_SYS_USB_EHCI_CPU_INIT
TsiChungLiew99b037a2008-01-14 17:43:33 -0600109#endif
110
111/* Realtime clock */
112#define CONFIG_MCFRTC
113#undef RTC_DEBUG
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +0200114#define CONFIG_SYS_RTC_OSCILLATOR (32 * CONFIG_SYS_HZ)
TsiChungLiew99b037a2008-01-14 17:43:33 -0600115
116/* Timer */
117#define CONFIG_MCFTMR
118#undef CONFIG_MCFPIT
119
120/* I2c */
Heiko Schocherf2850742012-10-24 13:48:22 +0200121#define CONFIG_SYS_I2C
122#define CONFIG_SYS_I2C_FSL
123#define CONFIG_SYS_FSL_I2C_SPEED 80000
124#define CONFIG_SYS_FSL_I2C_SLAVE 0x7F
125#define CONFIG_SYS_FSL_I2C_OFFSET 0x58000
TsiChung Liew39966e32008-10-21 15:37:02 +0000126#define CONFIG_SYS_IMMR CONFIG_SYS_MBAR
127
128/* DSPI and Serial Flash */
TsiChung Liewa424ba22009-06-30 14:18:29 +0000129#define CONFIG_CF_SPI
TsiChung Liew39966e32008-10-21 15:37:02 +0000130#define CONFIG_CF_DSPI
131#define CONFIG_HARD_SPI
TsiChung Liew39966e32008-10-21 15:37:02 +0000132#define CONFIG_SYS_SBFHDR_SIZE 0x7
133#ifdef CONFIG_CMD_SPI
134# define CONFIG_SYS_DSPI_CS2
TsiChung Liew39966e32008-10-21 15:37:02 +0000135# define CONFIG_SPI_FLASH_STMICRO
136
TsiChung Liewa424ba22009-06-30 14:18:29 +0000137# define CONFIG_SYS_DSPI_CTAR0 (DSPI_CTAR_TRSZ(7) | \
138 DSPI_CTAR_PCSSCK_1CLK | \
139 DSPI_CTAR_PASC(0) | \
140 DSPI_CTAR_PDT(0) | \
141 DSPI_CTAR_CSSCK(0) | \
142 DSPI_CTAR_ASC(0) | \
143 DSPI_CTAR_DT(1))
TsiChung Liew39966e32008-10-21 15:37:02 +0000144#endif
TsiChungLiew99b037a2008-01-14 17:43:33 -0600145
146/* Input, PCI, Flexbus, and VCO */
147#define CONFIG_EXTRA_CLOCK
148
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +0200149#define CONFIG_SYS_INPUT_CLKSRC 16000000
TsiChungLiew99b037a2008-01-14 17:43:33 -0600150
TsiChung Liew39966e32008-10-21 15:37:02 +0000151#define CONFIG_PRAM 2048 /* 2048 KB */
TsiChungLiew99b037a2008-01-14 17:43:33 -0600152
TsiChung Liew39966e32008-10-21 15:37:02 +0000153#define CONFIG_SYS_PROMPT "-> "
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +0200154#define CONFIG_SYS_LONGHELP /* undef to save memory */
TsiChungLiew99b037a2008-01-14 17:43:33 -0600155
156#if defined(CONFIG_CMD_KGDB)
TsiChung Liew39966e32008-10-21 15:37:02 +0000157#define CONFIG_SYS_CBSIZE 1024 /* Console I/O Buffer Size */
TsiChungLiew99b037a2008-01-14 17:43:33 -0600158#else
TsiChung Liew39966e32008-10-21 15:37:02 +0000159#define CONFIG_SYS_CBSIZE 256 /* Console I/O Buffer Size */
TsiChungLiew99b037a2008-01-14 17:43:33 -0600160#endif
TsiChung Liew39966e32008-10-21 15:37:02 +0000161#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE+sizeof(CONFIG_SYS_PROMPT)+16) /* Print Buffer Size */
162#define CONFIG_SYS_MAXARGS 16 /* max number of command args */
163#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE /* Boot Argument Buffer Size */
TsiChungLiew99b037a2008-01-14 17:43:33 -0600164
TsiChung Liew39966e32008-10-21 15:37:02 +0000165#define CONFIG_SYS_LOAD_ADDR (CONFIG_SYS_SDRAM_BASE + 0x10000)
TsiChungLiew99b037a2008-01-14 17:43:33 -0600166
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +0200167#define CONFIG_SYS_MBAR 0xFC000000
TsiChungLiew99b037a2008-01-14 17:43:33 -0600168
169/*
170 * Low Level Configuration Settings
171 * (address mappings, register initial values, etc.)
172 * You should know what you are doing if you make changes here.
173 */
174
TsiChung Liew39966e32008-10-21 15:37:02 +0000175/*
TsiChungLiew99b037a2008-01-14 17:43:33 -0600176 * Definitions for initial stack pointer and data area (in DPRAM)
177 */
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +0200178#define CONFIG_SYS_INIT_RAM_ADDR 0x80000000
Wolfgang Denk1c2e98e2010-10-26 13:32:32 +0200179#define CONFIG_SYS_INIT_RAM_SIZE 0x8000 /* Size of used area in internal SRAM */
TsiChung Liew39966e32008-10-21 15:37:02 +0000180#define CONFIG_SYS_INIT_RAM_CTRL 0x221
Wolfgang Denk0191e472010-10-26 14:34:52 +0200181#define CONFIG_SYS_GBL_DATA_OFFSET ((CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE) - 32)
TsiChung Liew39966e32008-10-21 15:37:02 +0000182#define CONFIG_SYS_INIT_SP_OFFSET (CONFIG_SYS_GBL_DATA_OFFSET - 32)
Wolfgang Denk1c2e98e2010-10-26 13:32:32 +0200183#define CONFIG_SYS_SBFHDR_DATA_OFFSET (CONFIG_SYS_INIT_RAM_SIZE - 32)
TsiChungLiew99b037a2008-01-14 17:43:33 -0600184
TsiChung Liew39966e32008-10-21 15:37:02 +0000185/*
TsiChungLiew99b037a2008-01-14 17:43:33 -0600186 * Start addresses for the final memory configuration
187 * (Set up by the startup code)
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +0200188 * Please note that CONFIG_SYS_SDRAM_BASE _must_ start at 0
TsiChungLiew99b037a2008-01-14 17:43:33 -0600189 */
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +0200190#define CONFIG_SYS_SDRAM_BASE 0x40000000
191#define CONFIG_SYS_SDRAM_SIZE 64 /* SDRAM size in MB */
192#define CONFIG_SYS_SDRAM_CFG1 0x43711630
193#define CONFIG_SYS_SDRAM_CFG2 0x56670000
194#define CONFIG_SYS_SDRAM_CTRL 0xE1092000
195#define CONFIG_SYS_SDRAM_EMOD 0x81810000
196#define CONFIG_SYS_SDRAM_MODE 0x00CD0000
TsiChung Liew39966e32008-10-21 15:37:02 +0000197#define CONFIG_SYS_SDRAM_DRV_STRENGTH 0x00
TsiChungLiew99b037a2008-01-14 17:43:33 -0600198
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +0200199#define CONFIG_SYS_MEMTEST_START CONFIG_SYS_SDRAM_BASE + 0x400
200#define CONFIG_SYS_MEMTEST_END ((CONFIG_SYS_SDRAM_SIZE - 3) << 20)
TsiChungLiew99b037a2008-01-14 17:43:33 -0600201
TsiChung Liew39966e32008-10-21 15:37:02 +0000202#ifdef CONFIG_CF_SBF
Wolfgang Denk0708bc62010-10-07 21:51:12 +0200203# define CONFIG_SYS_MONITOR_BASE (CONFIG_SYS_TEXT_BASE + 0x400)
TsiChung Liew39966e32008-10-21 15:37:02 +0000204#else
205# define CONFIG_SYS_MONITOR_BASE (CONFIG_SYS_FLASH_BASE + 0x400)
206#endif
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +0200207#define CONFIG_SYS_BOOTPARAMS_LEN 64*1024
208#define CONFIG_SYS_MONITOR_LEN (256 << 10) /* Reserve 256 kB for Monitor */
209#define CONFIG_SYS_MALLOC_LEN (128 << 10) /* Reserve 128 kB for malloc() */
TsiChungLiew99b037a2008-01-14 17:43:33 -0600210
211/* Initial Memory map for Linux */
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +0200212#define CONFIG_SYS_BOOTMAPSZ (CONFIG_SYS_SDRAM_BASE + (CONFIG_SYS_SDRAM_SIZE << 20))
TsiChung Liew25a00632009-01-27 12:57:47 +0000213#define CONFIG_SYS_BOOTM_LEN (CONFIG_SYS_SDRAM_SIZE << 20)
TsiChungLiew99b037a2008-01-14 17:43:33 -0600214
TsiChung Liew39966e32008-10-21 15:37:02 +0000215/*
216 * Configuration for environment
Jason Jin319ac6d2011-10-27 15:44:52 +0800217 * Environment is not embedded in u-boot. First time runing may have env
218 * crc error warning if there is no correct environment on the flash.
TsiChungLiew99b037a2008-01-14 17:43:33 -0600219 */
TsiChung Liew39966e32008-10-21 15:37:02 +0000220#ifdef CONFIG_CF_SBF
221# define CONFIG_ENV_IS_IN_SPI_FLASH
222# define CONFIG_ENV_SPI_CS 2
223#else
224# define CONFIG_ENV_IS_IN_FLASH 1
225#endif
226#define CONFIG_ENV_OVERWRITE 1
TsiChungLiew99b037a2008-01-14 17:43:33 -0600227
228/*-----------------------------------------------------------------------
229 * FLASH organization
230 */
TsiChung Liew39966e32008-10-21 15:37:02 +0000231#ifdef CONFIG_SYS_STMICRO_BOOT
TsiChung Liewa424ba22009-06-30 14:18:29 +0000232# define CONFIG_SYS_FLASH_BASE CONFIG_SYS_CS0_BASE
Jason Jin319ac6d2011-10-27 15:44:52 +0800233# define CONFIG_SYS_FLASH0_BASE CONFIG_SYS_CS0_BASE
TsiChung Liew39966e32008-10-21 15:37:02 +0000234# define CONFIG_ENV_OFFSET 0x30000
235# define CONFIG_ENV_SIZE 0x1000
236# define CONFIG_ENV_SECT_SIZE 0x10000
237#endif
238#ifdef CONFIG_SYS_SPANSION_BOOT
239# define CONFIG_SYS_FLASH_BASE CONFIG_SYS_CS0_BASE
240# define CONFIG_SYS_FLASH0_BASE CONFIG_SYS_CS0_BASE
Jason Jin319ac6d2011-10-27 15:44:52 +0800241# define CONFIG_ENV_ADDR (CONFIG_SYS_FLASH_BASE + 0x40000)
TsiChung Liew39966e32008-10-21 15:37:02 +0000242# define CONFIG_ENV_SIZE 0x1000
243# define CONFIG_ENV_SECT_SIZE 0x8000
244#endif
TsiChungLiew99b037a2008-01-14 17:43:33 -0600245
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +0200246#define CONFIG_SYS_FLASH_CFI
247#ifdef CONFIG_SYS_FLASH_CFI
Jean-Christophe PLAGNIOL-VILLARD8d94c232008-08-13 01:40:42 +0200248# define CONFIG_FLASH_CFI_DRIVER 1
TsiChung Liewb7d482b2009-06-11 12:50:05 +0000249# define CONFIG_SYS_FLASH_USE_BUFFER_WRITE 1
250# define CONFIG_FLASH_SPANSION_S29WS_N 1
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +0200251# define CONFIG_SYS_FLASH_SIZE 0x1000000 /* Max size that the board might have */
252# define CONFIG_SYS_FLASH_CFI_WIDTH FLASH_CFI_16BIT
253# define CONFIG_SYS_MAX_FLASH_BANKS 1 /* max number of memory banks */
254# define CONFIG_SYS_MAX_FLASH_SECT 137 /* max number of sectors on one chip */
255# define CONFIG_SYS_FLASH_PROTECTION /* "Real" (hardware) sectors protection */
256# define CONFIG_SYS_FLASH_CHECKSUM
TsiChung Liew39966e32008-10-21 15:37:02 +0000257# define CONFIG_SYS_FLASH_BANKS_LIST { CONFIG_SYS_CS0_BASE }
TsiChungLiew99b037a2008-01-14 17:43:33 -0600258#endif
259
angelo@sysam.it6312a952015-03-29 22:54:16 +0200260#define LDS_BOARD_TEXT \
261 arch/m68k/cpu/mcf5227x/built-in.o (.text*) \
262 arch/m68k/lib/built-in.o (.text*)
263
TsiChungLiew99b037a2008-01-14 17:43:33 -0600264/*
265 * This is setting for JFFS2 support in u-boot.
266 * NOTE: Enable CONFIG_CMD_JFFS2 for JFFS2 support.
267 */
268#ifdef CONFIG_CMD_JFFS2
269# define CONFIG_JFFS2_DEV "nor0"
270# define CONFIG_JFFS2_PART_SIZE (0x01000000 - 0x40000)
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +0200271# define CONFIG_JFFS2_PART_OFFSET (CONFIG_SYS_FLASH0_BASE + 0x40000)
TsiChungLiew99b037a2008-01-14 17:43:33 -0600272#endif
273
274/*-----------------------------------------------------------------------
275 * Cache Configuration
276 */
TsiChung Liew39966e32008-10-21 15:37:02 +0000277#define CONFIG_SYS_CACHELINE_SIZE 16
TsiChungLiew99b037a2008-01-14 17:43:33 -0600278
TsiChung Liew0ee47d42010-03-11 22:12:53 -0600279#define ICACHE_STATUS (CONFIG_SYS_INIT_RAM_ADDR + \
Wolfgang Denk1c2e98e2010-10-26 13:32:32 +0200280 CONFIG_SYS_INIT_RAM_SIZE - 8)
TsiChung Liew0ee47d42010-03-11 22:12:53 -0600281#define DCACHE_STATUS (CONFIG_SYS_INIT_RAM_ADDR + \
Wolfgang Denk1c2e98e2010-10-26 13:32:32 +0200282 CONFIG_SYS_INIT_RAM_SIZE - 4)
TsiChung Liew0ee47d42010-03-11 22:12:53 -0600283#define CONFIG_SYS_ICACHE_INV (CF_CACR_CINV | CF_CACR_INVI)
284#define CONFIG_SYS_CACHE_ACR0 (CONFIG_SYS_SDRAM_BASE | \
285 CF_ADDRMASK(CONFIG_SYS_SDRAM_SIZE) | \
286 CF_ACR_EN | CF_ACR_SM_ALL)
287#define CONFIG_SYS_CACHE_ICACR (CF_CACR_CENB | CF_CACR_CINV | \
288 CF_CACR_DISD | CF_CACR_INVI | \
289 CF_CACR_CEIB | CF_CACR_DCM | \
290 CF_CACR_EUSP)
291
TsiChungLiew99b037a2008-01-14 17:43:33 -0600292/*-----------------------------------------------------------------------
293 * Memory bank definitions
294 */
295/*
296 * CS0 - NOR Flash
297 * CS1 - Available
298 * CS2 - Available
299 * CS3 - Available
300 * CS4 - Available
301 * CS5 - Available
302 */
303
TsiChung Liew39966e32008-10-21 15:37:02 +0000304#ifdef CONFIG_CF_SBF
305#define CONFIG_SYS_CS0_BASE 0x04000000
306#define CONFIG_SYS_CS0_MASK 0x00FF0001
307#define CONFIG_SYS_CS0_CTRL 0x00001FA0
308#else
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +0200309#define CONFIG_SYS_CS0_BASE 0x00000000
310#define CONFIG_SYS_CS0_MASK 0x00FF0001
311#define CONFIG_SYS_CS0_CTRL 0x00001FA0
TsiChung Liew39966e32008-10-21 15:37:02 +0000312#endif
TsiChungLiew99b037a2008-01-14 17:43:33 -0600313
314#endif /* _M52277EVB_H */