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git01.mediatek.com / filogic / uboot / 65c723fa5f14709b7dd04af2c791c4202de80215 / . / configs / sama5d36ek_cmp_spiflash_defconfig
blob: 2e39207c4f39f3d4a8bd08de1fdc085fce1fb0a6 [file] [log] [blame]
Wenyou Yang1646bb42017-03-24 09:26:16 +0800[diff] [blame]1CONFIG_ARM=y
Tom Rinie1e85442021-08-27 21:18:30 -0400[diff] [blame]2CONFIG_SKIP_LOWLEVEL_INIT=y
Adam Fordd36b1022019-08-14 08:29:25 -0500[diff] [blame]3CONFIG_ARCH_CPU_INIT=y
Wenyou Yang1646bb42017-03-24 09:26:16 +0800[diff] [blame]4CONFIG_ARCH_AT91=y
Tom Rini07edfae2018-02-03 12:10:38 -0500[diff] [blame]5CONFIG_SYS_TEXT_BASE=0x26f00000
Tom Rinie25a03a2021-11-01 12:19:22 +0000[diff] [blame]6CONFIG_TARGET_SAMA5D3XEK=y
Tom Rini2e262c42020-08-10 15:31:07 -0400[diff] [blame]7CONFIG_NR_DRAM_BANKS=1
Markus Klotzbuecher7bd60e62019-05-15 15:15:54 +0200[diff] [blame]8CONFIG_ENV_SIZE=0x2000
9CONFIG_ENV_OFFSET=0x6000
Tom Rini47dece32020-04-28 16:15:47 -0400[diff] [blame]10CONFIG_ENV_SECT_SIZE=0x1000
Tom Rinif6e6e1a2020-01-22 13:38:00 -0500[diff] [blame]11CONFIG_DM_GPIO=y
Tom Rinia20e51f2021-06-28 10:17:29 -0400[diff] [blame]12CONFIG_DEFAULT_DEVICE_TREE="sama5d36ek_cmp"
Tom Rinie0056d72018-06-04 11:57:37 -0400[diff] [blame]13CONFIG_DEBUG_UART_BOARD_INIT=y
14CONFIG_DEBUG_UART_BASE=0xffffee00
15CONFIG_DEBUG_UART_CLOCK=132000000
Tom Rini4b2fcb32022-04-08 13:36:51 -0400[diff] [blame]16CONFIG_SYS_LOAD_ADDR=0x22000000
Tom Rini256aa742017-06-19 09:47:40 -0400[diff] [blame]17CONFIG_DEBUG_UART=y
Adam Ford58dbf862018-02-06 07:58:59 -0600[diff] [blame]18CONFIG_ENV_VARS_UBOOT_CONFIG=y
Wenyou Yang1646bb42017-03-24 09:26:16 +0800[diff] [blame]19CONFIG_FIT=y
Wenyou Yange035ea72017-09-14 11:07:44 +0800[diff] [blame]20CONFIG_SPI_BOOT=y
Wenyou Yang1646bb42017-03-24 09:26:16 +0800[diff] [blame]21CONFIG_BOOTDELAY=3
Sam Protsenkobd7bffe2017-08-14 20:22:17 +0300[diff] [blame]22CONFIG_USE_BOOTARGS=y
Eugen Hristev68b37ab2018-04-24 12:00:16 +0300[diff] [blame]23CONFIG_BOOTARGS="console=ttyS0,115200 earlyprintk mtdparts=atmel_nand:256k(bootstrap)ro,768k(uboot)ro,256K(env_redundant),256k(env),512k(dtb),6M(kernel)ro,-(rootfs) rootfstype=ubifs ubi.mtd=6 root=ubi0:rootfs"
Tom Rini5ddf1722021-11-10 09:11:40 -0500[diff] [blame]24CONFIG_USE_BOOTCOMMAND=y
25CONFIG_BOOTCOMMAND="sf probe 0; sf read 0x21000000 0x60000 0xc000; sf read 0x22000000 0x6c000 0x394000; bootz 0x22000000 - 0x21000000"
Wenyou Yang1646bb42017-03-24 09:26:16 +0800[diff] [blame]26# CONFIG_CONSOLE_MUX is not set
27CONFIG_SYS_CONSOLE_IS_IN_ENV=y
28# CONFIG_DISPLAY_BOARDINFO is not set
29CONFIG_HUSH_PARSER=y
30CONFIG_CMD_BOOTZ=y
31# CONFIG_CMD_IMI is not set
Wenyou Yang1646bb42017-03-24 09:26:16 +0800[diff] [blame]32# CONFIG_CMD_LOADS is not set
33CONFIG_CMD_MMC=y
Tom Rini00448d22017-07-28 21:31:42 -0400[diff] [blame]34CONFIG_CMD_NAND=y
35CONFIG_CMD_NAND_TRIMFFS=y
Wenyou Yang1646bb42017-03-24 09:26:16 +0800[diff] [blame]36CONFIG_CMD_DHCP=y
Tom Rini1c47c4a2022-02-25 11:19:50 -0500[diff] [blame]37CONFIG_BOOTP_BOOTFILESIZE=y
Wenyou Yang1646bb42017-03-24 09:26:16 +0800[diff] [blame]38CONFIG_CMD_MII=y
39CONFIG_CMD_PING=y
40CONFIG_CMD_FAT=y
41CONFIG_OF_CONTROL=y
Tom Rini5b0b0402017-08-28 07:16:32 -0400[diff] [blame]42CONFIG_ENV_IS_IN_SPI_FLASH=y
Tom Rinica63e712019-11-12 22:46:36 -0500[diff] [blame]43CONFIG_SYS_RELOC_GD_ENV_ADDR=y
Alex Kiernana410d6e2018-04-01 16:37:53 +0000[diff] [blame]44CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG=y
Wenyou Yang1646bb42017-03-24 09:26:16 +0800[diff] [blame]45CONFIG_DM=y
46CONFIG_CLK=y
47CONFIG_CLK_AT91=y
Wenyou Yang1646bb42017-03-24 09:26:16 +0800[diff] [blame]48CONFIG_AT91_H32MX=y
Wenyou Yang1646bb42017-03-24 09:26:16 +0800[diff] [blame]49CONFIG_AT91_GPIO=y
Wenyou Yang1646bb42017-03-24 09:26:16 +0800[diff] [blame]50CONFIG_GENERIC_ATMEL_MCI=y
Miquel Raynal2e35dbb2019-10-03 19:50:05 +0200[diff] [blame]51CONFIG_MTD=y
Miquel Raynald0935362019-10-03 19:50:03 +0200[diff] [blame]52CONFIG_MTD_RAW_NAND=y
Adam Ford9c519182018-07-08 08:11:07 -0500[diff] [blame]53CONFIG_NAND_ATMEL=y
Tudor Ambarus2c4f6ce2021-01-08 14:40:17 +0200[diff] [blame]54CONFIG_ATMEL_NAND_HW_PMECC=y
Tudor Ambarus6acbaed2021-01-08 14:40:18 +0200[diff] [blame]55CONFIG_PMECC_CAP=4
Tom Rinifdae0072021-09-22 14:50:34 -0400[diff] [blame]56CONFIG_SYS_NAND_ONFI_DETECTION=y
Wenyou Yang1646bb42017-03-24 09:26:16 +0800[diff] [blame]57CONFIG_DM_SPI_FLASH=y
Patrick Delaunay0df81042019-02-27 15:20:36 +0100[diff] [blame]58CONFIG_SF_DEFAULT_SPEED=30000000
Wenyou Yang1646bb42017-03-24 09:26:16 +0800[diff] [blame]59CONFIG_SPI_FLASH_ATMEL=y
60CONFIG_DM_ETH=y
61CONFIG_MACB=y
62CONFIG_PINCTRL=y
63CONFIG_PINCTRL_AT91=y
64CONFIG_DM_SERIAL=y
Wenyou Yang1646bb42017-03-24 09:26:16 +0800[diff] [blame]65CONFIG_DEBUG_UART_ANNOUNCE=y
66CONFIG_ATMEL_USART=y
Adam Ford4e96ff82018-04-15 13:51:26 -0400[diff] [blame]67CONFIG_SPI=y
Wenyou Yang1646bb42017-03-24 09:26:16 +0800[diff] [blame]68CONFIG_DM_SPI=y
Wenyou.Yang@microchip.com272167d2017-08-15 17:40:27 +0800[diff] [blame]69CONFIG_TIMER=y
70CONFIG_ATMEL_PIT_TIMER=y
Wenyou Yang3c3be532017-09-18 15:25:58 +0800[diff] [blame]71CONFIG_DM_VIDEO=y
Anatolij Gustschindba36702020-02-04 22:43:06 +0100[diff] [blame]72# CONFIG_VIDEO_BPP8 is not set
73# CONFIG_VIDEO_BPP32 is not set
Wenyou Yang3c3be532017-09-18 15:25:58 +0800[diff] [blame]74CONFIG_ATMEL_HLCD=y