Haavard Skinnemoen | 2f5bfb7 | 2008-05-16 11:10:33 +0200 | [diff] [blame] | 1 | /* |
| 2 | * SPI flash internal definitions |
| 3 | * |
| 4 | * Copyright (C) 2008 Atmel Corporation |
Jagannadha Sutradharudu Teki | 25dc86a | 2013-10-02 19:38:49 +0530 | [diff] [blame] | 5 | * Copyright (C) 2013 Jagannadha Sutradharudu Teki, Xilinx Inc. |
| 6 | * |
Jagannadha Sutradharudu Teki | d145270 | 2013-10-10 22:32:55 +0530 | [diff] [blame] | 7 | * SPDX-License-Identifier: GPL-2.0+ |
Haavard Skinnemoen | 2f5bfb7 | 2008-05-16 11:10:33 +0200 | [diff] [blame] | 8 | */ |
| 9 | |
Jagannadha Sutradharudu Teki | 84fb863 | 2013-10-10 22:14:09 +0530 | [diff] [blame] | 10 | #ifndef _SF_INTERNAL_H_ |
| 11 | #define _SF_INTERNAL_H_ |
Haavard Skinnemoen | 2f5bfb7 | 2008-05-16 11:10:33 +0200 | [diff] [blame] | 12 | |
Simon Glass | d34b456 | 2014-10-13 23:42:04 -0600 | [diff] [blame] | 13 | #include <linux/types.h> |
| 14 | #include <linux/compiler.h> |
| 15 | |
| 16 | /* Dual SPI flash memories - see SPI_COMM_DUAL_... */ |
| 17 | enum spi_dual_flash { |
| 18 | SF_SINGLE_FLASH = 0, |
| 19 | SF_DUAL_STACKED_FLASH = 1 << 0, |
| 20 | SF_DUAL_PARALLEL_FLASH = 1 << 1, |
| 21 | }; |
| 22 | |
| 23 | /* Enum list - Full read commands */ |
| 24 | enum spi_read_cmds { |
| 25 | ARRAY_SLOW = 1 << 0, |
Jagannadha Sutradharudu Teki | 29e6391 | 2014-12-12 19:36:11 +0530 | [diff] [blame] | 26 | ARRAY_FAST = 1 << 1, |
| 27 | DUAL_OUTPUT_FAST = 1 << 2, |
| 28 | DUAL_IO_FAST = 1 << 3, |
| 29 | QUAD_OUTPUT_FAST = 1 << 4, |
| 30 | QUAD_IO_FAST = 1 << 5, |
Simon Glass | d34b456 | 2014-10-13 23:42:04 -0600 | [diff] [blame] | 31 | }; |
| 32 | |
Jagannadha Sutradharudu Teki | 29e6391 | 2014-12-12 19:36:11 +0530 | [diff] [blame] | 33 | /* Normal - Extended - Full command set */ |
| 34 | #define RD_NORM (ARRAY_SLOW | ARRAY_FAST) |
| 35 | #define RD_EXTN (RD_NORM | DUAL_OUTPUT_FAST | DUAL_IO_FAST) |
Simon Glass | d34b456 | 2014-10-13 23:42:04 -0600 | [diff] [blame] | 36 | #define RD_FULL (RD_EXTN | QUAD_OUTPUT_FAST | QUAD_IO_FAST) |
| 37 | |
| 38 | /* sf param flags */ |
| 39 | enum { |
| 40 | SECT_4K = 1 << 0, |
| 41 | SECT_32K = 1 << 1, |
| 42 | E_FSR = 1 << 2, |
Jagannadha Sutradharudu Teki | 7f0fd70 | 2014-12-12 19:36:14 +0530 | [diff] [blame] | 43 | SST_BP = 1 << 3, |
Simon Glass | 52c62bb | 2014-12-12 19:36:12 +0530 | [diff] [blame] | 44 | SST_WP = 1 << 4, |
Jagannadha Sutradharudu Teki | 7f0fd70 | 2014-12-12 19:36:14 +0530 | [diff] [blame] | 45 | WR_QPP = 1 << 5, |
Simon Glass | d34b456 | 2014-10-13 23:42:04 -0600 | [diff] [blame] | 46 | }; |
| 47 | |
Jagannadha Sutradharudu Teki | 7f0fd70 | 2014-12-12 19:36:14 +0530 | [diff] [blame] | 48 | #define SST_WR (SST_BP | SST_WP) |
| 49 | |
Jagannadha Sutradharudu Teki | ca79986 | 2014-01-11 16:50:45 +0530 | [diff] [blame] | 50 | #define SPI_FLASH_3B_ADDR_LEN 3 |
| 51 | #define SPI_FLASH_CMD_LEN (1 + SPI_FLASH_3B_ADDR_LEN) |
Jagannadha Sutradharudu Teki | 25dc86a | 2013-10-02 19:38:49 +0530 | [diff] [blame] | 52 | #define SPI_FLASH_16MB_BOUN 0x1000000 |
Haavard Skinnemoen | 2f5bfb7 | 2008-05-16 11:10:33 +0200 | [diff] [blame] | 53 | |
Jagannadha Sutradharudu Teki | 725c64e | 2013-12-26 13:54:57 +0530 | [diff] [blame] | 54 | /* CFI Manufacture ID's */ |
| 55 | #define SPI_FLASH_CFI_MFR_SPANSION 0x01 |
| 56 | #define SPI_FLASH_CFI_MFR_STMICRO 0x20 |
Jagannadha Sutradharudu Teki | 754c73c | 2013-12-26 14:13:36 +0530 | [diff] [blame] | 57 | #define SPI_FLASH_CFI_MFR_MACRONIX 0xc2 |
Jagannadha Sutradharudu Teki | 725c64e | 2013-12-26 13:54:57 +0530 | [diff] [blame] | 58 | #define SPI_FLASH_CFI_MFR_WINBOND 0xef |
| 59 | |
Jagannadha Sutradharudu Teki | 25dc86a | 2013-10-02 19:38:49 +0530 | [diff] [blame] | 60 | /* Erase commands */ |
| 61 | #define CMD_ERASE_4K 0x20 |
| 62 | #define CMD_ERASE_32K 0x52 |
| 63 | #define CMD_ERASE_CHIP 0xc7 |
| 64 | #define CMD_ERASE_64K 0xd8 |
| 65 | |
| 66 | /* Write commands */ |
Mike Frysinger | 1302bec | 2012-01-28 16:26:03 -0800 | [diff] [blame] | 67 | #define CMD_WRITE_STATUS 0x01 |
Mike Frysinger | 301e9b4 | 2011-04-25 06:58:29 +0000 | [diff] [blame] | 68 | #define CMD_PAGE_PROGRAM 0x02 |
Mike Frysinger | 7911211 | 2011-04-25 06:59:53 +0000 | [diff] [blame] | 69 | #define CMD_WRITE_DISABLE 0x04 |
Simon Glass | d34b456 | 2014-10-13 23:42:04 -0600 | [diff] [blame] | 70 | #define CMD_READ_STATUS 0x05 |
Jagannadha Sutradharudu Teki | e0ebabc | 2014-01-11 15:13:11 +0530 | [diff] [blame] | 71 | #define CMD_QUAD_PAGE_PROGRAM 0x32 |
Mike Frysinger | b375ad9 | 2013-12-03 16:43:27 -0700 | [diff] [blame] | 72 | #define CMD_READ_STATUS1 0x35 |
Mike Frysinger | 53421bb | 2011-01-10 02:20:13 -0500 | [diff] [blame] | 73 | #define CMD_WRITE_ENABLE 0x06 |
Simon Glass | d34b456 | 2014-10-13 23:42:04 -0600 | [diff] [blame] | 74 | #define CMD_READ_CONFIG 0x35 |
| 75 | #define CMD_FLAG_STATUS 0x70 |
Mike Frysinger | 37e13bc | 2011-01-10 02:20:12 -0500 | [diff] [blame] | 76 | |
Jagannadha Sutradharudu Teki | 25dc86a | 2013-10-02 19:38:49 +0530 | [diff] [blame] | 77 | /* Read commands */ |
| 78 | #define CMD_READ_ARRAY_SLOW 0x03 |
| 79 | #define CMD_READ_ARRAY_FAST 0x0b |
Jagannadha Sutradharudu Teki | 02eee9a | 2014-01-11 15:10:28 +0530 | [diff] [blame] | 80 | #define CMD_READ_DUAL_OUTPUT_FAST 0x3b |
| 81 | #define CMD_READ_DUAL_IO_FAST 0xbb |
Jagannadha Sutradharudu Teki | e0ebabc | 2014-01-11 15:13:11 +0530 | [diff] [blame] | 82 | #define CMD_READ_QUAD_OUTPUT_FAST 0x6b |
Jagannadha Sutradharudu Teki | 4546230 | 2013-12-24 15:24:31 +0530 | [diff] [blame] | 83 | #define CMD_READ_QUAD_IO_FAST 0xeb |
Jagannadha Sutradharudu Teki | 25dc86a | 2013-10-02 19:38:49 +0530 | [diff] [blame] | 84 | #define CMD_READ_ID 0x9f |
Jagannadha Sutradharudu Teki | 29d70c9 | 2013-06-19 15:37:09 +0530 | [diff] [blame] | 85 | |
Jagannadha Sutradharudu Teki | ce08a71 | 2013-06-19 15:31:23 +0530 | [diff] [blame] | 86 | /* Bank addr access commands */ |
Jagannadha Sutradharudu Teki | 25dc86a | 2013-10-02 19:38:49 +0530 | [diff] [blame] | 87 | #ifdef CONFIG_SPI_FLASH_BAR |
Jagannadha Sutradharudu Teki | c6d173d | 2013-06-19 15:33:58 +0530 | [diff] [blame] | 88 | # define CMD_BANKADDR_BRWR 0x17 |
| 89 | # define CMD_BANKADDR_BRRD 0x16 |
| 90 | # define CMD_EXTNADDR_WREAR 0xC5 |
| 91 | # define CMD_EXTNADDR_RDEAR 0xC8 |
| 92 | #endif |
Jagannadha Sutradharudu Teki | ce08a71 | 2013-06-19 15:31:23 +0530 | [diff] [blame] | 93 | |
Mike Frysinger | 37e13bc | 2011-01-10 02:20:12 -0500 | [diff] [blame] | 94 | /* Common status */ |
Jagannadha Sutradharudu Teki | 243ced0 | 2014-01-12 21:38:21 +0530 | [diff] [blame] | 95 | #define STATUS_WIP (1 << 0) |
Jagannadha Sutradharudu Teki | 725c64e | 2013-12-26 13:54:57 +0530 | [diff] [blame] | 96 | #define STATUS_QEB_WINSPAN (1 << 1) |
Simon Glass | d34b456 | 2014-10-13 23:42:04 -0600 | [diff] [blame] | 97 | #define STATUS_QEB_MXIC (1 << 6) |
Jagannadha Sutradharudu Teki | 243ced0 | 2014-01-12 21:38:21 +0530 | [diff] [blame] | 98 | #define STATUS_PEC (1 << 7) |
Mike Frysinger | 37e13bc | 2011-01-10 02:20:12 -0500 | [diff] [blame] | 99 | |
Heiko Schocher | d73b7ec | 2014-07-18 06:07:21 +0200 | [diff] [blame] | 100 | #ifdef CONFIG_SYS_SPI_ST_ENABLE_WP_PIN |
| 101 | #define STATUS_SRWD (1 << 7) /* SR write protect */ |
| 102 | #endif |
| 103 | |
Jagannadha Sutradharudu Teki | 25dc86a | 2013-10-02 19:38:49 +0530 | [diff] [blame] | 104 | /* Flash timeout values */ |
| 105 | #define SPI_FLASH_PROG_TIMEOUT (2 * CONFIG_SYS_HZ) |
Simon Glass | d34b456 | 2014-10-13 23:42:04 -0600 | [diff] [blame] | 106 | #define SPI_FLASH_PAGE_ERASE_TIMEOUT (5 * CONFIG_SYS_HZ) |
Jagannadha Sutradharudu Teki | 25dc86a | 2013-10-02 19:38:49 +0530 | [diff] [blame] | 107 | #define SPI_FLASH_SECTOR_ERASE_TIMEOUT (10 * CONFIG_SYS_HZ) |
| 108 | |
| 109 | /* SST specific */ |
| 110 | #ifdef CONFIG_SPI_FLASH_SST |
Jagannadha Sutradharudu Teki | f3b2dd8 | 2013-10-07 19:34:56 +0530 | [diff] [blame] | 111 | # define CMD_SST_BP 0x02 /* Byte Program */ |
Simon Glass | d34b456 | 2014-10-13 23:42:04 -0600 | [diff] [blame] | 112 | # define CMD_SST_AAI_WP 0xAD /* Auto Address Incr Word Program */ |
Jagannadha Sutradharudu Teki | 25dc86a | 2013-10-02 19:38:49 +0530 | [diff] [blame] | 113 | |
| 114 | int sst_write_wp(struct spi_flash *flash, u32 offset, size_t len, |
| 115 | const void *buf); |
Bin Meng | fcbfc17 | 2014-12-12 19:36:13 +0530 | [diff] [blame] | 116 | int sst_write_bp(struct spi_flash *flash, u32 offset, size_t len, |
| 117 | const void *buf); |
Jagannadha Sutradharudu Teki | 25dc86a | 2013-10-02 19:38:49 +0530 | [diff] [blame] | 118 | #endif |
| 119 | |
Simon Glass | d34b456 | 2014-10-13 23:42:04 -0600 | [diff] [blame] | 120 | /** |
| 121 | * struct spi_flash_params - SPI/QSPI flash device params structure |
| 122 | * |
| 123 | * @name: Device name ([MANUFLETTER][DEVTYPE][DENSITY][EXTRAINFO]) |
| 124 | * @jedec: Device jedec ID (0x[1byte_manuf_id][2byte_dev_id]) |
| 125 | * @ext_jedec: Device ext_jedec ID |
| 126 | * @sector_size: Sector size of this device |
| 127 | * @nr_sectors: No.of sectors on this device |
| 128 | * @e_rd_cmd: Enum list for read commands |
| 129 | * @flags: Important param, for flash specific behaviour |
| 130 | */ |
| 131 | struct spi_flash_params { |
| 132 | const char *name; |
| 133 | u32 jedec; |
| 134 | u16 ext_jedec; |
| 135 | u32 sector_size; |
| 136 | u32 nr_sectors; |
| 137 | u8 e_rd_cmd; |
| 138 | u16 flags; |
| 139 | }; |
| 140 | |
| 141 | extern const struct spi_flash_params spi_flash_params_table[]; |
| 142 | |
Haavard Skinnemoen | 2f5bfb7 | 2008-05-16 11:10:33 +0200 | [diff] [blame] | 143 | /* Send a single-byte command to the device and read the response */ |
| 144 | int spi_flash_cmd(struct spi_slave *spi, u8 cmd, void *response, size_t len); |
| 145 | |
| 146 | /* |
| 147 | * Send a multi-byte command to the device and read the response. Used |
| 148 | * for flash array reads, etc. |
| 149 | */ |
| 150 | int spi_flash_cmd_read(struct spi_slave *spi, const u8 *cmd, |
| 151 | size_t cmd_len, void *data, size_t data_len); |
| 152 | |
| 153 | /* |
| 154 | * Send a multi-byte command to the device followed by (optional) |
| 155 | * data. Used for programming the flash array, etc. |
| 156 | */ |
| 157 | int spi_flash_cmd_write(struct spi_slave *spi, const u8 *cmd, size_t cmd_len, |
| 158 | const void *data, size_t data_len); |
| 159 | |
Mike Frysinger | 301e9b4 | 2011-04-25 06:58:29 +0000 | [diff] [blame] | 160 | |
Jagannadha Sutradharudu Teki | 25dc86a | 2013-10-02 19:38:49 +0530 | [diff] [blame] | 161 | /* Flash erase(sectors) operation, support all possible erase commands */ |
| 162 | int spi_flash_cmd_erase_ops(struct spi_flash *flash, u32 offset, size_t len); |
Jagannadha Sutradharudu Teki | 0803242 | 2013-10-02 19:34:53 +0530 | [diff] [blame] | 163 | |
Jagannadha Sutradharudu Teki | 564a126 | 2013-12-30 22:16:23 +0530 | [diff] [blame] | 164 | /* Read the status register */ |
| 165 | int spi_flash_cmd_read_status(struct spi_flash *flash, u8 *rs); |
| 166 | |
Jagannadha Sutradharudu Teki | 25dc86a | 2013-10-02 19:38:49 +0530 | [diff] [blame] | 167 | /* Program the status register */ |
Jagannadha Sutradharudu Teki | 243ced0 | 2014-01-12 21:38:21 +0530 | [diff] [blame] | 168 | int spi_flash_cmd_write_status(struct spi_flash *flash, u8 ws); |
Jagannadha Sutradharudu Teki | 25dc86a | 2013-10-02 19:38:49 +0530 | [diff] [blame] | 169 | |
Jagannadha Sutradharudu Teki | 564a126 | 2013-12-30 22:16:23 +0530 | [diff] [blame] | 170 | /* Read the config register */ |
| 171 | int spi_flash_cmd_read_config(struct spi_flash *flash, u8 *rc); |
Jagannadha Sutradharudu Teki | 754c73c | 2013-12-26 14:13:36 +0530 | [diff] [blame] | 172 | |
Jagannadha Sutradharudu Teki | 564a126 | 2013-12-30 22:16:23 +0530 | [diff] [blame] | 173 | /* Program the config register */ |
| 174 | int spi_flash_cmd_write_config(struct spi_flash *flash, u8 wc); |
Jagannadha Sutradharudu Teki | 25dc86a | 2013-10-02 19:38:49 +0530 | [diff] [blame] | 175 | |
| 176 | /* Enable writing on the SPI flash */ |
Mike Frysinger | 8ec7f4c | 2011-04-23 23:05:55 +0000 | [diff] [blame] | 177 | static inline int spi_flash_cmd_write_enable(struct spi_flash *flash) |
| 178 | { |
| 179 | return spi_flash_cmd(flash->spi, CMD_WRITE_ENABLE, NULL, 0); |
| 180 | } |
| 181 | |
Jagannadha Sutradharudu Teki | 25dc86a | 2013-10-02 19:38:49 +0530 | [diff] [blame] | 182 | /* Disable writing on the SPI flash */ |
Mike Frysinger | 7911211 | 2011-04-25 06:59:53 +0000 | [diff] [blame] | 183 | static inline int spi_flash_cmd_write_disable(struct spi_flash *flash) |
| 184 | { |
| 185 | return spi_flash_cmd(flash->spi, CMD_WRITE_DISABLE, NULL, 0); |
| 186 | } |
| 187 | |
| 188 | /* |
Jagannadha Sutradharudu Teki | 25dc86a | 2013-10-02 19:38:49 +0530 | [diff] [blame] | 189 | * Send the read status command to the device and wait for the wip |
| 190 | * (write-in-progress) bit to clear itself. |
Haavard Skinnemoen | 2f5bfb7 | 2008-05-16 11:10:33 +0200 | [diff] [blame] | 191 | */ |
Jagannadha Sutradharudu Teki | 25dc86a | 2013-10-02 19:38:49 +0530 | [diff] [blame] | 192 | int spi_flash_cmd_wait_ready(struct spi_flash *flash, unsigned long timeout); |
| 193 | |
Jagannadha Sutradharudu Teki | dc78b85 | 2013-06-21 19:19:00 +0530 | [diff] [blame] | 194 | /* |
| 195 | * Used for spi_flash write operation |
| 196 | * - SPI claim |
| 197 | * - spi_flash_cmd_write_enable |
| 198 | * - spi_flash_cmd_write |
| 199 | * - spi_flash_cmd_wait_ready |
| 200 | * - SPI release |
| 201 | */ |
| 202 | int spi_flash_write_common(struct spi_flash *flash, const u8 *cmd, |
| 203 | size_t cmd_len, const void *buf, size_t buf_len); |
Mike Frysinger | 37e13bc | 2011-01-10 02:20:12 -0500 | [diff] [blame] | 204 | |
| 205 | /* |
Jagannadha Sutradharudu Teki | 25dc86a | 2013-10-02 19:38:49 +0530 | [diff] [blame] | 206 | * Flash write operation, support all possible write commands. |
| 207 | * Write the requested data out breaking it up into multiple write |
| 208 | * commands as needed per the write size. |
Mike Frysinger | 37e13bc | 2011-01-10 02:20:12 -0500 | [diff] [blame] | 209 | */ |
Jagannadha Sutradharudu Teki | 25dc86a | 2013-10-02 19:38:49 +0530 | [diff] [blame] | 210 | int spi_flash_cmd_write_ops(struct spi_flash *flash, u32 offset, |
| 211 | size_t len, const void *buf); |
| 212 | |
| 213 | /* |
| 214 | * Same as spi_flash_cmd_read() except it also claims/releases the SPI |
| 215 | * bus. Used as common part of the ->read() operation. |
| 216 | */ |
| 217 | int spi_flash_read_common(struct spi_flash *flash, const u8 *cmd, |
| 218 | size_t cmd_len, void *data, size_t data_len); |
| 219 | |
| 220 | /* Flash read operation, support all possible read commands */ |
| 221 | int spi_flash_cmd_read_ops(struct spi_flash *flash, u32 offset, |
| 222 | size_t len, void *data); |
Mike Frysinger | 37e13bc | 2011-01-10 02:20:12 -0500 | [diff] [blame] | 223 | |
Jagannadha Sutradharudu Teki | 84fb863 | 2013-10-10 22:14:09 +0530 | [diff] [blame] | 224 | #endif /* _SF_INTERNAL_H_ */ |