blob: 085e65062011c8a0646698a4b76b42ec3cabb4e0 [file] [log] [blame]
Heiko Stuebnerfc367852019-07-16 22:18:21 +02001// SPDX-License-Identifier: GPL-2.0+
2/*
3 * (C) Copyright 2019 Rockchip Electronics Co., Ltd
4 */
5
6#include <common.h>
7#include <debug_uart.h>
8#include <dm.h>
Simon Glass97589732020-05-10 11:40:02 -06009#include <init.h>
Heiko Stuebnerfc367852019-07-16 22:18:21 +020010#include <ram.h>
11#include <spl.h>
12#include <version.h>
13#include <asm/io.h>
14#include <asm/arch-rockchip/bootrom.h>
15#include <asm/arch-rockchip/sdram_px30.h>
16
17#define TIMER_LOAD_COUNT0 0x00
18#define TIMER_LOAD_COUNT1 0x04
19#define TIMER_CUR_VALUE0 0x08
20#define TIMER_CUR_VALUE1 0x0c
21#define TIMER_CONTROL_REG 0x10
22
23#define TIMER_EN 0x1
24#define TIMER_FMODE (0 << 1)
25#define TIMER_RMODE (1 << 1)
26
27void secure_timer_init(void)
28{
29 writel(0, CONFIG_ROCKCHIP_STIMER_BASE + TIMER_CONTROL_REG);
30 writel(0xffffffff, CONFIG_ROCKCHIP_STIMER_BASE + TIMER_LOAD_COUNT0);
31 writel(0xffffffff, CONFIG_ROCKCHIP_STIMER_BASE + TIMER_LOAD_COUNT1);
32 writel(TIMER_EN | TIMER_FMODE,
33 CONFIG_ROCKCHIP_STIMER_BASE + TIMER_CONTROL_REG);
34}
35
36void board_init_f(ulong dummy)
37{
38 int ret;
39
40#ifdef CONFIG_DEBUG_UART
41 debug_uart_init();
42 /*
43 * Debug UART can be used from here if required:
44 *
45 * debug_uart_init();
46 * printch('a');
47 * printhex8(0x1234);
48 * printascii("string");
49 */
50 printascii("U-Boot TPL board init\n");
51#endif
52
53 secure_timer_init();
54 ret = sdram_init();
55 if (ret)
56 printascii("sdram_init failed\n");
57
58 /* return to maskrom */
59 back_to_bootrom(BROM_BOOT_NEXTSTAGE);
60}