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git01.mediatek.com / filogic / uboot / 7f0b9b75bb04a329dab90c73ce9b7b3904fdefb5 / . / arch / arm / dts / imx6q-dhcom-som.dtsi
blob: 524cd287c65e531599744dfaee9d0d02b3d0f312 [file] [log] [blame]
Marek Vasutb84af552019-05-17 16:58:47 +0200[diff] [blame]1// SPDX-License-Identifier: (GPL-2.0+)
2/*
3 * Copyright (C) 2015 DH electronics GmbH
4 * Copyright (C) 2018 Marek Vasut <marex@denx.de>
5 */
6
7#include "imx6q.dtsi"
8#include <dt-bindings/pwm/pwm.h>
9#include <dt-bindings/gpio/gpio.h>
10#include <dt-bindings/clock/imx6qdl-clock.h>
11#include <dt-bindings/input/input.h>
12
13/ {
14 aliases {
15 mmc0 = &usdhc2;
16 mmc1 = &usdhc3;
17 mmc2 = &usdhc4;
18 mmc3 = &usdhc1;
19 };
20
21 memory@10000000 {
22 device_type = "memory";
23 reg = <0x10000000 0x40000000>;
24 };
25
26 reg_usb_otg_vbus: regulator-usb-otg-vbus {
27 compatible = "regulator-fixed";
28 regulator-name = "usb_otg_vbus";
29 regulator-min-microvolt = <5000000>;
30 regulator-max-microvolt = <5000000>;
31 };
32
33 reg_usb_h1_vbus: regulator-usb-h1-vbus {
34 compatible = "regulator-fixed";
35 regulator-name = "usb_h1_vbus";
36 regulator-min-microvolt = <5000000>;
37 regulator-max-microvolt = <5000000>;
38 gpio = <&gpio3 31 GPIO_ACTIVE_HIGH>;
39 enable-active-high;
40 };
41
42 reg_3p3v: regulator-3P3V {
43 compatible = "regulator-fixed";
44 regulator-name = "3P3V";
45 regulator-min-microvolt = <3300000>;
46 regulator-max-microvolt = <3300000>;
47 regulator-always-on;
48 };
49};
50
51&can1 {
52 pinctrl-names = "default";
53 pinctrl-0 = <&pinctrl_flexcan1>;
54 status = "okay";
55};
56
57&can2 {
58 pinctrl-names = "default";
59 pinctrl-0 = <&pinctrl_flexcan2>;
60 status = "okay";
61};
62
63&ecspi1 {
Marek Vasut7f0b9b72019-05-17 16:58:48 +0200[diff] [blame^]64 cs-gpios = <&gpio2 30 GPIO_ACTIVE_LOW>, <&gpio4 11 GPIO_ACTIVE_LOW>;
Marek Vasutb84af552019-05-17 16:58:47 +0200[diff] [blame]65 pinctrl-names = "default";
66 pinctrl-0 = <&pinctrl_ecspi1>;
67 status = "okay";
68
69 flash@0 { /* S25FL116K */
70 #address-cells = <1>;
71 #size-cells = <1>;
72 compatible = "jedec,spi-nor";
73 spi-max-frequency = <50000000>;
74 reg = <0>;
75 m25p,fast-read;
76 };
77};
78
79&ecspi2 {
80 cs-gpios = <&gpio5 29 GPIO_ACTIVE_LOW>;
81 pinctrl-names = "default";
82 pinctrl-0 = <&pinctrl_ecspi2>;
83 status = "okay";
84};
85
86&fec {
87 pinctrl-names = "default";
88 pinctrl-0 = <&pinctrl_enet_100M>;
89 phy-mode = "rmii";
90 phy-handle = <&ethphy0>;
91 status = "okay";
92
93 mdio {
94 #address-cells = <1>;
95 #size-cells = <0>;
96
97 ethphy0: ethernet-phy@0 { /* SMSC LAN8710Ai */
98 reg = <0>;
99 max-speed = <100>;
100 reset-gpios = <&gpio5 0 GPIO_ACTIVE_LOW>;
101 reset-delay-us = <1000>;
102 reset-post-delay-us = <1000>;
103 };
104 };
105};
106
107&i2c1 {
108 clock-frequency = <100000>;
109 pinctrl-names = "default";
110 pinctrl-0 = <&pinctrl_i2c1>;
111 status = "okay";
112};
113
114&i2c2 {
115 clock-frequency = <100000>;
116 pinctrl-names = "default";
117 pinctrl-0 = <&pinctrl_i2c2>;
118 status = "okay";
119};
120
121&i2c3 {
122 clock-frequency = <100000>;
123 pinctrl-names = "default";
124 pinctrl-0 = <&pinctrl_i2c3>;
125 status = "okay";
126
127 ltc3676: pmic@3c {
128 compatible = "lltc,ltc3676";
129 pinctrl-names = "default";
130 pinctrl-0 = <&pinctrl_pmic_hw300>;
131 reg = <0x3c>;
132 interrupt-parent = <&gpio5>;
133 interrupts = <2 IRQ_TYPE_EDGE_FALLING>;
134
135 regulators {
136 sw1_reg: sw1 {
137 regulator-min-microvolt = <787500>;
138 regulator-max-microvolt = <1527272>;
139 lltc,fb-voltage-divider = <100000 110000>;
140 regulator-suspend-mem-microvolt = <1040000>;
141 regulator-ramp-delay = <7000>;
142 regulator-boot-on;
143 regulator-always-on;
144 };
145
146 sw2_reg: sw2 {
147 regulator-min-microvolt = <1885714>;
148 regulator-max-microvolt = <3657142>;
149 lltc,fb-voltage-divider = <100000 28000>;
150 regulator-ramp-delay = <7000>;
151 regulator-boot-on;
152 regulator-always-on;
153 };
154
155 sw3_reg: sw3 {
156 regulator-min-microvolt = <787500>;
157 regulator-max-microvolt = <1527272>;
158 lltc,fb-voltage-divider = <100000 110000>;
159 regulator-suspend-mem-microvolt = <980000>;
160 regulator-ramp-delay = <7000>;
161 regulator-boot-on;
162 regulator-always-on;
163 };
164
165 sw4_reg: sw4 {
166 regulator-min-microvolt = <855571>;
167 regulator-max-microvolt = <1659291>;
168 lltc,fb-voltage-divider = <100000 93100>;
169 regulator-ramp-delay = <7000>;
170 regulator-boot-on;
171 regulator-always-on;
172 };
173
174 ldo1_reg: ldo1 {
175 regulator-min-microvolt = <3240306>;
176 regulator-max-microvolt = <3240306>;
177 lltc,fb-voltage-divider = <102000 29400>;
178 regulator-boot-on;
179 regulator-always-on;
180 };
181
182 ldo2_reg: ldo2 {
183 regulator-min-microvolt = <2484708>;
184 regulator-max-microvolt = <2484708>;
185 lltc,fb-voltage-divider = <100000 41200>;
186 regulator-boot-on;
187 regulator-always-on;
188 };
189 };
190 };
191
192 touchscreen@49 { /* TSC2004 */
193 compatible = "ti,tsc2004";
194 reg = <0x49>;
195 vio-supply = <&reg_3p3v>;
196 pinctrl-names = "default";
197 pinctrl-0 = <&pinctrl_tsc2004_hw300>;
198 interrupts-extended = <&gpio4 14 IRQ_TYPE_EDGE_FALLING>;
199 status = "disabled";
200 };
201
202 eeprom@50 {
203 compatible = "atmel,24c02";
204 reg = <0x50>;
205 pagesize = <16>;
206 };
207
208 rtc@56 {
209 compatible = "rv3029c2";
210 pinctrl-names = "default";
211 pinctrl-0 = <&pinctrl_rtc_hw300>;
212 reg = <0x56>;
213 interrupt-parent = <&gpio7>;
214 interrupts = <12 2>;
215 };
216};
217
218&iomuxc {
219 pinctrl-names = "default";
220 pinctrl-0 = <&pinctrl_hog_base>;
221
222 pinctrl_hog_base: hog-base-grp {
223 fsl,pins = <
224 MX6QDL_PAD_EIM_A19__GPIO2_IO19 0x120b0
225 MX6QDL_PAD_EIM_A23__GPIO6_IO06 0x120b0
226 MX6QDL_PAD_EIM_A22__GPIO2_IO16 0x120b0
227 MX6QDL_PAD_EIM_A16__GPIO2_IO22 0x120b0
228 MX6QDL_PAD_EIM_A17__GPIO2_IO21 0x120b0
229 >;
230 };
231
232 pinctrl_ecspi1: ecspi1-grp {
233 fsl,pins = <
234 MX6QDL_PAD_EIM_D17__ECSPI1_MISO 0x100b1
235 MX6QDL_PAD_EIM_D18__ECSPI1_MOSI 0x100b1
236 MX6QDL_PAD_EIM_D16__ECSPI1_SCLK 0x100b1
237 MX6QDL_PAD_EIM_EB2__GPIO2_IO30 0x1b0b0
238 MX6QDL_PAD_KEY_ROW2__GPIO4_IO11 0x1b0b0
239 >;
240 };
241
242 pinctrl_ecspi2: ecspi2-grp {
243 fsl,pins = <
244 MX6QDL_PAD_CSI0_DAT10__ECSPI2_MISO 0x100b1
245 MX6QDL_PAD_CSI0_DAT9__ECSPI2_MOSI 0x100b1
246 MX6QDL_PAD_CSI0_DAT8__ECSPI2_SCLK 0x100b1
247 MX6QDL_PAD_CSI0_DAT11__GPIO5_IO29 0x1b0b0
248 >;
249 };
250
251 pinctrl_enet_100M: enet-100M-grp {
252 fsl,pins = <
253 MX6QDL_PAD_ENET_MDIO__ENET_MDIO 0x1b0b0
254 MX6QDL_PAD_ENET_MDC__ENET_MDC 0x1b0b0
255 MX6QDL_PAD_ENET_CRS_DV__ENET_RX_EN 0x1b0b0
256 MX6QDL_PAD_ENET_RX_ER__ENET_RX_ER 0x1b0b0
257 MX6QDL_PAD_ENET_RXD0__ENET_RX_DATA0 0x1b0b0
258 MX6QDL_PAD_ENET_RXD1__ENET_RX_DATA1 0x1b0b0
259 MX6QDL_PAD_ENET_TX_EN__ENET_TX_EN 0x1b0b0
260 MX6QDL_PAD_ENET_TXD0__ENET_TX_DATA0 0x1b0b0
261 MX6QDL_PAD_ENET_TXD1__ENET_TX_DATA1 0x1b0b0
262 MX6QDL_PAD_GPIO_16__ENET_REF_CLK 0x4001b0a8
263 MX6QDL_PAD_EIM_WAIT__GPIO5_IO00 0x000b0
264 MX6QDL_PAD_KEY_ROW4__GPIO4_IO15 0x000b1
265 MX6QDL_PAD_GPIO_7__GPIO1_IO07 0x120b0
266 >;
267 };
268
269 pinctrl_flexcan1: flexcan1-grp {
270 fsl,pins = <
271 MX6QDL_PAD_KEY_COL2__FLEXCAN1_TX 0x1b0b0
272 MX6QDL_PAD_GPIO_8__FLEXCAN1_RX 0x1b0b0
273 >;
274 };
275
276 pinctrl_flexcan2: flexcan2-grp {
277 fsl,pins = <
278 MX6QDL_PAD_SD3_DAT0__FLEXCAN2_TX 0x1b0b0
279 MX6QDL_PAD_SD3_DAT1__FLEXCAN2_RX 0x1b0b0
280 >;
281 };
282
283 pinctrl_i2c1: i2c1-grp {
284 fsl,pins = <
285 MX6QDL_PAD_EIM_D21__I2C1_SCL 0x4001b8b1
286 MX6QDL_PAD_EIM_D28__I2C1_SDA 0x4001b8b1
287 >;
288 };
289
290 pinctrl_i2c2: i2c2-grp {
291 fsl,pins = <
292 MX6QDL_PAD_KEY_COL3__I2C2_SCL 0x4001b8b1
293 MX6QDL_PAD_KEY_ROW3__I2C2_SDA 0x4001b8b1
294 >;
295 };
296
297 pinctrl_i2c3: i2c3-grp {
298 fsl,pins = <
299 MX6QDL_PAD_GPIO_3__I2C3_SCL 0x4001b8b1
300 MX6QDL_PAD_GPIO_6__I2C3_SDA 0x4001b8b1
301 >;
302 };
303
304 pinctrl_pmic_hw300: pmic-hw300-grp {
305 fsl,pins = <
306 MX6QDL_PAD_EIM_A25__GPIO5_IO02 0x1B0B0
307 >;
308 };
309
310 pinctrl_rtc_hw300: rtc-hw300-grp {
311 fsl,pins = <
312 MX6QDL_PAD_GPIO_17__GPIO7_IO12 0x120B0
313 >;
314 };
315
316 pinctrl_tsc2004_hw300: tsc2004-hw300-grp {
317 fsl,pins = <
318 MX6QDL_PAD_KEY_COL4__GPIO4_IO14 0x120B0
319 >;
320 };
321
322 pinctrl_uart1: uart1-grp {
323 fsl,pins = <
324 MX6QDL_PAD_SD3_DAT7__UART1_TX_DATA 0x1b0b1
325 MX6QDL_PAD_SD3_DAT6__UART1_RX_DATA 0x1b0b1
326 MX6QDL_PAD_EIM_D20__UART1_RTS_B 0x1b0b1
327 MX6QDL_PAD_EIM_D19__UART1_CTS_B 0x4001b0b1
328 MX6QDL_PAD_EIM_D23__GPIO3_IO23 0x4001b0b1
329 MX6QDL_PAD_EIM_D24__GPIO3_IO24 0x4001b0b1
330 MX6QDL_PAD_EIM_D25__GPIO3_IO25 0x4001b0b1
331 MX6QDL_PAD_EIM_EB3__GPIO2_IO31 0x4001b0b1
332 >;
333 };
334
335 pinctrl_uart4: uart4-grp {
336 fsl,pins = <
337 MX6QDL_PAD_CSI0_DAT12__UART4_TX_DATA 0x1b0b1
338 MX6QDL_PAD_CSI0_DAT13__UART4_RX_DATA 0x1b0b1
339 >;
340 };
341
342 pinctrl_uart5: uart5-grp {
343 fsl,pins = <
344 MX6QDL_PAD_CSI0_DAT14__UART5_TX_DATA 0x1b0b1
345 MX6QDL_PAD_CSI0_DAT15__UART5_RX_DATA 0x1b0b1
346 MX6QDL_PAD_CSI0_DAT18__UART5_RTS_B 0x1b0b1
347 MX6QDL_PAD_CSI0_DAT19__UART5_CTS_B 0x4001b0b1
348 >;
349 };
350
351 pinctrl_usbh1: usbh1-grp {
352 fsl,pins = <
353 MX6QDL_PAD_EIM_D31__GPIO3_IO31 0x120B0
354 >;
355 };
356
357 pinctrl_usbotg: usbotg-grp {
358 fsl,pins = <
359 MX6QDL_PAD_GPIO_1__USB_OTG_ID 0x17059
360 >;
361 };
362
363 pinctrl_usdhc2: usdhc2-grp {
364 fsl,pins = <
365 MX6QDL_PAD_SD2_CMD__SD2_CMD 0x17059
366 MX6QDL_PAD_SD2_CLK__SD2_CLK 0x10059
367 MX6QDL_PAD_SD2_DAT0__SD2_DATA0 0x17059
368 MX6QDL_PAD_SD2_DAT1__SD2_DATA1 0x17059
369 MX6QDL_PAD_SD2_DAT2__SD2_DATA2 0x17059
370 MX6QDL_PAD_SD2_DAT3__SD2_DATA3 0x17059
371 MX6QDL_PAD_NANDF_CS3__GPIO6_IO16 0x120B0
372 >;
373 };
374
375 pinctrl_usdhc3: usdhc3-grp {
376 fsl,pins = <
377 MX6QDL_PAD_SD3_CMD__SD3_CMD 0x17059
378 MX6QDL_PAD_SD3_CLK__SD3_CLK 0x10059
379 MX6QDL_PAD_SD3_DAT0__SD3_DATA0 0x17059
380 MX6QDL_PAD_SD3_DAT1__SD3_DATA1 0x17059
381 MX6QDL_PAD_SD3_DAT2__SD3_DATA2 0x17059
382 MX6QDL_PAD_SD3_DAT3__SD3_DATA3 0x17059
383 MX6QDL_PAD_SD3_RST__GPIO7_IO08 0x120B0
384 >;
385 };
386
387 pinctrl_usdhc4: usdhc4-grp {
388 fsl,pins = <
389 MX6QDL_PAD_SD4_CMD__SD4_CMD 0x17059
390 MX6QDL_PAD_SD4_CLK__SD4_CLK 0x10059
391 MX6QDL_PAD_SD4_DAT0__SD4_DATA0 0x17059
392 MX6QDL_PAD_SD4_DAT1__SD4_DATA1 0x17059
393 MX6QDL_PAD_SD4_DAT2__SD4_DATA2 0x17059
394 MX6QDL_PAD_SD4_DAT3__SD4_DATA3 0x17059
395 MX6QDL_PAD_SD4_DAT4__SD4_DATA4 0x17059
396 MX6QDL_PAD_SD4_DAT5__SD4_DATA5 0x17059
397 MX6QDL_PAD_SD4_DAT6__SD4_DATA6 0x17059
398 MX6QDL_PAD_SD4_DAT7__SD4_DATA7 0x17059
399 >;
400 };
401};
402
403&reg_arm {
404 vin-supply = <&sw3_reg>;
405};
406
407&reg_soc {
408 vin-supply = <&sw1_reg>;
409};
410
411&uart1 {
412 pinctrl-names = "default";
413 pinctrl-0 = <&pinctrl_uart1>;
414 uart-has-rtscts;
415 dtr-gpios = <&gpio3 24 GPIO_ACTIVE_LOW>;
416 dsr-gpios = <&gpio3 25 GPIO_ACTIVE_LOW>;
417 dcd-gpios = <&gpio3 23 GPIO_ACTIVE_LOW>;
418 rng-gpios = <&gpio2 31 GPIO_ACTIVE_LOW>;
419 status = "okay";
420};
421
422&uart4 {
423 pinctrl-names = "default";
424 pinctrl-0 = <&pinctrl_uart4>;
425 status = "okay";
426};
427
428&uart5 {
429 pinctrl-names = "default";
430 pinctrl-0 = <&pinctrl_uart5>;
431 uart-has-rtscts;
432 status = "okay";
433};
434
435&usbh1 {
436 pinctrl-names = "default";
437 pinctrl-0 = <&pinctrl_usbh1>;
438 vbus-supply = <&reg_usb_h1_vbus>;
439 dr_mode = "host";
440 status = "okay";
441};
442
443&usbotg {
444 vbus-supply = <&reg_usb_otg_vbus>;
445 pinctrl-names = "default";
446 pinctrl-0 = <&pinctrl_usbotg>;
447 disable-over-current;
448 dr_mode = "otg";
449 status = "okay";
450};
451
452&usdhc2 {
453 pinctrl-names = "default";
454 pinctrl-0 = <&pinctrl_usdhc2>;
455 cd-gpios = <&gpio6 16 GPIO_ACTIVE_HIGH>;
456 keep-power-in-suspend;
457 status = "okay";
458};
459
460&usdhc3 {
461 pinctrl-names = "default";
462 pinctrl-0 = <&pinctrl_usdhc3>;
463 cd-gpios = <&gpio7 8 GPIO_ACTIVE_LOW>;
464 fsl,wp-controller;
465 keep-power-in-suspend;
466 status = "disabled";
467};
468
469&usdhc4 {
470 pinctrl-names = "default";
471 pinctrl-0 = <&pinctrl_usdhc4>;
472 non-removable;
473 bus-width = <8>;
474 no-1-8-v;
475 keep-power-in-suspend;
476 status = "okay";
477};