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Tom Rini10e47792018-05-06 17:58:06 -04001/* SPDX-License-Identifier: GPL-2.0+ */
Scott Wood095b7122012-09-20 19:02:18 -05002/*
3 * (C) Copyright 2006
4 * Wolfgang Denk, DENX Software Engineering, wd@denx.de
5 *
6 * Copyright 2009 Freescale Semiconductor, Inc.
Scott Wood095b7122012-09-20 19:02:18 -05007 */
8
Masahiro Yamadacd1b58e2014-04-28 10:17:10 +09009#include "config.h"
Scott Wood095b7122012-09-20 19:02:18 -050010
11OUTPUT_ARCH(powerpc)
Pali Rohár18209f72022-06-16 14:19:44 +020012
Scott Wood095b7122012-09-20 19:02:18 -050013SECTIONS
14{
Pali Rohárb9304822022-05-11 20:57:31 +020015/* Optional boot sector */
16#if defined(CONFIG_FSL_PREPBL_ESDHC_BOOT_SECTOR)
17 .bootsect IMAGE_TEXT_BASE - CONFIG_FSL_PREPBL_ESDHC_BOOT_SECTOR_DATA * 512 : {
18 KEEP(*(.bootsect))
19 . = CONFIG_FSL_PREPBL_ESDHC_BOOT_SECTOR_DATA * 512;
20 }
21#endif
22
Pali Rohár18209f72022-06-16 14:19:44 +020023 . = IMAGE_TEXT_BASE;
24 .text : {
Pali Rohárd61e3c22022-04-05 15:12:35 +020025/* For ifc, elbc, esdhc, espi, all need the SPL without section .resetvec */
Tom Rini667dd4f2022-06-10 22:59:37 -040026#if CONFIG_IS_ENABLED(SYS_MPC85XX_NO_RESETVEC)
Pali Rohárd61e3c22022-04-05 15:12:35 +020027 KEEP(*(.bootpg))
Pali Rohárd61e3c22022-04-05 15:12:35 +020028#endif
Scott Wood095b7122012-09-20 19:02:18 -050029 *(.text*)
30 }
31 _etext = .;
32
33 .reloc : {
34 _GOT2_TABLE_ = .;
35 KEEP(*(.got2))
36 KEEP(*(.got))
Scott Wood095b7122012-09-20 19:02:18 -050037 _FIXUP_TABLE_ = .;
38 KEEP(*(.fixup))
39 }
40 __got2_entries = ((_GLOBAL_OFFSET_TABLE_ - _GOT2_TABLE_) >> 2) - 1;
41 __fixup_entries = (. - _FIXUP_TABLE_) >> 2;
42
43 . = ALIGN(8);
44 .data : {
45 *(.rodata*)
46 *(.data*)
47 *(.sdata*)
48 }
49 _edata = .;
50
Ying Zhang4393f952013-09-04 17:03:45 +080051 . = ALIGN(4);
Andrew Scull5a9095c2022-05-30 10:00:04 +000052 __u_boot_list : {
53 KEEP(*(SORT(__u_boot_list*)));
Ying Zhang4393f952013-09-04 17:03:45 +080054 }
55
Ying Zhang9ff70262013-08-16 15:16:11 +080056 . = .;
57 __start___ex_table = .;
58 __ex_table : { *(__ex_table) }
59 __stop___ex_table = .;
60
Pali Rohár41bbc762022-08-05 22:09:40 +020061 . = ALIGN(4);
Scott Wood095b7122012-09-20 19:02:18 -050062 __init_begin = .;
63 __init_end = .;
Jagdish Gediya910e1ae2018-09-03 21:35:05 +053064 _end = .;
Prabhakar Kushwaha6e2b9a32014-04-08 19:12:31 +053065#ifdef CONFIG_SPL_SKIP_RELOCATE
66 . = ALIGN(4);
67 __bss_start = .;
68 .bss : {
69 *(.sbss*)
70 *(.bss*)
71 }
72 . = ALIGN(4);
73 __bss_end = .;
74#endif
Po Liuf6facca2014-01-10 10:10:58 +080075
Pali Rohárd61e3c22022-04-05 15:12:35 +020076/* For nor and nand is needed the SPL with section .resetvec */
Tom Rini667dd4f2022-06-10 22:59:37 -040077#if !CONFIG_IS_ENABLED(SYS_MPC85XX_NO_RESETVEC)
Scott Wood095b7122012-09-20 19:02:18 -050078#if defined(CONFIG_FSL_IFC) /* Restrict bootpg at 4K boundry for IFC */
Prabhakar Kushwahaa7eb72b2014-04-08 19:12:19 +053079#ifndef BOOT_PAGE_OFFSET
80#define BOOT_PAGE_OFFSET 0x1000
81#endif
Pali Rohárd61e3c22022-04-05 15:12:35 +020082 .bootpg IMAGE_TEXT_BASE + BOOT_PAGE_OFFSET :
Scott Wood095b7122012-09-20 19:02:18 -050083 {
Prabhakar Kushwahaab4ab012013-04-16 13:27:59 +053084 arch/powerpc/cpu/mpc85xx/start.o (.bootpg)
Scott Wood095b7122012-09-20 19:02:18 -050085 }
Prabhakar Kushwahaa7eb72b2014-04-08 19:12:19 +053086#ifndef RESET_VECTOR_OFFSET
Scott Wood095b7122012-09-20 19:02:18 -050087#define RESET_VECTOR_OFFSET 0x1ffc /* IFC has 8K sram */
Prabhakar Kushwahaa7eb72b2014-04-08 19:12:19 +053088#endif
Scott Wood095b7122012-09-20 19:02:18 -050089#elif defined(CONFIG_FSL_ELBC)
90#define RESET_VECTOR_OFFSET 0xffc /* LBC has 4k sram */
91#else
92#error unknown NAND controller
93#endif
Pali Rohárd61e3c22022-04-05 15:12:35 +020094 .resetvec IMAGE_TEXT_BASE + RESET_VECTOR_OFFSET : {
Scott Wood095b7122012-09-20 19:02:18 -050095 KEEP(*(.resetvec))
96 } = 0xffff
Ying Zhang0d4f5442013-05-20 14:07:23 +080097#endif
Scott Wood095b7122012-09-20 19:02:18 -050098
Prabhakar Kushwaha6e2b9a32014-04-08 19:12:31 +053099#ifndef CONFIG_SPL_SKIP_RELOCATE
Scott Wood095b7122012-09-20 19:02:18 -0500100 /*
101 * Make sure that the bss segment isn't linked at 0x0, otherwise its
102 * address won't be updated during relocation fixups.
103 */
104 . |= 0x10;
105
Ying Zhang5ca62f22013-06-07 17:25:16 +0800106 . = ALIGN(4);
Scott Wood095b7122012-09-20 19:02:18 -0500107 __bss_start = .;
108 .bss : {
109 *(.sbss*)
110 *(.bss*)
111 }
Ying Zhang5ca62f22013-06-07 17:25:16 +0800112 . = ALIGN(4);
Simon Glassed70c8f2013-03-14 06:54:53 +0000113 __bss_end = .;
Prabhakar Kushwaha6e2b9a32014-04-08 19:12:31 +0530114#endif
Scott Wood095b7122012-09-20 19:02:18 -0500115}